Graphics Hardware, Graphics APIs, and Computation on GPUs. Mark Segal

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1 Graphics Hardware, Graphics APIs, and Computation on GPUs Mark Segal

2 Overview Graphics Pipeline Graphics Hardware Graphics APIs ATI s low-level interface for computation on GPUs 2

3 Graphics Hardware High Level I/O CPU Northbridge Main Memory PCI-E 16x X1K Host Interface Other Important Graphics Stuff 3D pipeline Memory Controller 256 gfx memory 3

4 3D Pipeline Overview Command Rasterizer Fragment Per-Pixel Operations Framebuffer 4 1.2G Vertices (=Tris)/sec 11 G Pixels/sec Programmable vertex, fragment processors Allows Sophisticated shading High scene, depth complexity, multipass, high-dynamic range, antialiasing Computation on GPUs

5 ATI Hardware X1K series 8 vertex engines, 16 fragment engines 3-component vector + scalar X19xx: 48 fragment ALU cores Dynamic flow control 256Mb, 512Mb, 1Gb configurations 650 MHz engine, 775 MHz memory (X19xx XTX) 5

6 3D pipeline control Command Rasterizer Fragment Per-Pixel Operations Framebuffer 6 Pipelined or non-pipelined

7 3D pipeline vertex fetch Getting vertex data Immediate mode; Direct specification CPU Fragment Host Interface Per-Pixel Operations Command Vertices Framebuffer 7 Fetch Memory Controller Rasterizer Graphics Memory Command

8 3D pipeline vertex fetch Getting vertex data arrays; Indirect specification CPU Fragment Host Interface Per-Pixel Operations Command Framebuffer Commands Fetch Vertices 8 Memory Controller Rasterizer Graphics Memory Command

9 3D pipeline vertex fetch Getting vertex data Index arrays; Indexed specification CPU Rasterizer Per-Pixel Operations Host Interface Commands Command Indices Framebuffer Fetch Vertices 9 Memory Controller Fragment Graphics Memory Command

10 s Command Rasterizer Look like fragment processors 8 4-component dot-product engines 650 MHz 4 clocks per vertex per engine 32-bit floating-point Fragment Per-Pixel Operations Framebuffer 10 Arithmetic instructions: madd, 1/x, 1/sqrt(x), etc. comparison Flow control instructions call, return, loop, jnz, etc.

11 Processing Final Steps Command Primitive assembly, clipping, perspective divide, viewport scaling Rasterizer Fragment Per-Pixel Operations Framebuffer 11

12 Scan conversion Command Rasterizer Fragment Compute parameter (depth, color, texture coord) at each fragment Use plane equation (affine in x,y) derived from values at vertices Pretesting eliminates invisible fragments, hierarchically p1 z = a z x + bz y + cz Per-Pixel Operations s = (a s x + b s y + c s ) / (a1/w x + b1/w y + c1/w ) Framebuffer p0 12 p2

13 Fragment Implementation Texture Command Rasterizer r/w registers Fragments In 128x128 1W3R outputs ALU Fragment Per-Pixel Operations Framebuffer constants Register Interface 128x128 1W3R Sequencer 48 (4xIEEE-32) ALUs 200Gbit memory bandwidth 13 4x128 1W1R Fragments Out

14 Threading When a fragment program hits a stall, switch to another that s ready to go E.g. texture read takes many cycles Latency hiding E.g. texture fetch appears to take one cycle, can overlap with ALU Many fragments in various stages of completion (in flight) at any one time Requires storage for stalled fragments data Can use unused temporary registers 14

15 Per-Pixel Operations, Framebuffer Command Rasterizer Fragment Per-Pixel Operations Framebuffer 15 Fog: c = ccurrent * (1-f) + cfog * f Depth, Stencil, Alpha Tests Color blend Blend incoming/existing color 32-bit floating-point framebuffer Other graphics operations, optimizations

16 What can you do with this stuff? 16

17 Antialiasing + High Dynamic Range 17

18 Graphics Programming Interfaces (APIs) 18

19 Graphics Programming Interfaces Provide software interface to graphics hardware Lowest level: Expose full functionality of hardware at full performance Hide device-specific details Limit interface changes generation to generation Higher levels: Simplify application programming E.g. scene graph, shading languages 19

20 Low Level Interface Texture Expose pipeline Triangles Rasterize Fragments Framebuffer Historically fixed-function OpenGL Requires all functionality; software path if not Direct3D Uses capability bits Both provide vertex, fragment program assembly language 20

21 High Level Interface Programmable Renderman Shading-specific; not designed for hardware HLSL (DirectX), GLSL (OpenGL), Cg (nvidia - both) C-like General, but all expose some hardware details 3 & 4 element vectors GLSL virtualizes number of passes Have become only means to access programmability Actual vertex, fragment processor instruction set not exposed 21

22 Re-examine hw abstraction OpenGL (originally) host Not programmable Command Graphics memory not accessible, special purpose Changes: Programmability Fragment Per-Pixel Operations 22 Graphics Memory Rasterizer Flexible use of graphics memory (multipass, renderto-texture, render-to-vertexarray)

23 New low-level interface host Command Distinguish two characteristics P Data path, routing, memory parallel data processors P Machine language Fragment Compiler for higher-level languages Use libraries P Graphics Memory Expose Programmability; jettison fixed F Rasterizer function Per-Pixel F Operations Expose memory capabilities and routing Stripped-down interface 23 P: programmable F: fixed

24 Fits with New GPU Applications Recent applications exploit high-speed, parallel computation, large graphics memory Ray-tracing, collision detection, volume rendering/classification, etc. Optimization, matrix computations E.g. matrix 110 Gflops Sorting, Searching, HMMs New Real-Time Graphics Applications 24

25 ATI CTM Stands for: ATI Close To the Metal Exposes GPU (fragment) data parallel processors and memory Specifies actual processor instruction set architecture (ISA) Specifies application binary interface (ABI) for programs Leaves memory management entirely up to the application 25

26 ATI CTM (cont.) Abstracts GPU control hardware (around processor array) Provides a model of the GPU command processor Hides irrelevant details that are still necessary to drive GPU Architecture independent Focuses initially on computation Exports only a subset of surrounding GPU features Hides vertex programs, rasterization, texture filtering, pixel operations 26

27 ATI CTM Block Diagram Application atictm.dll amopenmanagedconnection() amclosemanagedconnection() amsubmitcommandbuffer() amcommandbufferconsumed() GPU Memory CTM PCI-E Memory Commands Command Data Parallel (DPP) Array 27 Memory Controller Commands Instructions Instructions Constants Constants Inputs Inputs Outputs Outputs

28 ATI CTM DPP Code Generation Code generation is up to the application Instruction set and application binary interface are documented Source code provided for a simple assembler Source code provided to pack and extract ELF binaries Source code to be available for a non-optimizing reference compiler ATI is encouraging the development of external tool chains Compilers, Linkers, Libraries, Debuggers ATI optimizing compiler (available with CTM SDK) Takes a higher-level interface (e.g. PS3) and produces ELF binaries 28

29 CTM and the Graphics APIs Graphics APIs may impede the development of some applications Applications must manage graphics state Code generation is (by design) hidden Memory format and management are (by design) hidden Driver imposes a graphics-centric (games) performance profile APIs are mediated by the window system (wgl/glx) Imposes a particular threading model for GPU access Complicates multi-gpu operation Couples application to display policy Performance (and functionality) may be unpredictable across drivers 29

30 CTM and the Graphics APIs (cont.) CTM gives full control to an application of the features it exposes Code generation Memory management Command buffer packing and submission Relatively immune to driver changes Graphics APIs abstract the graphics pipeline; CTM abstracts the processor 30

31 Conclusion Good image quality requires lots of computation; recent GPUs have lots of computational power Don t forget about memory Graphics APIs aren t always a good fit to expose computational power, especially outside graphics Real-time graphics has changed and is changing Programmability, single memory Line between computation and graphics is blurring E.g., Game physics, Ray-tracing on GPUs Use CPU and GPU in concert at a finer grain 31

32 Graphics Hardware, Graphics APIs, and Computation on GPUs Mark Segal

33 Overview Graphics Pipeline Graphics Hardware Graphics APIs ATI s low-level interface for computation on GPUs 2 ATI Confidential

34 Graphics Hardware High Level I/O Northbridge CPU Main Memory PCI-E 16x X1K Host Interface Other Important Graphics Stuff 3D pipeline Memory Controller 256 gfx memory 3 ATI Confidential

35 3D Pipeline Overview Command Rasterizer Fragment Per-Pixel Operations Framebuffer 4 1.2G Vertices (=Tris)/sec 11 G Pixels/sec Programmable vertex, fragment processors Allows Sophisticated shading High scene, depth complexity, multipass, high-dynamic range, antialiasing Computation on GPUs ATI Confidential

36 ATI Hardware X1K series 8 vertex engines, 16 fragment engines 3-component vector + scalar X19xx: 48 fragment ALU cores Dynamic flow control 256Mb, 512Mb, 1Gb configurations 650 MHz engine, 775 MHz memory (X19xx XTX) 5 ATI Confidential

37 3D pipeline control Command Rasterizer Pipelined or non-pipelined Fragment Per-Pixel Operations Framebuffer 6 ATI Confidential

38 3D pipeline vertex fetch Getting vertex data Immediate mode; Direct specification CPU Fragment Host Interface Per-Pixel Operations Command Vertices Fetch Framebuffer 7 ATI Confidential Memory Controller Rasterizer Graphics Memory Command

39 3D pipeline vertex fetch Getting vertex data arrays; Indirect specification CPU Fragment Host Interface Per-Pixel Operations Command Commands Fetch Framebuffer Vertices 8 ATI Confidential Memory Controller Rasterizer Graphics Memory Command

40 3D pipeline vertex fetch Getting vertex data Index arrays; Indexed specification CPU Rasterizer Host Interface Fragment Command Per-Pixel Operations Indices Fetch Framebuffer Vertices 9 ATI Confidential Memory Controller Commands Graphics Memory Command

41 s Command Look like fragment processors 8 4-component dot-product engines 650 MHz Rasterizer 4 clocks per vertex per engine 32-bit floating-point Fragment Per-Pixel Operations Framebuffer 10 Arithmetic instructions: madd, 1/x, 1/sqrt(x), etc. comparison Flow control instructions call, return, loop, jnz, etc. ATI Confidential

42 Processing Final Steps Command Primitive assembly, clipping, perspective divide, viewport scaling Rasterizer Fragment Per-Pixel Operations Framebuffer 11 ATI Confidential

43 Scan conversion Command Rasterizer Fragment Compute parameter (depth, color, texture coord) at each fragment Use plane equation (affine in x,y) derived from values at vertices Pretesting eliminates invisible fragments, hierarchically p1 z = a z x + bz y + cz Per-Pixel Operations s = (a s x + b s y + cs ) / (a1/w x + b1/w y + c1/w ) Framebuffer p0 12 p2 ATI Confidential

44 Fragment Implementation Texture Command Rasterizer r/w registers Fragments In Fragment Per-Pixel Operations Framebuffer 128x128 1W3R outputs ALU constants Register Interface 128x128 1W3R Sequencer 48 (4xIEEE-32) ALUs 200Gbit memory bandwidth 13 ATI Confidential 4x128 1W1R Fragments Out

45 Threading When a fragment program hits a stall, switch to another that s ready to go E.g. texture read takes many cycles Latency hiding E.g. texture fetch appears to take one cycle, can overlap with ALU Many fragments in various stages of completion (in flight) at any one time Requires storage for stalled fragments data Can use unused temporary registers 14 ATI Confidential

46 Per-Pixel Operations, Framebuffer Command Rasterizer Fragment Per-Pixel Operations Framebuffer 15 Fog: c = ccurrent * (1-f) + cfog * f Depth, Stencil, Alpha Tests Color blend Blend incoming/existing color 32-bit floating-point framebuffer Other graphics operations, optimizations ATI Confidential

47 What can you do with this stuff? 16 ATI Confidential

48 Antialiasing + High Dynamic Range 17 ATI Confidential

49 Graphics Programming Interfaces (APIs) 18 ATI Confidential 18

50 Graphics Programming Interfaces Provide software interface to graphics hardware Lowest level: Expose full functionality of hardware at full performance Hide device-specific details Limit interface changes generation to generation Higher levels: Simplify application programming E.g. scene graph, shading languages 19 ATI Confidential

51 Low Level Interface Texture Expose pipeline Triangles Rasterize Fragments Framebuffer Historically fixed-function OpenGL Requires all functionality; software path if not Direct3D Uses capability bits Both provide vertex, fragment program assembly language 20 ATI Confidential

52 High Level Interface Programmable Renderman Shading-specific; not designed for hardware HLSL (DirectX), GLSL (OpenGL), Cg (nvidia - both) C-like General, but all expose some hardware details 3 & 4 element vectors GLSL virtualizes number of passes Have become only means to access programmability Actual vertex, fragment processor instruction set not exposed 21 ATI Confidential

53 Re-examine hw abstraction OpenGL (originally) host Not programmable Command Graphics memory not accessible, special purpose Changes: Rasterizer Per-Pixel Operations 22 Graphics Memory Fragment Programmability Flexible use of graphics memory (multipass, renderto-texture, render-to-vertexarray) ATI Confidential

54 New low-level interface host Command Distinguish two characteristics P Data path, routing, memory parallel data processors P Machine language Fragment Compiler for higher-level languages Use libraries P Graphics Memory Expose Programmability; jettison fixed F Rasterizer function Per-Pixel F Operations Expose memory capabilities and routing Stripped-down interface 23 ATI Confidential P: programmable F: fixed

55 Fits with New GPU Applications Recent applications exploit high-speed, parallel computation, large graphics memory Ray-tracing, collision detection, volume rendering/classification, etc. Optimization, matrix computations E.g. matrix 110 Gflops Sorting, Searching, HMMs New Real-Time Graphics Applications 24 ATI Confidential

56 ATI CTM Stands for: ATI Close To the Metal Exposes GPU (fragment) data parallel processors and memory Specifies actual processor instruction set architecture (ISA) Specifies application binary interface (ABI) for programs Leaves memory management entirely up to the application 25 ATI Confidential 25

57 ATI CTM (cont.) Abstracts GPU control hardware (around processor array) Provides a model of the GPU command processor Hides irrelevant details that are still necessary to drive GPU Architecture independent Focuses initially on computation Exports only a subset of surrounding GPU features Hides vertex programs, rasterization, texture filtering, pixel operations 26 ATI Confidential

58 ATI CTM Block Diagram Application atictm.dll amopenmanagedconnection() amclosemanagedconnection() amsubmitcommandbuffer() amcommandbufferconsumed() GPU Memory CTM PCI-E Memory Commands Command Memory Controller Commands Data Parallel (DPP) Array 27 Instructions Instructions Constants Constants Inputs Inputs Outputs Outputs ATI Confidential 27

59 ATI CTM DPP Code Generation Code generation is up to the application Instruction set and application binary interface are documented Source code provided for a simple assembler Source code provided to pack and extract ELF binaries Source code to be available for a non-optimizing reference compiler ATI is encouraging the development of external tool chains Compilers, Linkers, Libraries, Debuggers ATI optimizing compiler (available with CTM SDK) Takes a higher-level interface (e.g. PS3) and produces ELF binaries 28 ATI Confidential 28

60 CTM and the Graphics APIs Graphics APIs may impede the development of some applications Applications must manage graphics state Code generation is (by design) hidden Memory format and management are (by design) hidden Driver imposes a graphics-centric (games) performance profile APIs are mediated by the window system (wgl/glx) Imposes a particular threading model for GPU access Complicates multi-gpu operation Couples application to display policy Performance (and functionality) may be unpredictable across drivers 29 ATI Confidential 29

61 CTM and the Graphics APIs (cont.) CTM gives full control to an application of the features it exposes Code generation Memory management Command buffer packing and submission Relatively immune to driver changes Graphics APIs abstract the graphics pipeline; CTM abstracts the processor 30 ATI Confidential

62 Conclusion Good image quality requires lots of computation; recent GPUs have lots of computational power Don t forget about memory Graphics APIs aren t always a good fit to expose computational power, especially outside graphics Real-time graphics has changed and is changing Programmability, single memory Line between computation and graphics is blurring E.g., Game physics, Ray-tracing on GPUs Use CPU and GPU in concert at a finer grain 31 ATI Confidential

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