Post Silicon Electrical Validation
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1 Post Silicon Electrical Validation Tony Muilenburg 1 1/21/2014
2 Homework 4 Review 2 1/21/2014
3 Architecture / Integration History 3 1/21/2014
4 4 1/21/2014
5 Brief History Of Microprocessors 5 1/21/2014
6 6 1/21/2014
7 7 1/21/2014
8 8 1/21/2014
9 9 1/21/2014
10 10 1/21/2014
11 Recent History 11 1/21/2014
12 Integrated MCH Multi-Chip Package 12 1/21/2014
13 Graphics / Edram 13 1/21/2014
14 Integrated PCH - Haswell 14 1/21/2014
15 Validation Methodology Example 15 1/21/2014
16 Course Objectives Following this course, you will be able to: Describe what is required to make a DDR PRQ recommendation Explain how to establish basic stability before beginning validation List the experiments needed to estimate UPM (units failing per million) Compare DOE (design of experiment) with the monte carlo approach, and explain when the use of each is appropriate. Describe how guardbanding is used for parameters than cannot be adjusted easily. Explain when it is appropriate to leverage historical data, and the associated risk. Deal with memory configuration explosion, BIOS training complications, stress consideratons Generate an overall validation flow to manage a large number of variables. 16
17 Agenda SMV 101 Review Overview of General DDR EV SMV Flow Phase 1 Basic Stability & Parameter Discovery Phase 2 Broad Scale Monte Carlo Phase 3 DOE or Focused Monte Carlo, UPM, Corrective Actions Phase 4 Final Regressions, PRQ Recommendation 17
18 SMV 101 Review Parameters are swept from default settings to the point where data becomes corrupted (margining) Examples: Voltage reference Data vs clock timing 18
19 Agenda SMV 101 Review Overview of General DDR EV SMV Flow Phase 1 Basic Stability & Parameter Discovery Phase 2 Broad Scale Monte Carlo Phase 3 DOE or Focused Monte Carlo, UPM, Corrective Actions Phase 4 Final Regressions, PRQ Recommendation 19
20 Definitions DOE (Design of experiment) A statistical tool used to intelligently pick experimental cases for a set of parameters. A tool like JMP is used to generate the cases, then a model is created where results are interpolated and extrapolated. A distribution of margin can be generated, and the worst combination of values for parameters will be given. UPM (Units per million) The threshold set for the number of failing platforms that is acceptable. Example: No more than X platforms out of one million may fail due to DDR bus issues. Guardband An offset (or de-rating) applied to a platform for the parameters that were not part of the model. Trace length is an example of a parameter that is difficult, or costly, to vary in an experiment. 20
21 EV Flow Overview 21 Note: High leverage projects may skip or have a reduced Broad Scale Monte Carlo. However, this option should be taken with extreme care.
22 22 Conceptual View of EV Flow
23 Focus of Each EV Phase PO PO Exit VVR PFT PLC Milestones PPS PRQ Ready PRQ Phase 1: Establish Stability Phase 2: Broad Scale Testing Phase 3: Corrective Actions and UPM Sharpening Phase 4: Final Regression Establish basic stability Interconnect cleaning without scrambler (worst case pattern search) Unit selection Parameter sensitivity studies Core MRC development and verification Large scale Monte Carlo type testing Identify and debug configuration specific issues Identify low margin configurations First stage UPM analysis, which should clear most configurations as good Focus in on debug and corrective actions for low margin cases Refine UPM predictions for low margin cases using either DOE or focused Monte Carlo Cycle if required Final regression testing with PRQ BIOS 23 Some overlap between phases is expected Generally maps to PLC phases as shown
24 DDR3 Challenges Complicated topologies Multi-drop bus with different routing configurations possible Require large scale testing, preferably supplemented with customer data Vast number of configurations possible Can t test them all, but also can t assume we understand the bus and only do a few focused DOEs Require large scale testing, preferably supplemented with customer data Must support many different 3 rd party DIMM modules Can t just test to spec and hope for the best Assumes the industry has a robust DIMM module supply to be successful 24
25 Agenda: Phase 1 SMV 101 Review Overview of General DDR EV SMV Flow Phase 1 Basic Stability & Parameter Discovery Phase 2 Broad Scale Monte Carlo Phase 3 DOE or Focused Monte Carlo, UPM, Corrective Actions Phase 4 Final Regressions, PRQ Recommendation 25
26 Establishing Stability Before any margin data can be collected for a configuration, basic system stability must be established. The system should be able to run under nominal conditions without crashing for at least the duration that the system is expected to take margining. For example, if a margin test is expected to take 20 minutes, stability should be run for at least 20 minutes. 26
27 27 Phase 1: Parameter Discovery Purpose: Identify key parameters that impact margin Example parameters: Board: Board skew, Memory vendor, Loading configuration, Bus voltage CPU: CPU volume, CPU skew, CPU temp Initial guardband development should begin
28 Pre Silicon Work with the team that did simulation for the platform. Historically, some of the parameters that have been significant include: CPU package impedance, vendor, speed Motherboard impedance, trace length, routing Compensation for timing skew, termination Z, compensation Z CPU temperature, DIMM temperature Memory voltage, CPU IO voltage Iterative process 28
29 Focused Experiments Sweep through individual parameters Interactions explode quickly Eliminate parameters with little or no impact Guardband where appropriate Expense may play a part in determining which parameters to measure, and which to guardband For example, it is not practical to build boards to cover ten different impedance values 29
30 Training Validation DDR training has become increasingly complex A structured approach should be taken to validate training algorithms are working as intended Training Signal strength Slew rate Terminations Centering Equalization Power Delays Etc 30
31 Skip the Monte Carlo Phase? Can I skip from phase 1 to phase 3, running the DOE before doing large scale Monte Carlo testing? It is possible to skip phase 2, but if possible, it is more appropriate to run both the Monte Carlo and DOE at the same time. This minimizes the risk of missing a parameter with an issue when running a focused DOE. Requirements to bypass phase 2: The margin results are repeatable and deterministic The worst case DIMM configuration is relatively clear, or correlation exists between configurations. A risk summary has been delivered to stakeholders 31
32 Agenda: Phase 2 SMV 101 Review Overview of General DDR EV SMV Flow Phase 1 Basic Stability & Parameter Discovery Phase 2 Broad Scale Monte Carlo Phase 3 DOE or Focused Monte Carlo, UPM, Corrective Actions Phase 4 Final Regressions, PRQ Recommendation 32
33 Phase 2: Broad Scale Testing Purpose: To provide broad coverage to: Margin comparison of different configurations Identify low margin cases of configuration for further analysis Identify issues across a wide spectrum of real world use cases Training/MRC debug Provide preliminary risk analysis Includes broad scale Monte Carlo and customer data May iterate through Broad Scale Monte Carlo depending on extent of corrective actions in Phase 2 and 3 Major changes to MRC, board design, etc will drive the requirement to repeat the broad scale Monte Carlo Automation is critical to carry this out efficiently 33
34 Monte Carlo Design Considerations Should be driven by practicality and insights from parameter discovery Phase Example list of parameters for Broad scale MC: Board: Board skew, Memory vendor, Loading configuration, Bus voltage CPU: CPU volume, CPU temp Actual list determined from Phase 1 Parameter Discovery Use engineering judgment If margin has little sensitivity to a parameter, keep it at nominal Prioritize and allocate more cases to higher risk loading configurations Separate Monte Carlo experiments by loading configuration This simplifies execution Where possible, design Monte Carlo cases with real world input distributions from the sensitive variables Examples on the next slide 34
35 Examples of Input Distributions Board Impedance Try to model the worst case sub-population Use the worst case impedance value if known (a customer board could tend to this corner) Temperature Mimic a real world distribution DIMM Vendor Generally one of the most critical variables Priority should focus on high volume configurations Homogeneous configurations generally make up over 90% of volume Mixed configurations should be checked, especially if homogeneous configurations are robust 35
36 Example of DIMMs Consideration should also be given to the DRAM technology roadmap when determining configurations Example DRAM technology roadmap 36
37 Sample Validation Plan Table 37 POR is Plan of Record
38 Stress Patterns Products supporting scrambling on DDR should use scrambler on or equivalent for Monte Carlo There are 2 methods: 1. Establish guardband from short dwell time margins (such as REUT) to margins of full bus utilization scrambled data for 30 days Often this may be the most practical alternative 2. Capture error rates at different margin levels and extrapolate to 30 day margins using scrambled data 38
39 Agenda: Phase 3 SMV 101 Review Overview of General DDR EV SMV Flow Phase 1 Basic Stability & Parameter Discovery Phase 2 Broad Scale Monte Carlo Phase 3 DOE or Focused Monte Carlo, UPM, Corrective Actions Phase 4 Final Regressions, PRQ Recommendation 39
40 DOE Example JMP picks an intelligent set of cases to run 21 in this example) Margin is measured for the cases A model is generated, results are interpolated, and JMP predicts the worst combination This combination should be tested in the lab to verify the model prediction is accurate DOE Table Interpolated Margin 40
41 Parameter Distributions The shape of the parameter distributions are not always normal Distributions should be measured, simulated or estimated for each platform 41
42 Bit Error Rate (BER) DOE measurements are extrapolated to 30 day margin results Bit error rate information is capture for multiple steps to calculate this number At least five points should be used to extrapolate Month margin measurement 42
43 Guardbanding process UPM calculation should take into account all parameters not covered as guardband: Stress coverage DIMM coverage Measurement inaccuracy etc Guardband is implemented in mean and standard deviation values 43 Guardband numbers should not be copied from previous projects, But should be measured or estimated for each unique platform
44 44 Guardband Example
45 UPM Margin Distribution One random system UPM MB_L=[ ] MB_Z=[45] CPU=1.6sigma Fast Temp= 80 Vddq=1.52V margin WC=92mV 120mV Noise = 2mV RMS 45
46 46 UPM Prediction Flow
47 UPM Considerations Sometimes UPM calculation requires too much effort to be accurate ( DOE fitting or MC sample size). First pass UPM approach: To recognize problematic configurations by Large Scale Monte Carlo (UPM is larger than small number >20) Configurations with <20 UPM are good Fix by training or other interconnect corrective actions DOE can give some directions for issue resolution (parameter sensitivity analysis) Repeat DOE or focused MC to be sure that UPM number is small (<20) For accurate UPM number we should have: DOE good fitting, model validation Monte Carlo large sample size to meet general UPM accuracy ( ) and input parameter distribution representation (normal, trapeze etc) Accurate GB calculation 47
48 Agenda: Phase 4 SMV 101 Review Overview of General DDR EV SMV Flow Phase 1 Basic Stability & Parameter Discovery Phase 2 Broad Scale Monte Carlo Phase 3 DOE or Focused Monte Carlo, UPM, Corrective Actions Phase 4 Final Regressions, PRQ Recommendation 48
49 Final Regression There are generally many MRC iterations throughout the product validation cycle A final broad based regression is required to ensure that the final PRQ candidate MRC aligns with margin expectations across different configurations Pattern selection same as Monte Carlo Sampling Strategy for margin regression: Some random Some from worst case DIMM configurations MRC repeatability Finalize UPM prediction 49
50 Summary SMV 101 Review Overview of General DDR EV SMV Flow Phase 1 Basic Stability & Parameter Discovery Phase 2 Broad Scale Monte Carlo Phase 3 DOE or Focused Monte Carlo, UPM, Corrective Actions Phase 4 Final Regressions, PRQ Recommendation 50
51 Distribution Merging Distribution Merging Mean shifts the distribution Add to mean, or subtract from mean Standard deviation stretches it Square root of the sum of the squares for standard deviation 51 1/21/2014
52 Homework 5 Distribution Merging Add CPU temperature impact to the UPM calculation Calculate the new mean and standard deviation Plot the new margin distribution PDF What is the UPM now? If we figure out a way to improve eye centering that yields 20mV improvement in margin, what is the UPM? Note: this is very similar to homework 4 For next time: install the trial version of JMP /21/2014
53 Reading Assignment Read through the details of lecture 5 slides 53 1/21/2014
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