Optimization of Test/Diagnosis/Rework Location(s) and Characteristics in Electronic Systems Assembly Using Real-Coded Genetic Algorithms

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1 Proceedgs of the International Test Conference, October 3 Optimization of Test/Diagnosis/Rework Location(s) and Characteristics Electronic Systems Assembly Usg Real-Coded Genetic Algorithms Zhen Shi and Peter Sandborn CALCE Electronic Products and Systems Center University of Maryland College Park, MD 74 Abstract This paper presents a framework for optimizg the location(s) and characteristics (fault coverage/test cost, rework success rate/rework cost) of Test/Diagnosis/Rework () operations the assembly process for electronic systems. A new search algorithm called Waitg Sequence Search (WSS) is applied to traverse a general process flow order to perform the cumulative calculation of a yielded cost objective function. Real-Coded Genetic Algorithms (RCGAs) are used to perform a multi-variable optimization that mimizes yielded cost. Several simple cases are analyzed for validation and a general complex process flow is used to demonstrate the applicability of the algorithm.. Introduction Performg trade-offs of where an assembly process to test and what level of test, diagnosis and rework to perform are key to optimizg the cost and yield of an electronic system s assembly. The level of testg, diagnosis and rework performed is defed by the followg feature parameter combations: fault coverage/test cost, diagnosis success rate/diagnosis cost, and rework success rate/rework cost. Previous research efforts have treated the economics of test for electronic systems. Test economics modelg and methodology development ranges from classical relations between fault coverage and yield [], to the development of economic models for analyzg the fancial aspects of test vestments [] and the tradeoffs associated with design for test [3]. Many modelg efforts have focused on the development of test step models for clusion process flow based cost analyses, e.g., [4]-[8]. A process flow is a set of process steps an applicationspecific sequence. These models vary complexity, but general they take comg costs and yields (from upstream process steps) and determe the cost and yield of the product after testg to specified fault coverage has been performed. In most cases, some type of diagnosis and rework can also be modeled. Persons volved with modelg the economics of a product s manufacture can use these models with the larger manufacturg process flows. Previous efforts usg Test/Diagnosis/ Rework () models have been confed to evaluatg the impacts on product manufacturg when the locations of the test operations (relative to the manufacturg process steps) are manually chosen. Optimization of the feature parameter combations of testg concurrent with a search to determe the optimum location(s) for operations a process is not known to have been addressed previous work. The target of this paper is to address the followg questions: How much fault coverage should be required? Where ( a process) do I put the test locations? When do I need to do the rework? How many rework attempts should be made? The trade-off process has the purpose of makg the best choice between various possible versions of tests and reworks, and to suggest the values of feature parameters of testg order to mimize an objective function associated with the process flow. To achieve the goal, the followg three items have been vestigated:. Computations of a sgle operation.. A searchg algorithm to traverse all process steps a general process flow. 3. Multi-variable optimization usg Real- Coded Genetic Algorithms (RCGAs).

2 . The Optimization Method The framework for optimizg the implementation of s a process flow is shown Figure. In the model, the process flow for manufacture or assembly of the electronic system is first generated. Then candidate operations are serted to the process flow all possible locations, i.e., between all process steps as an itial guess (if the operations can be serted accordg to specific experiences the optimization will be more efficient). Startg with the process flow and the itial guess of operation locations, a pre-analysis is executed to sort similar process steps and merge branches to decrease complexity of process flow. A new search algorithm (see Section 4) is applied to traverse the entire process to perform the cumulative calculation of the objective function (yielded cost). RCGAs are used to perform a multi-variable optimization that mimizes yielded cost. The remader of the paper is organized as follows: Section 3 reviews the cost model used for the computations of a sgle operation the process flow. Section 4 proposes a new graph-based search method, named Waitg Sequential Search, which is applied to general process flows order to search all the step nodes the graphical representation and derive cumulative objective function. In Section 5, RCGAs are used to implement the optimization of the operations and the parameters associated with them the process flow. Test cases are also provided Section 5 to verify and demonstrate the applicability of the model. 3. The Test/Diagnosis/Rework Model To volve all the effects of the feature parameters on a general process flow and how they relate to each other, a comprehensive model was developed by Trichy et al. [7]. This model provides a detailed formulation of the feature parameters for a sgle operation. Figure shows the content of the model and detailed formulations are given [7]. This model provides the accurate computation of the feature parameters: C out and Y out, etc. for a sgle operation a process flow which Note, the followg typographical errors should be corrected [7]: In () and (3), the maximum of the summation should be n- stead of n, and (4a) can be used for either defition of f p with N changed to. In d n + N dn (3), the subscript of Nr should be i- stead of i when i>. Generation of Process Flow Placement of Test/ Diagnosis/Rework Package Pre-Analysis of Process Flow Searchg the Graph Objective Function RCGAs Optimization Robust Analysis Figure : The framework for optimization of operation location(s) and characteristics a general process flow. several variables C test and C rew are defed as the constants. For real processes C test is not a constant and stead is related to the fault coverage of the test. The rework yield (rework success rate) is also not a constant. It depends on the specific rework actions taken. In practice the rework operation may cause additional defects to be serted the product, [9]. For use this work, the model [7] is extended by defg general forms of the relationships among the feature parameters, e.g., the costs of test and rework terms of fault coverage and rework yield respectively. A relationship between the cost of test (proportional to test time or number of tests) and fault coverage has been suggested by Goel []. Empirical data shows that the test process can be divided two phases. A relatively small subset of T I (number of tests Phase I see Figure 3) of the total set of tests provides a fault coverage rangg from 65% to 85% for most combational logic circuits []. For Phase II of the test generation, the number of additional tests required is approximately a lear function of the number of untested faults remag at the end of Phase I. Unlike Phase I, Phase II each generated test tends to detect fewer faults than the one before it and the average cost per detected fault creases.

3 C, Y, N Defects (Y beforetest ) Test (C test, f c, f p ) Defects (Y aftertest ) C out, Y out, N out To be diagnosed (N d ) Reworked N g out No Fault Found N r out Rework (f r, C rew,y rew ) Repairable (N r ) N d Diagnosis (f d, C diag ) Scrap (N s ) Scrap (N s ) Figure : Organization of the Test/Diagnosis/Rework () operation, [7]. Number of Undetected Faults For the purpose of simplifyg the relationship, an exponential function can be used to approximately simulate Phase I and a lear function Phase П on the assumption that Phase II could not reach a full coverage (% of fault coverage) practical testg. Assumg that the test cost is proportional to the number of tests, a relationship between test cost and fault coverage can be derived, C test F Phase I Phase II = p [b ln( f ) r ] + C,f (,) t F e at/t I t c Lear Segment T I Number of Tests (t) T Figure 3: Typical curve of untested faults versus the number of tests, []. t ft c () where p t is the cost coefficient; b t is the coefficient of test characteristic, r t is the fault ratio, f c is the fault coverage of test, C ft is the fixed cost of test 3. Figure 4 shows a plot of () usg the values Table. Table : Example values of factors () and (). p t b t r t C ft p r b r r r C fr Cft accounts for fixed costs associated with testg, i.e., there is a mimum fixed cost for havg even a small fault coverage. Test Cost (C test ) Fault Coverage (f c ) Figure 4: Example relationship between the test cost and fault coverage. There is similar relationship between rework yield (y r ) and rework cost (C rew ) for the first rework attempt, C rew = p [b ln( y ) r ] + C, y (,) () r r r An alternative model for calculatg the rework cost has been proposed [8], which relates C rew with the cost of rework equipment and rework time. Functional relationships between fault coverage and test cost, and rework yield and rework cost obviously depend on the type of system beg considered. The relationships () and () were used for the remag work this paper as examples only. The methodology that is the subject of this paper, will work successfully with alternative models. After the sgle operation is resolved, the next issue is to cumulatively compute the objective function of feature parameters of a general process flow that cludes multiple operations. For the purpose of derivation of the objective function, search algorithms are needed to traverse the process flow with the computation performed accordg to the sequence among process steps. r fr r 3

4 4. Process Flow Search Algorithm Based on the analysis of the model Section 3, we know how to compute the feature parameters of a sgle test step. A general process flow may, however, have many different (possibly dependent) activities located with it. The next issue to be addressed is how to obta the objective function (yielded cost, i.e., cost divided by yield) for an entire general process flow. Graphs are useful representg the process flow, i.e., complex systems volvg bary relationships among process steps []. 4. Graphical representation of a process flow First, we review the basic graph notations that are used this paper. A graph G consists of a set of nodes V and a set of edges E, G =< V, E >. Here G denotes the entire process flow, V denotes the process steps and an edge < X, Y > E denotes the directed flow between two adjacent process steps. The degree of a node is the number of the neighbors adjacent to it. We write X Y when < X, Y > E is a directed graph (DIGRAPH) [,]. We defe PRED(X) as the set of all predecessors (process steps precedg X) of node X, and SUCC(X) as the set of successors (process steps after X) of X. if X Y, then X PRED(Y) and Y SUCC(X). The degree id(v) of a node X is the cardality of PRED(X) and the outdegree od(v) of a node X is the cardality of SUCC(X). The graphical representation of an example complex process flow is shown Figure Defitions of types of vertices (process steps) From the analysis of a generic process flow, four types of basic steps have been identified. The process steps can be defed the followg ways: Start Step, od(v) = and id(v) =, There are no puts to the Start Step and just one output from it. There may be multiple Start Steps a complex process flow. Sequence Step, od(v) = and id(v) = There is one put and one output for a sequence step. Sequence Steps are the most common type of step process flows for electronic systems. Cross Step, od(v) = and id(v) There are multiple puts and just one output associated with this kd of step. The complexity of the problem is significantly creased by each Cross Step the process flow. End Step, od(v) = and id(v) An End Step represents the end of the process flow, which merges all the branches to one. The objective function of the process flow is derived from an End Step. There may only be one End Step a process flow Waitg Sequential Search (WSS) To derive the objective function of a process flow, every process step needs to be searched order to perform the cumulative computation. Significant previous work on graph-based search algorithms exists, e.g., [3,4]. Several algorithms have been applied to resolve search problems similar to the one posed here, [,]. As to the graph-based representation of our process flows, there are several specific features that make it attractive to propose a new search algorithm to perform an efficient search the process flow. From the Figure 5, the followg features of the general complex process flow can be observed: The od(v) is always true for all the vertices (process steps) the process flow; There are sequential search requests for the graph, i.e., only when all the predecessors PRED(Y) of v(y) have been visited, then Figure 5: Example graphical representation of a complex process flow. v(y) could be visited. WSS begs from the lowest-numbered vertex that belongs to a Start Step then proceeds to search the next step. By checkg the type of the successor, the algorithm decides to contue to search to the next Sequence Step or wait at a Cross or End steps. After movg to the next step, the correspondg computation of feature parameters of the previous step is performed and the outcome is stored a data table which all the property formation associated with process steps is recorded. If Cross or End types of steps 4

5 are encountered, the visitation status of all predecessors will be checked. If all the predecessors have been checked, the searchg contues, if not, the search begs from another Start Step type of vertex until the last Start Step vertex is visited. The algorithm requires that the searchg of the next step contue only after all the branches of the present step have been visited. There are waitg actions for the sequential search based on the characteristics of the process flow. The searchg process for the complex process flow example shown Figure 5 usg WSS is described below:. First, beg from the lowest number of Start Steps (), () (6), check whether all the other branches have been searched, compute then wait;. () (8), check the other branches and wait; 3. (5) (4), wait; 4. (7) (), wait; 5. (9) (7), wait; 6. (33) (6), wait; 7. (4) (45) (47) (9), wait; 8. (44) (4) (7) (5) (6) (4), wait; 9. (53) (7), wait;. (66) (7) () () (4) (9) (8), (8) is an End Step, all the branches have met and the process ends. 4.4 Multi-variable optimization function The objective of optimizg location(s) and characteristics is to mimize the yielded cost of the entire process flow [5]. The objective function which feature parameters of all possible operations are considered can be derived from sequential cumulative computation from the Start Steps to the End Step. When the WSS algorithm traverses the entire process flow, a cumulative function is computed to be used as the objective function that needs to be mimized the optimization. The optimization problem becomes: m x X n i= C Y (x, i x, i L x ) (3) mi where, m = number of feature parameters to be optimized; n = total number of process steps with all possible operations cluded; C Y = yielded cost of the process flow, cumulative cost divided by fal yield. In the optimization, first the operations would be placed all possible locations or be chosen accordg to expert suggestions. The fault coverage ( ), rework yield ( ) and rework f ci attempts for the i th operation need to be optimized order to mimize the total yielded cost of the process flow. For example, for the complex process flow Figure 5, there are (cludg the one location after the End Step-8) possible operation locations followg each of the process steps if there were no specific locations constrats as to where a operation could not be placed provided by the user. The objective function can be written as (4), if just fault converge and rework yield of the operations are to be optimized, m fc i,yr i X i= C Y (f c, i 5. Optimization with Real-Coded Genetic Algorithms (RCGAs) To optimize feature parameters of possible operations order to fd the global optimum of yielded cost of the process flow, genetic algorithms (GAs) are used. GAs are stochastic, directed search algorithms that have proved useful fdg global optima both static and dynamic environments [6]. GAs work with large populations of candidate solutions that are repeatedly subjected to selection pressure and which undergo naturally occurrg genetic operations the search for improved solutions. Complex process flows electronic systems assembly with hundreds of process steps are not uncommon. A general optimization of such a process flow requires an equally large stream of operations resultg several hundred of variables to be optimized for the trade-off analysis. Traditional Genetic Algorithms (GAs) use the bary representation that evenly discretizes a real variable space. Although bary-coded GAs (BCGAs) have been successfully applied to a wide range of optimization problems, they suffer from the disadvantage that when they are applied to the real-world problems volvg a large number of real variables the strg encodg the variables have a large strg length [6,7] (because the bary substrgs representg each parameter with the desired precision are concatenated to Y ri Y ),X [,] ri (4) In Section 5, Real-Coded Genetic Algorithms (RCGAs) are applied to mimize the objective function with feature parameters constraed to practical ranges. 5

6 represent an dividual). Another drawback of the BCGAs applied to parameter optimization problems contuous domas comes from the discrepancy between the bary representation space and the actual problem space. A simple solution to these problems is the use of the floatg-pot representation of parameters [8,9]. Usg RCGAs, an dividual is coded as a vector of real numbers correspondg to the variables and the strg length reduces to the number of variables. With RCGAs tegrated, a process flow cost optimization modelg system accordg to the framework Figure has been developed to determe the optimum placement and characteristics of operations general process flows. The system results suggestions of where the operations should be serted and not serted, and what the optimal values of feature parameters of testg and rework should be based on the optimization analysis of the objective function. The followg subsections provide the verification of the optimization model compared with functional computations simple cases and a general process flow demonstration. 5. Verification strategy To provide testg and demonstration of the approach the followg test cases are used: Test Case : Sgle-test case, fault coverage varies and no rework is cluded; Test Case : One- operation case which fault coverage and rework yield are allowed to vary (a maximum of one rework attempt assumed); Test Case 3: A general process flow case with multiple operations and variable fault coverages and rework yields (a maximum of one rework attempt assumed). Test Cases and are trivial and used to validate the optimization model by comparison with hand calculations of the yielded cost associated with the process flow. The cases are categorized to high-yield and low-yield puts order to reflect the impacts of put yield on the optimum. Test Case 3 demonstrates the value of the optimization methodology on a case where the optimum placement and characteristics of the operations is not obvious. Table : Values of put parameters C Y C Y C Y High-Yield Low-Yield Analysis of the simple cases For the simple process flow Figure 6, the optimum solution can be determed from a simple step computation. C Test 5.. Sgle-test case (Test Case ) If there is no test, the C out and Y out are computed usg (5) and (6) respectively, C = C + C + C (5) C t f c Step Step Y C Rew. Diag. C Y Y C r f r Figure 6: Simple two-step process flow with one possible operation serted between them. out out Y = Y Y Y (6) the fal yielded cost can be derived as (7), Cout ( C + C + C ) CY = = (7) Yout YY Y To evaluate this expression, the put parameters Table are used. Substitutg the puts Table to (7), the yielded cost is given as (8), 66.7 (low - yield) C Y = (8) (high - yield) If one test (no rework) operation is serted between Step and Step Figure 6, the cost and yield of the process flow is given by, (C + C) + Ctest Cout = + C f (9) c (Yi Y ) n ( f c ) Yout = (YY ) Y () fc Cout ( C + C + Ctest ) + C(YY ) C = = () Y Y out Y Y Y substitutg () to (), the yielded cost of the process flow becomes, C fc (C + C + Cft rtp t) + btptln( fc) + C(YY ) Y = () YY Y C d f d The equation can be rewritten as, C = A + Bln( f ) + CD (3) Y c C + C + Cft rtp t b tp t where A =, B =, Y Y Y Y Y Y C C =, D = Y Y. Y Y Y f c C out Y out 6

7 Figure 7: Yielded cost of process flow versus fault coverage of test. Figure 7 plots (3) for the high-yield and lowyield put cases respectively:. For high-yield puts, the yielded cost of the one-test case primarily depends on the change of ln( fc ) stead of the power of the fault coverage (i.e., D (3) is very small). The mimum of yielded cost should be at the pot when the fault coverage is zero. This is to say that the mimum yielded cost is for no test serted to the process flow, which makes tuitive sense.. For low-yield puts, we can see that (3) clearly differs from the characteristic of curve of yielded cost at high-yield puts due to creasg importance of the power of the fault coverage determg the yielded cost of the product resultg from the process flow. The mimum of yielded cost should be between $6 and $8 while the optimal fault coverage falls to the range from. to.3. Verification for high-yield puts The results of the simple calculations above are used to check the optimization methodology developed this paper. RCGAs are applied to cases of high-yield and low-yield puts respectively. The specification of RCGAs is: Maximum generation= Population size= 5 Mutation probability=. Crossover probability=.95 f T =. 4 Termation criteria = maximum generations The results from the optimization of yielded cost the sgle-test case at high-yield puts are shown Figure 8. In the first generation, the RCGAs have found the optimized solution and show the best fitness (the best value of objective function one population) of when the correspondg fault coverage is set at a very small value. After the evolution of generations (termation criteria), the algorithm converges to the same value of yielded cost, which agrees with (8). In the last generation, the fault coverage optimization termates at a small amount of fault coverage (.495), lower than the threshold for testg to be present. The test is thus removed from the process flow based on the optimization analysis from the RCGAs, which cocides with the characteristics of Figure 7 (high-yield relation). In addition to validatg the optimal yielded cost of the process flow, RCGAs are contuously convergent searchg for the optimum, see Figure 8, and the mean (mean value of objective function one population) of yielded cost levels out as well. Yielded Cost Mean Best Fitness Number of Generations Figure 8: Optimization of yielded cost the sgletest case (Test Case ) at the high-yield level. Verification for low-yield puts The specification of RCGAs used the lowyield put scenario is identical to that applied the high-yield case except the maximum number of generations has been creased to 5. The optimal solution of $65.56 and a fault coverage of.77 that agrees with the observation from Figure 7 (low-yield relation) and it is smaller than the result of computed (8) which there is no test present. 4 The threshold of fault coverage, ft, is defed as the mimum non-zero fault coverage that we can purchase. For any fault coverage below this threshold, there is considered to be no test present (zero fault coverage and zero test cost). 7

8 Fault Coverage Low-yield Inputs H igh-yield Inputs Table 3: Results of RCGAs applied the one- case at high-yield puts (Test Case ). Gen. Best Mean ($) Fault Rework Fitness ($) Coverage Yield M M M M M Rework Yield Number of Generations Low-yield Inputs H igh-yield Inputs Table 4: Results of RCGAs applied the one- case at low-yield puts (Test Case ). Gen. Best Mean ($) Fault Rework Fitness ($) Coverage Yield M M M M M Number of Generations Figure 9: Optimization histories of feature parameters one- case (Test Case ). 5.. One- case (Test Case ) In this test case, a complete operation is placed between the two process steps Figure 6 order to trace the effect of rework yield to yielded cost as well as fault coverage. Optimizations of one- case with feature parameters at high-yield and low-yield puts are given Figure 9. The optimal values of fault coverage and rework yield validate the same conclusion that there is no need for a operation for high-yield puts. In Table 3, the optimum of yielded cost reaches $4.643 (the same value with the one sgle-test case) when the fault coverage convergent to a very small amount (smaller than f T ) and the rework yield levels out without convergence Figure 9, i.e., the rework is useless and should be removed for the high-yield puts. For the low-yield puts, the rework operation plays an important role on improvg the yield of process flow. Table 4 shows an optimal yielded cost of $99.94, which is much lower than the value we have computed Section 5.. when the no rework operation was considered Optimization complex process flow (Test Case 3) For use as a general demonstration, the process flow shown Figure has been used (the puts of steps Table 5). Possible locations have been marked. For the comparison analysis, the projection of optimum fault coverage and rework yield of all possible operations for various fixed cost values of test and rework are shown Figure and. Figure 3 presents the optimization of yielded cost of the complex process flow, which the optimum of the objective function converges as the number of generations of RCGAs creases. Figure (a) has low (expensive) test and rework; as a result, 9 of the possible locations for tests are present (i.e., have fault coverages above the threshold for testg). Because rework is also expensive case (a), rework is beg done at all the actual test locations. Case (b) has expensive testg (same as case (a)), but the rework is expensive. As a result, significantly fewer rework opportunities are actually exercised. Notice also that the optimum test locations (and fault coverages) change even though the characteristics of the testg are the same due to the clusion or exclusion of rework possibilities. Figure shows the same test costs as (a) and (b), but no rework is allowed the 8

9 Table 5: Characteristics of and puts to the steps process flow Figure. 4 (5) (4) (9) 6 (6) (8) () 3 7 (7) () 8 () 9 (4) Figure : A general process flow with all possible operations. (3) 3 step cost ($) yield cost ($) yield Optimum Fault Coverage No Test Optimum Fault Coverag No Test Optimum Fault Coverag No Test Test4 Test5 Test6 Test7 Test8 Test9 Test Test Test Test3 Test4 Test4 Test5 Test6 Test7 Test8 Test9 Test Test Test Test3 Test4 Test4 Test5 Test6 Test7 Test8 Test9 Test Test Test Test3 Test4 Test Number Test Number Test Number Optimum Rework Yield Rework4 Rework5 Rework6 Rework7 Rework8 No Test Rework9 Rework Rework Rework Rework3 Rework4 Optimum Rework Yield Rework4 No Test No Rework Rework5 Rework6 Rework7 Rework8 Rework9 Rework Rework Rework Optimum Rework Yield Rework4 No Test Rework5 Rework6 Rework7 Rework8 Rework9 Rework Rework Rework Rework3 Rework4 Rework Number Rework Number Rework Number (a): C ft = $ and C fr = $ (b): C ft = $ and C fr = $ (c): C ft = $5 and C fr = $ Figure : Computed optimum feature parameter values for operations the process flow shown Figure. Various fixed test and rework costs used () and () assumed. optimum test locations and fault coverages aga differ from cases (a) and (b). Case (c) has expensive test and expensive rework. As a result, only 3 or possible test locations are used (Test, 3 and 4 only), however, rework is cluded with all three of these tests. Optimum Fault Coverag Test4 Removed Test5 Test6 Test7 Test8 Test9 Test Test Number Figure : Computed optimum fault coverage of test operations (C ft = $ and no rework). Test Test Test3 Test4 Yielded Cost ($) C ft = $ and no rework 3 C ft = $ and C fr = $ C ft = $5 and C fr = $ 37 C ft = $ and C fr = $ The optimization usg RCGAs for the process flow Figure takes less than Generation Number (N) Figure 3: Optimization of yielded cost Test Case 3 for various level of fixed cost of test and rework operations

10 seconds for generations, thus makg it an attractive option for complex electronic systems. 6. Summary This paper describes a framework for the optimization of Test/Diagnosis/Rework () location(s) and characteristics an electronic system manufacturg processes. A new search algorithm is developed and used to analyze complex process flows and to obta values of a multi-variable function with a stream of feature parameters cluded. An optimization modelg system with Real-Coded Genetic Algorithms (RCGAs) tegrated has been developed to optimize critical parameters and possible locations for general process flows. The methodology developed and demonstrated this paper guides the placement of operations practical manufacturg processes. The ability to optimize the operations can also be used as the feedback to DFT of the electronic systems showg which portion should be redesigned to accommodate the testg for a higher level of fault coverage and where there is less need for test to decrease the cost of products. References. T. W. Williams and N. C. Brown, "Defect Level as a Function of Fault Coverage," IEEE Trans. on Comp., vol. C-3, no., pp , December 98.. E. H. Volkerk, A. Khoche, L. A. Kamas, J. Revoir, and H. G. Kerkhoff, "Tacklg Test Trade-offs from Design, Manufacturg to Market Usg Economic Modelg," Proc. of Int. Test Conference, pp. 98-7, Nov.. 3. P. K. Nag, A. Gattiker, S. Wei, R. D. Blanton, and W. Maly, Modelg the Economics of Testg: A DFT Perspective, IEEE Design & Test of Comp., vol. 9, pp. 9-4, Jan/Feb. 4. C. Dislis, J. H. Dick, I. D. Dear, I. N. Azu, and A. P. Ambler, Economics modelg for the determation of test strategies for complex VLSI boards, Proc. of the Int. Test Conf., pp. -7, M. Tegethoff, and T. Chen, Defects, fault coverage, yield and cost, board manufacturg, Proc. of the Int. Test Conf., pp , M. Abadir, A. Parikh, L. Bal, P. Sandborn, and C. Murphy, High level test economics advisor, Journal of Electronic Testg: Theory and Applications, vol. 5, no. &3, pp. 95-6, T. Trichy, P. Sandborn, R. Raghavan, and S. Sahasrabudhe, A New Test/Diagnosis/Rework Model for Use Technical Cost Modelg of Electronic Systems Assembly, Proc. of Int. Test Conf., pp. 8-7,. 8. M. Driels and J. S. Klegka, Analysis of Alternative Rework Strategies for Prted Wirg Assembly Manufacturg Systems, IEEE Trans. on Components, Hybrids and Manufacturg Tech., vol. 4, pp , Sept B. Davis, The Economics of Automatic Testg, McGraw-Hill Book Company, P. Goel, Test Generation costs analysis and projections, Proc. of Design Automation Conference, pp , 98.. N. Rao, On Parallel Algorithms for Sgle- Fault Diagnosis Fault Propagation Graph Systems, IEEE Trans. on Parallel and Distributed Sys., vol. 7, pp. 7-3, Dec K. Choi and A. Chatterjee, Efficient Instruction-level Optimization Methodology for Low-Power Embedded Systems, Proc. of the 4 th Int. Symposium on System Synthesis, pp. 47-5,. 3. G. Chartrand and O. R. Oellermann, Applied and Algorithmic Graph Theory, McGraw-Hill, Inc., R.E. Tarjan, Depth-First Search and Lear Graph Algorithms, SIAM J. Computg, vol., no., pp.46-6, D. Becker and P. Sandborn, One the Use of Yielded cost Modelg Electronic Assembly Processes, IEEE Trans. on Electronics Packagg Manufacturg, vol. 4, pp. 95-, July. 6. R. L. Haupt, and S. E. Haupt, Practical Genetic Algorithms, Wiley, A. Oyama, S. Obayashi, and K. Nakahashi, Wg Design Usg Real-coded Adaptive Range Genetic Algorithm, Proceedgs of IEEE Int. Conf. on Systems, Man, and Cybernetics, vol. 4, pp , C. Z. Janikow and Z. Michalewicz, An Experimental Comparison of Bary and Floatg Pot Representations Genetic Algorithms, Proc. of the 4 th Int. Conference on Genetic Algorithms, pp. 3-36, A. H. Wright, Genetic Algorithms for Real Parameter Optimization, Foundations of Genetic Algorithms, Morgan Kaufmann Publishers, pp. 5-8, 99.