Routability Driven Modification Method of Monotonic Via Assignment for 2-layer Ball Grid Array Packages
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- Homer Warren Little
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1 Routablty Drven Modfcaton Method of Monotonc Va Assgnment for 2-layer Ball Grd Array Pacages Yoch Tomoa Atsush Taahash Department of Communcatons and Integrated Systems, Toyo Insttute of Technology S3 58 Ooayama, Meguro-u, Toyo, Japan e-mal: {yoch,atsush}@lab.ss.ttech.ac.p Abstract Ball Grd Array pacages n whch I/O pns are arranged n a grd array pattern realze a number of connectons between chps and a prnted crcut board, but t taes much tme n manual routng. We propose a fast routng method for 2-layer Ball Grd Array pacages to support desgners. Our method dstrbutes wres evenly on top layer and ncreases completon rato of nets by mprovng va assgnment teratvely. I. Introducton In current VLSI crcuts, there can be hundreds of requred I/O pns. Instead of Dual In-lne Pacage (DIP) or Quad Flat Pacage (QFP), n whch the number of avalable I/O pns s small, Ball Grd Array (BGA) pacages are used to realze a number of connectons between VLSI chps and prnted crcut boards (PCBs). Though there exst many approaches for routng and parts of them are ncluded n several tools, most tools are for routng on PCBs or VLSI chps. Most approaches proposed so far can not mmedately apply to BGA pacages routng whch contans specal requrements and constrants on BGA pacages snce t s hard to obtan a routng pattern as good as manual one. The structure of BGA pacages s symmetrc, and gven netlsts has some propertes. In current desgn, desgners generate routng patterns for BGA pacages by usng such propertes. So, we ntroduce now-how n manual routng nto our methods to obtan satsfactory routng pattern effcently. The frst approach for BGA pacage routng was proposed n [1] and was mproved n [2]. In these approaches, t s assumed that there s a sngle routng layer, and that a netlst s not gven. These approaches generate a netlst and a global route for each net. Each net connects a fnger and a ball. The obectve s to balance the congeston over the routng area and shorten the wre length of each net. Snce a netlst s usually gven n pacage routng desgn, these approaches are prmarly used for pacage archtecture desgn or flp-chp bondng desgn. For a gven netlst n two-layer BGA model, as shown n Fg. 1, global routng on layer 1 may be possble by usng these algorthms f a canddate of va postons s consdered as a ball. The feasblty of the global routes on layer 2, however, s not guaranteed. Algorthms for mult-layer Pn Grd Array (PGA) and BGA routng have been proposed n [3] and [4], respectvely. These algorthms frst assgn each net to a layer and then generate routes n each layer. However, nether the feasblty of the routes from the fnger of each net to the assgned layer nor the routes from the assgned layer to the ball of the net are guaranteed. These routes requre vas that are large compared to the wre wdth, and these algorthms omt the va assgnment plannng, whch s the most dffcult part of pacage routng. A va assgnment and global routng method for snglechp two-layer BGA pacages that consders total wre length and wre congeston have been proposed as the frst stage of pacage substrate routng n [5], and ths method has been mproved n [6]. In these papers, the concepts of monotonc global routng and monotonc va assgnment focusng manly on layer 1 are ntroduced. In the method, a va assgnment s teratvely mproved to mnmze the maxmum wre congeston on layer 1 whle the total wre length on layer 2 s ept to be small enough. Though the method acheves small total wre length and congeston, several enhancements are requred n order to use the method n actual pacage routng desgn. In the method, snce the va of a net s placed near the ball of the net, the wre of each net on layer 2 s short and the routng on layer 2 seems not to be dffcult. However, there s no guarantee that 100% routng on layer 2 s possble. Moreover, n pacage substrate, varous nds of obstacles exst. For example, mold gates from whch resn s poured nto the pacage are placed on layer 1. In the regon at whch a mold gate placed, routng on layer 1 s not allowed but routng on layer 2 s allowed. Mold gates mae t dffcult to generate 100% routng snce the va of a net may be placed away from ts ball f the ball s under a mold gate. Even f the evaluaton of a va assgnment by cost functon s better, t can not be adopted f 100% routng s mpossble. In ths paper, we propose a va assgnment and global routng method whch s an enhancement of the method proposed n [6]. In our proposed method, the maxmum wre congeston on layer 1 and the wre length of a net on layer 1 and layer 2 are mnmzed. Moreover, a global routng on layer 2 s generated n the fnal stage to guarantee the 100% routng f a feasble va assgnment s obtaned. Our method conssts of two phases. In the frst phase, a va assgnment s teratvely mproved to mnmze the maxmum wre congeston on layer 1 whle the total wre length on layer 2 s ept to be small enough. Though ths phase s based on the method proposed n [6], the computatonal complexty to obtan the maxmum gansmprovedfromo(n 2 )too(n), where N s the number of grd nodes. In the second phase, a va assgnment s teratvely mproved to mprove the routablty on layer 2 whle the maxmum wre congeston on layer 1 s mantaned. In ths phase, global routng on layer 2 s generated. New modfcaton to mprove the routablty on layer 2 whle mantanng the maxmum wre congeston on layer 1 s ntroduced. In our experments, our method obtans a va assgnment whch dstrbutes wres evenly faster than the method proposed n [6], and the routablty on layer 2 s drastcally mproved. II. Prelmnary A. Problem defnton In ths paper, we consder a basc model of BGA pacage as shown n Fg. 1. Our BGA pacage model has two routng layers and sngle chp whch s smaller than /08/$ IEEE 238
2 bondng wre bondng fnger chp bondng wre mold gate bondng fnger platng lead platng lead chp va layer 1 layer 1 to rng layer 2 y bondng fnger va solder ball chp n 1 n 7 n 27 dummy va v 7 b 7 3A-3 mold gate solder ball layer 2 solder ball Fg. 1. A model of 2-layer BGA pacage. Fg. 2. Bottom sector. x pacage sze. A bondng fnger, whch we wll refer to as a fnger, s connected to the chp by a bondng wre. Bondng fngers are placed on the permeter of a rectangle enclosng the chp on layer 1. A solder ball, whch we wll refer to as a ball, s an I/O pn of the pacage, and s connected to the PCB. Solder balls are placed n a grd array pattern on layer 2. There are connecton requrements between boundng fngers and solder balls. The connecton requrement s called a net, and s realzed by wresoneachlayerandvaswhchconnectwresondfferent layer. The number of vas to be placed n the area surrounded by four adacent balls s at most 1. Mold gates are n some corners of top layer to pour resn nto the pacage. In the regon at whch a mold gate placed, routng on layer 1 s not allowed but routng on layer 2 s allowed. Rng structure whch s used for electrc platng surrounds the pacage. Each net should be connected to the rng n order to enable electrc platng to protect ts wres. The extra connecton to the rng of a net s called a platng lead. The rng s cut when the pacage s used. A platng lead s redundant for operaton, but s normally used to reduce the fabrcaton cost and to mprove the relablty. The routng area of a pacage s usually dvded nto sectors. Our approach s appled to each sector. In the followng, we focus on the bottom sector as shown n Fg. 2. In ths paper, we assume that a net conssts of a fnger and a ball. Nets are labeled accordng to the order of fngers on the permeter from the left to the rght as n 1,n 2,n 3,... Snce the radus of a ball s large compared to the nterval of the balls, the number of possble routes between adacent balls on layer 2 s at most one. Therefore, routes on layer 2 should be short and most of platng leads should be routed on layer 1. For ths reason, we restrct the route of each net so that t has only one va, the wre on layer 1 connects the fnger of the net and the rng through the va of the net, and the wre on layer 2 connects the ball and the va of the net. The set of canddate locatons of vas whch nclude the locatons wthn a mold gate s represented by the va grd array N. The nterval of va grd array N s the same as that of the balls, and s unt length as shown n Fg. 2. An element n N s called a grd node. We assume the number of possble routes on layer 1 between two vas placed n adacent grd nodes under a desgn rule s at most h where h s the number of rows of balls. Theballandthevaofnetn are denoted by b and v, respectvely. The postons of b and v are denoted by (x b,yb )and(xv,yv ), respectvely. Let V be the set of vas of the nets. A va assgnment to N s represented by becton Φ : V E N,whereE s the set of dummy vas. horzontal grd lne v 1 v 2 v 5 v 6 v 3 v 4 n 1n 2 n 11 v 7 v 10 v 8 v 9 vertcal grd lne Fg. 3. A monotonc routng correspondng to a monotonc va assgnment. The routng problem for a two-layer BGA pacage s defned as follows: A routng problem for 2-layer BGA v 11 Input: Fngers, balls, and netlst (Connecton Requrements between fngers and balls) Output: A va assgnment Φ, correspondng routng on layer 1, and routng on layer 2 Obectve: Mnmze the total wre length and the maxmum wre congeston Constrant: All nets are realzed, and vas are placed out of mold gates. B. Monotonc va assgnment If the route of each net on layer 1 from ts fnger to the outer rng ntersects every horzontal grd lne only once, then the route s sad to be monotonc. Otherwse, t s sad to be non-monotonc. It s clear that a monotonc routng s possble for va assgnment Φ f and only f x v < x v s satsfed for any par of nets n and n (<)such that y v = y v. A va assgnment s sad to be monotonc f a monotonc routng of layer 1 s possble [5, 6]. Gven a monotonc va assgnment, monotonc routng on layer 1 s unquely determned. The va assgnment shown n Fg. 3 s monotonc, and ts routng s unque. For example, three vas v 5, v 6 and v 10 are assgned on mddle row n Fg. 3. The route of nets n 1,n 2,n 3,and n 4 n monotonc routng need to pass to the left of v 5 as shown n Fg. 3. C. Indces for Evaluaton of a va assgnment In ths secton, ndces of a va assgnment whch are used n the evaluaton of the va assgnment s explaned brefly. The number of wres on layer 1 between va v and the va above v s denoted by cut a (v). If no va exsts above v, cut a (v) s zero. Detals are explaned n [6]. The Man- 239
3 l m EXC EXC ROT MSEQ other route m l CEXC other route Fg. 4. Examples of three modfcatons. hattan dstance between va v and the ball of the net s denoted by d(v). The wre congeston of layer 1 between va v and the vatotheleftofv s denoted by densty l (v). That s, densty l (v) s the number of wres of layer 1 between them over the dstance between them. If no va exsts to the left of v and v s n the routng regon, then densty l (v) s the wre congeston of layer 1 between v and the left boundary of routng regon. If no va exsts to the left of v and v s wthn the mold gates, then densty l (v) s the number of wres of layer 1 whch pass to the left of v over the dstance between v and the left boundary of the sector. Smlarly, densty r (v) s defned. The balance of wre congeston of va v s denoted by F (v). That s, F (v) = densty l (v) densty r (v). The ndces defned above are also used n [6], and ther calculatons are dscussed n [6]. Whle, the ndces defned below are manly used to mprove the completon rato of nets whch are not used n [6]. The llegalty of va v s denoted by obs(v). That s, f v s on a mold gate, obs(v) =1. Otherwse,obs(v) =0. The volaton of wre congeston of layer 1 between va v and the left of v s denoted by vo l (v). That s, vo l (v) =max{densty l (v) C MAX, 0} where C MAX be the allowable wre congeston of layer 1. The total volaton s denoted by Δ. That s, Δ s the sum of volatons on a whole va grd array. The number of unconnected nets s denoted by U. The total wre length on layer 2 of connected nets s denoted by L. In order to evaluate U and L, the routng graph for layer 2 s defned and a rp-up and reroute method s used whch are explaned n Secton V. D. Modfcatons There are many ways to modfy a va assgnment. In ths paper, four smple modfcatons are used. (EXC) Two adacent vas on a vertcal grd lne are exchanged. (ROT) Three vas on a unt square on the va grd array are rotated. (MSEQ) Vas are moved to ther adacent grd nodes on a va grd array one by one untl reachng a grd node wthout a va n whch the drecton of every horzontal movement of vas s ether left or rght and that of every vertcal movement s ether above or below. (CEXC) Any two vas are exchanged. EXC, ROT, and MSEQ have been proposed n [5] to mprove the wre congeston of layer 1 whle eepng the Fg. 5. The change of routes by each exchange. wre length of layer 2 as small as possble. Examples of them are shown n Fg. 4. Whle, a CEXC s ntroduced here to mprove the routablty of layer 2 whle eepng the global structure of routng pattern of layer 1. See Fg. 5. EXC may drastcally change routes of layer 1 whle eepng the dstance between the va and the ball, whereas CEXC may mprove the routablty of layer 2 wthout changng routes of layer 1 drastcally f the number of wres of layer 1 between vas s small. III. Outlne of our method In our proposed method, an ntal monotonc va assgnment s generated by the method proposed n [5]. Then the ntal va assgnment s teratvely mproved. Our method conssts of two phases. In the frst phase, a va assgnment s teratvely mproved under the monotonc condton to mnmze the maxmum wre congeston on layer 1 whle the total wre length on layer 2 s ept to be small enough. In the second phase, a va assgnment s teratvely mproved under the monotonc condton to mprove the routablty on layer 2 whle the maxmum wre congeston on layer 1 s mantaned. The frst phase s based on the method proposed n [6]. In ths phase, three types of modfcaton EXC, ROT, and MSEQ are used. In each teraton, a modfcaton wth the maxmum gan on EXCs, ROTs, and MSEQs s appled to the current va assgnment to mprove the total wre length and the wre congeston. Though the ntal va assgnment has vas placed on a obstacle, all vas are moved to routng regon n ths teratve modfcaton. In [6], t taes O( N 2 ) tme to fnd a MSEQ wth the maxmum gan. However, we show that t can be obtaned n O( N ). In the frst phase of our proposed method, each teraton taes only O( N ) tme. In the second phase, the va assgnment generated by the frst phase s teratvely modfed by CEXC whch s proposed here so that the maxmum wre congeston on layer 1 s mantaned and the routablty on layer 2 s mproved. In order to evaluate the routablty on layer 2, the routng graph correspondng to a routng problem on layer 2 s ntroduced, and routes are generated on t. In each teraton, an allowable CEXC wth the maxmum gan s appled. In order to fnd an allowable CEXC wth the maxmum gan, the routng correspondng to each CEXC needs to be generated. However t s not so tme consumng snce the routes are changed ncrementally and the most of routes are not changed even f CEXC s appled. IV. The frst phase A. Cost of a va assgnment The routng cost for monotonc va assgnment used n [6] s extended to move vas out of mold gate snce the ntal va assgnment may have vas on a mold gate. 240
4 The routng cost for monotonc va assgnment Φ, whch s denoted by COST 1 (Φ), s defned as follows: COST 1 (Φ) = v V(α 1 cut a (v)+β 1 d(v)+γ 1 F (v)+δ 1 obs(v)) where α 1, β 1, γ 1,andδ 1 are coeffcents. Note that δ 1 s set to much lager than the others n order to obtan a va assgnment where vas are out of mold gates. B. Improvement of the maxmum gan computaton In the frst phase of our method, a modfcaton wth the maxmum gan under the monotonc condton s selected and appled to the current va assgnment. The number of patterns on EXCs and ROTs s O( N ), whch s small enough to enumerate all the patterns, whle the number of patterns on MSEQs s exponental n the terms of the number of grd nodes. In order to fnd a MSEQ wth the maxmum gan n polynomal tme, the cost graphs are used. A cost graph s a drected acyclc graph (DAG), and has some sources and sns. All sources n the graph correspond to the start vas of MSEQs, and all sns n the graph correspond to the end dummy vas of MSEQs. Every drected path from source to sn corresponds to a MSEQ, and the length of the path corresponds to the gan onthemseq.thetypeofanmseqsetherabove-left, above-rght, below-left, or below-rght snce the drectons are restrcted. A MSEQ wth the maxmum gan s obtaned by generatng cost graphs for each type and searchng a longest path on the graphs. In [6], the cost graph for every MSEQ begnnng wth a va s constructed and a longest path n each cost graph s obtaned. A longest path of DAG can be obtaned n O(n+m), where n and m are the numbers of vertces and edges, respectvely. Snce the numbers of vertces and edges n a cost graph for each va are O( N ), a longest path s obtaned n O( N ) for each cost graph. The maxmum gan on MSEQs can be obtaned n O( N 2 )snce the number of cost graphs s O( N ). In the followng, we show that the cost graphs begnnng wth dfferent vas can be combned. Snce ust four cost graphs are constructed where the numbers of vertces and edges are O( N ), an MSEQ wth the maxmum gan can be obtaned n O( N ). An MSEQ M s represented by a sequence of vas, where the last va s dummy. Let g(m) betheganofanmseqm that s defned by COST(Φ) COST(Φ ), where Φ s the va assgnment obtaned from Φ by applyng M. For any MSEQ M, g(m) can be represented as the sum of local gans g M (v), where v s a va contaned n M. g M (v) can be calculated f the subsequence of M whch conssts of four vas around v s nown, as descrbed n [5]. Namely, even f two MSEQs M 1 and M 2 begn wth dfferent vas, g M1 (v) andg M2 (v) are the same f the subsequences of M 1 and M 2 around v are the same. Each vertex of a cost graph s labeled by the sequence of three vas. In a cost graph, a subsequence (v pp,v p,v,v n ) of M corresponds to vertex (v pp,v p,v), vertex (v p,v,v n ), and the edge between them wth weght g M (v), where v n s the next va of v n M, v p s the prevous va of v n M, and v pp s the prevous va of v p n M. Note that only v n s allowed to be dummy. The algorthm of the above-rght type cost graph constructon s shown n Fg. 6. In a cost graph, the number of vertces n whch v s the last element of label s at most ConstructCostGraph(A va assgnment Φ) X V E C the set of vas s.t. no va n X exsts n above-rght of them whle C do select v from C Let v n bethevaaboveortotherghtofv Let v p be the va lower or to the left of v Let v pp be the va lower or to the left of v p f v s dummy then generate feasble vertces (,v p,v)and(v pp,v p,v) else f (,v,v n)exststhen generate (,,v) generate an edge from (,,v)to(,v,v n) f (v p,v,v n)exststhen generate feasble vertces (,v p,v)and(v pp,v p,v) generate edges from these vertces to (v p,v,v n) X X\{v} C the set of vas s.t. no va n X exsts n above-rght of them done Fg. 6. Algorthm of graph constructon for above-rght drecton. L 2 L 1 S A 1 v B 1 v p B 2 v pp Fg. 7. Vas used to calculate g M (v ). R 1 v n seven. Note that a vertex s not generated f a va assgnment becomes non-monotonc when the modfcaton correspondng to the vertex s appled. The number of edges ncdent from a vertex s at most two. Therefore, the numbers of vertces and edges of a cost graph are O( N ). Forexample,nthevaassgnmentshownnFg.7,labels n whch v s the last element are (L 2,L 1,v), (S, L 1,v), (S, B 1,v), (B 2,B 1,v), (,L 1,v), (,B 1,v), and (,,v). The edges ncdent from (L 2,L 1,v)are(L 1,v,A 1 )and (L 1,v,R 1 ). Therefore, a modfcaton wth the maxmum gan on MSEQs can be obtaned n O( N ). V. The second phase 3A-3 Though a va s placed near ts ball n the output of the frst phase, all nets can not be connected f the va assgnment s bad. So, n the second phase, the va assgnment generated by the frst phase s teratvely modfed by CEXC to mprove the routablty of layer 2 whle the maxmum wre congeston on layer 1 s mantaned. A. Evaluaton of a va assgnment In the second phase, we use another cost defned here, snce the target s dfferent from the frst phase. The routablty mprovement has prorty snce a near optmal va assgnment s obtaned by frst phase. The cost of a va assgnment s defned as follows: COST 2 (Φ) = α 2 Δ+β 2 L + γ 2 U where α 2,β 2,andγ 2 are coeffcents. Note that γ 2 s set 241
5 ball vertex extra vertex (a) Wthout a va (b) Wth a va va vertex TABLE I The ntal cost. #net C D F OBS data data data data data Fg. 8. Routng subgraphs on layer 2. to much lager than the others n order to realze more nets. The total volaton Δ corresponds to the routablty on layer 1, whle the number of unconnected nets U corresponds to the routablty on layer 2. The total wre length L on layer 2 s used to decrease U. B. Routng graph on layer 2 The routng graph representng routng resource on layer 2 s constructed. The structure of t s changed dependng on a va assgnment. The routng graph has ball vertces, va vertces, and extra vertces. A ball vertex and a va vertex correspond to a ball and a va, respectvely. The number of routes ntersectng between two adacent balls s at most one snce ball radus s so bg. A subgraph of a routng graph n Fg. 8(a) corresponds to a grd n whch a ball exsts n each corner and to whch a va s not assgned. A subgraph of a routng graph n Fg. 8(b) correspondstoagrdtowhchavasassgned. A global routng on layer 2 s obtaned by usng a rpup and reroute technque on the routng graph. In each teraton of rp-up and reroute method, a shortest path of each net s sequentally generated on the routng graph regardng the routes of the other nets as obstacles. If the route of a net can not be found, then a shortest path s generated n the graph wthout other routes, and the routes of the other nets whch ntersect the found shortest path are rpped up. Whenever a route s rpped up, the weght of each vertex on the rpped up route and on the found shortest path s ncreased to avod teratons such as the routes of two nets are alternately generated and rpped up. The number of teraton of rp-up and reroute method s restrcted. Therefore, there are several unconnected nets f 100% routng can not be found n prespecfed tmes. In order to fnd an allowable CEXC wth the maxmum gan, a global routng on layer 2 s generated for each routng graph whch s obtaned by applyng an allowable CEXC. In the routng graph correspondng to an allowable CEXC, routes of two nets whose vas are exchanged have to be regenerated. However, most of routes apart from exchanged vas are not modfed. Therefore, the executon tme of a global routng on layer 2 n each teraton s not so large. C. Local modfcaton for routablty In the frst phase, the wre congeston s mnmzed effectvely by usng EXCs, ROTs, and MSEQs. In the second phase, routes on layer 1 should not be changed drastcally to mantan the qualty. So, n the second phase, a local modfcaton CEXC whch has hgh probablty on mprovng the routablty on layer 2 though the effect on routes on layer 1 s small s used. In CEXC, two vas are exchanged, but pars of vas to be exchanged are restrcted to be allowable. If CEXC satsfes the followng three condtons, then t s sad to be allowable. In each teraton, a CEXC wth the maxmum gan s selected among allowable CEXCs. Frst, CEXC s restrcted to satsfy the monotonc condton after t s appled. Second, CEXC s restrcted not to ncrease the maxmum wre congeston on layer 1. Let c and c be the maxmum wre congeston around v and v before they are exchanged and after they are exchanged, respectvely. If c C MAX, then CEXC s allowed only f c C MAX. Otherwse, CEXC s allowed only f c <c. Thrd, CEXC s restrcted so that the number of changed routes on layer 1 s small. Even f the dstance of v and v s large, the number of changed routes on layer 1 by exchangng v and v s small f s small. Therefore, the vas whch can be exchanged to v are restrcted as follows. If v s not a dummy va, then v can be exchanged to v only f If v s dummy a va, then v can be exchanged to the va of a net only f the route of the net passes near v. Formally, such nets are defned as follows: Let v l and v r be vas to the left and rght of dummy va v, respectvely. A net whose route passes near v s n ( 2 +2), where = l (xv r xv )+r (xv xv l ) x v r. xv l VI. Experments and Results We mplemented the proposed method n C++ language and appled t to several test cases whch has mold gates as shown n Fg. 2. The number of rows of balls s 4 n all data. The program ran on a personal computer wth a 3.4GHz CPU and 1 GB of memory. In our experment, the number of used edges on routng graph s used as the total wre length of routng on layer 2. α 1,β 1, γ 1,andα 2 are set to 1. δ 1 and γ 2 are set to much larger than the others. β 2 s set to 1 4 to balance each term, and that corresponds to the fact that the dstance between adacent two grd nodes s regarded as 1 snce the dstance on routng graph s 4. In addton, the teraton n each rp-up and reroute s restrcted to be 20 tmes. In the tables, C, D, F, and OBS are cut a (v), d(v), F (v), and obs(v), respectvely, and TOTAL s the sum of them. Δ s the volatons of the wre congeston. L s the wre length and U s the number of unconnected nets for routng on layer 2. OLD s the executon tme of the method proposed n [6], and PROP s the executon tme of our proposed method where the cost graph s mproved. The ntal cost of each data s shown n Table I. The outputs of the frst phase for most nputs are mproved drastcally as shown n Table II. Although the method proposed n [6] needs 45 second for data1, our proposed method obtans the dentcal output wthn 3 second by mprovng the computatonal complexty of each teraton. Table III shows the result of the second phase. Though TOTAL of the second phase ncreases n comparson to that of the frst phase, the routablty s mproved. In ths experment, all nets are realzed n data2, data3, data4, and data5, and L gets lower than the output of the frst phase n all data. The total volatons on layer 1 are reduced by the second phase. The result wth volatons can not be used 242
6 TABLE II The result n the frst phase. COST 1 COST 2 #Modfcaton Executon tme [sec] C D F OBS TOTAL Δ L U EXC ROT MSEQ ALL OLD PROP data data data data data TABLE III The result n the second phase. COST 1 COST 2 #Modfcaton Executon tme [sec] C D F OBS TOTAL ( [%] ) Δ L U CEXC data (109.8) data (106.7) data (113.4) data (116.3) data (113.4) Fg. 9. The output routes of the frst phase for data4. as t s. However, even though the volatons stll exst, the result wth few volatons mght be acceptable n desgn scene. A few volatons would be elmnated easly by manual modfcatons and/or neglected by allowng to use a few narrow wre segments for non-crtcal parts and sgnals. The output of the frst phase for data4 s shown n Fg. 9, and the output of the second phase s shown n Fg. 10. Mold gates are not drawn n these fgures. In the second phase, routablty s mproved wthout changng the structure of global routng of layer 1 drastcally. VII. Concluson We showed that a modfcaton wth the maxmum gan s obtaned n O( N ), though t taes O( N 2 ) tmes n [6]. Moreover, we gave a routng graph for routng on layer 2, and a local modfcaton to mprove the routablty on layer 2 whle mantanng the maxmum wre congeston. In our experments, our method obtans a va assgnment whch dstrbutes wres evenly faster than the method proposed n [6], and the routablty on layer 2 s mproved drastcally. Our proposed method explores monotonc va assgnments effectvely, and a va assgnment whch guarantees 100% routablty on layer 2 s obtaned n most of test cases. On the other hand, our method does not realze all net n data1 where the output of the frst phase has many unconnected nets. In addton, though most wres are dstrbuted evenly, there exst places wth hgh wre congeston near mold gates. Ths s caused snce movng vas out of mold gates has prorty over mprovng or mantanng the wre congeston and the dstance between a va and a ball n the frst phase. These bad effects wll be relaxed f the ntal va assgnment n whch vas are placed out of a mold gate s created wth the routablty analyss, and the wre congeston on layer 1 can be mproved f a part of platng leads s realzed on layer 2. But, Fg. 10. The output routes of the second phase for data4. these are n our future wors. Moreover, we wll consder the method where parts of platng leads are realzed on layer 2. Acnowledgments Ths research was partally supported by Grant-n-Ad for Scentfc Research (C) ( ) and Grant-n-Ad for JSPS Fellows ( ). References [1] M.-F. Yu and W. W.-M. Da, Sngle-Layer Fanout Routng and Routablty Analyss for Ball Grd Arrays, n Proceedngs of Internatonal Conference Computer-Aded Desgn, pp , [2] S. Shbata, K. Ua, N. Togawa, M. Sato, and T. Ohtsu, A BGA Pacage Routng Algorthm on Setch Layout System, The ournal of Japan Insttute for Interconnectng and Pacagng Electronc Crcuts, vol. 12, no. 4, pp , (In Japanese). [3] C.-C. Tsa, C.-M. Wang, and S.-J. Chen, NEWS: A Net- Even-Wrng System for the Routng on a Multlayer PGA Pacage, IEEE Transactons on Computer-Aded Desgn of Integrated Crcuts and Systems, vol. 17, no. 2, pp , [4] S.-S. Chen, J.-J. Chen, C.-C. Tsa, and S.-J. Chen, An Even Wrng Approach to the Ball Grd Array Pacage Routng, n Proceedngs of Internatonal Conference on Computer Desgn, pp , [5] Y. Kubo and A. Taahash, A Va Assgnment and Global Routng Method for 2-Layer Ball Grd Array Pacages, IEICE Transactons on Fundamentals of Electroncs, Communcatons and Computer Scences, vol. E88-A, no. 5, pp , [6] Y. Kubo and A. Taahash, Global Routng by Iteratve Improvements for 2-Layer Ball Grd Array Pacages, IEEE Transactons on Computer-Aded Desgn of Integrated Crcuts and Systems (TCAD), vol. 25, no. 4, pp ,
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