Explore your design space including IBIS AMI models with Advanced Channel Simulation

Transcription

1 Explore your design space including IBIS AMI models with Advanced Channel Simulation Heidi Barnes Vincent Poisson Presenter: May, 2013

2 Agenda How good is my PHY? Channel Simulation Options Spice (Circuit Level Models) Numeric simulator (Block Level Behavioral Models) Channel Simulation best of both worlds? Understanding and Using Channel Simulation IBIS-AMI models Channel Simulation Typical Channel Simulations Sweep Parameters Crosstalk analysis Mid-Channel Simulation Jitter tolerance analysis Compliance test Conclusion

3 Agenda How good is my PHY? Channel Simulation Options Spice (Circuit Level Models) Numeric simulator (Block Level Behavioral Models) Channel Simulation best of both worlds? Understanding and Using Channel Simulation IBIS-AMI models Channel Simulation Typical Channel Simulations Sweep Parameters Crosstalk analysis Mid-Channel Simulation Jitter tolerance analysis Compliance test Conclusion

4 How Good is my PHY? Physical Layer Simulation Challenge

5 Simulation Options Circuit Simulation Spice w/convolution Pros Circuit level models DC/AC/Time Waveforms at all nodes Can include Technology Can include EM models Can include S-parameters Everyone speaks Spice Cons No DSP functionality Slow 10e6 bits/day or less Very limited BER capability No native Optical support Proprietary model encryption

6 Simulation Options System Simulation Pros DSP models and functions System Level Measurements Can be fast Can be used to generate C++ Language based models Electrical + Optical Flexible Cons Few circuit models Difficult to include Technology Limited BER capability Can be slow Many different kinds non standard models System Engineer centric

7 Simulation Options Channel Simulation Pros Waveforms/BER/Bathtubs DSP capability Fast to Extremely Fast Can include EM models Can include S-parameters Linear circuit models Easy to explore DSP vs. Channel Cons Requires specialized TX/RX modeling (IBIS-AMI) Some unfamiliar DSP concepts Evolving standard

8 Agenda How good is my PHY? Channel Simulation Options Spice (Circuit Level Models) Numeric simulator (Block Level Behavioral Models) Channel Simulation best of both worlds? Understanding and Using Channel Simulation IBIS-AMI models Channel Simulation Typical Channel Simulations Sweep Parameters Crosstalk analysis Mid-Channel Simulation Jitter tolerance analysis Compliance test Conclusion

9 Understanding and Using Channel Simulation IBIS-AMI models and the Channel Simulator Channel Simulation is best covered in two topics: 1. IBIS-AMI models, which are necessary to represent TX, RX and Mid-channel functions in a Channel Simulation 2. Channel Simulation as a technique how does it work and what are the benefits?

10 IBIS-AMI - What is It? AMI stands for Algorithmic Modeling Interface. AMI was the main addition to the IBIS specification in version 5.0. Extension from analog-only buffers to Algorithmic Modeling: equalizers, CDR, etc. The IBIS AMI Connection AMI models are extensions to IBIS models: transmitters are defined within the output or enabled I/O IBIS models; receivers are defined within the input, terminators or disabled I/O IBIS models. As for all IBIS components, description starts with an IBIS text file (xxxxx.ibs). An IBIS [Model] may include a new section [Algorithmic Model]. [End Algorithmic Model]. That section provides details that point to the external files describing and executing the AMI model.

11 IBIS: Input/Output Buffer Information Specification IBIS Open Forum is an organization developing industry standards IBIS 5.0 ratified August 2008 adds an Algorithmic Modeling Interface (AMI) flow as an alternate to the traditional flow Agilent supports IBIS: Two Agilent experts serve on IBIS Open Forum SystemVue AMI Modeling Kit for AMI model builders (typically IC vendors) Channel Simulator in ADS Transient Convolution for model users (both IC vendors and OEMs)

12 What Does IBIS AMI Flow Offer? Portability & IP Protection: One IC model runs in many EDA tools, without the need for non-portable, proprietary encryption keys Interoperability: IC Vendor A IC Vendor B Performance: Ultralow BER contours in seconds not days Flexibility: Simulator has statistical and bit-by-bit ( time domain ) modes Models can have LTI and/or NLTV algorithms IC vendor can expose arbitrary model-parameters Optimization: Simulator can sweep modelspecific parameters quickly

13 Channel Simulation with IBIS AMI Enables Low BER ~10-3 ~10-6 ~ hours 12 minutes 40 seconds Low BER simulations are achieved in seconds not hours, enabling efficient design topology exploration and optimization.

14 Channel Simulator Methodology 1. Step response is calculated for Channel 2a. Bit by bit mode : Superposition of bits ISI 2b. Statistical mode : Statistical techniques A full transient simulation is used for this step highly accurate Ref: Fangyi Rao, Vuk Borich, Henock Abebe, Ming Yan. Rigorous Modeling of Transmit Jitter for Accurate and Efficient Statistical Eye Simulation, DesignCon 2010

15 Typical Channel Simulation results Eye Performances BER contour Bathtub curves

16 STRADA Whisper 11.5 System (w/ Cables) Verification of Simulated data Short, High-Quality Channel Eyes measured with Scope S-parameters measured and run in fast statistical simulators Scope ADS Overlay (Red Contour) Height: 33% Width: 63% Height: 40% Width: 74% Special thanks to Chad Morgan, TE Connectivity for providing measured and simulated data for STRADA Whisper and HM-Zd backplanes 6.25 Gbps PRBS Contour 12.5 Gbps PRBS Contour Height: Closed Width: Closed Height: 6% Width: 28%

17 Agenda How good is my PHY? Channel Simulation Options Spice (Circuit Level Models) Numeric simulator (Block Level Behavioral Models) Channel Simulation best of both worlds? Understanding and Using Channel Simulation IBIS-AMI models Channel Simulation Typical Channel Simulations Design Space exploration with swept parameters Crosstalk analysis Mid-Channel Simulation Jitter tolerance analysis Compliance test Conclusion

18 Design Space exploration with swept parameters Transmitter Taps Components DataRate Receiver Equalization Process Parameters Physical constraints

19 Results of a AMI Parameter Sweep Slider with marker m1 used to select data for a specific EQ tap value

20 Crosstalk Simulation Agressor Xtlk Signal Path Agressor No Xtlk Tx AMI model can be used as both victim Tx and aggressor Tx. Rx AMI model can be used as both victim Rx and aggressor Rx. Victim and aggressor channels can have different data rates and bit patterns.

21 Measurement Waveform Bridge ADS Channel Simulation Waveform Output Export to Infiniiview ADS Eye Diagram Export to FlexDCA

22 USB3 Compliance Testbench Jitter tolerance Tx 5Gbps + Jitter 50MHz/40ps Jitter Decomposition Time Interval Error, Bathtub curves Export waveform to Infiniiview and get access to EZJIT and Test compliance

23 Post-Layout DDR3 Test Bench with Infiniium Test Compliance WaveformBridge enables the same Compliance Test Verification for both measured and simulated data for improved correlation and converging terminology.

24 Instrument Test Compliance Application Requires a Valid Read/Write Pre-Amble for the Data Burst Pre-Amble DQS Tri-State then High then Low Figure 3: Pattern Generation Figure 4: Pattern Generation Sub-circuit

25 Infiniium DDR3 Test Compliance Application Test Compliance Application set to use stored off-line Data

26 Test Compliance Application Report

27 Agenda How good is my PHY? Channel Simulation Options Spice (Circuit Level Models) Numeric simulator (Block Level Behavioral Models) Channel Simulation best of both worlds? Understanding and Using Channel Simulation IBIS-AMI models Channel Simulation Typical Channel Simulations Design Space exploration with swept parameters Crosstalk analysis Mid-Channel Simulation Jitter tolerance analysis Compliance test Conclusion

28 Conclusion Channel simulation of SERDES with the IBIS AMI flow offers many advantages over other techniques including interoperability, portability, performance, flexibility, optimization, and IP protection. We expect it to become the gold standard in chip-to-chip link simulation in the future. Without Eq With Eq If you d like to try this technique on your project, feel free to ask for an evaluation license on you feedback form!