Fast Tessellated Rendering on Fermi GF100. HPG 2010 Tim Purcell

Transcription

1 Fast Tessellated Rendering on Fermi GF100 HPG 2010 Tim Purcell

2 Outline DX10 state of the art DX11 tessellation Fermi GF100 architecture Results Demo 2

3 State of the Art: DX10 pipeline Input Assembler Vertex Shader Geometry Shader izer/ Interpolator Pixel Shader Image from Far Cry 2, courtesy of Ubisoft Output Merger Pixels are meticulously shaded 3

4 State of the Art: DX10 pipeline Image from Far Cry 2, courtesy of Ubisoft Pixels are meticulously shaded, but geometric detail is modest 4

5 Tessellation in DirectX 11 From input assembly Hull shader Computes the tessellation factor Runs pre-expansion Explicitly parallel across control points Control points Vertex Patch Assembly Hull Domain Primitive Assembly Geometry

6 Tessellation in DirectX 11 From input assembly Fixed function tessellation stage Configured by LOD output from Hull Shader Produces triangles and lines Control points Vertex Patch Assembly Hull Domain Primitive Assembly Geometry

7 Tessellation in DirectX 11 From input assembly Domain shader Runs post-expansion Maps (u,v) to (x,y,z,w) Implicitly parallel Vertex Patch Assembly Hull Control points Domain Primitive Assembly Geometry

8 Crossbar Primitive Distributor NVIDIA DX10 Logical Pipeline 8 Dataflow Vertex Shader Geometry Shader Pixel Shader

9 DX10 Logical Pipeline + Tessellation Primitive Distributor TS TS TS TS TS TS TS TS Tessellation Shader (includes Hull Shader,, and Domain Shader) Dataflow Crossbar 9

10 Problems With DX10 + Tess. (1) Data expansion in TS can lead to excessive buffering requirements after Have to drain 0 before 1 to maintain API ordering TS 0 TS n 0 n 10

11 Problems With DX10 + Tess. (2) limited prim rate TS 0 TS 1 TS n Already a problem for CPU-generated geometry Tessellation generates even more primitives 0 1 n / 0 m 11

12 Crossbar Primitive Distributor Work Distribution Crossbar Crossbar Task Distributor Work Distribution Crossbar Fermi GF100 Logical Pipeline 12 Hull Shader Dataflow Domain Shader (includes Edge, izer, Zcull )

13 Crossbar Primitive Distributor Work Distribution Crossbar Crossbar Task Distributor Work Distribution Crossbar Fermi GF100 Logical Pipeline 13 Dataflow Polymorph (includes,, and )

14 Fermi GF100 Tessellation Features 1 Primitive Distributor Crossbar Task Distributor Task ~= Hull Shader output Control points plus tessellation factor Pre-expansion Distributes tasks for subsequent geometry processing Expand patch into primitives Optional Reduces buffering requirements Task Distributor Work Distribution Crossbar Crossbar Work Distribution Crossbar 14

15 Fermi GF100 Tessellation Features 2 Parallel Includes clipping and culling Eliminate serialization point 15 Crossbar Primitive Distributor Work Distribution Crossbar Crossbar Task Distributor Work Distribution Crossbar

16 Fermi GF100 Tessellation Features 3 Primitive Distributor Crossbar Parallel ization Including Edge, ization, and Zcull Improved primitive throughput Multiple primitives per clock Screen mapped for load balancing Task Distributor Work Distribution Crossbar Work Distribution Crossbar Crossbar 16

17 Screen Mapped ization A B izer 0 izer 1 izer 2 izer 3 Each block is a tile of pixels izers uniquely own pixel tiles Note: small primitives can overlap multiple tiles 17

18 Challenge: Maintaining API Order Primitive Distributor Crossbar Parallelization is easy Maintaining API ordering is a challenge Work Distribution Crossbar (WDX) Similar to Pomegranate [Eldridge et al. 2000] Task Distributor Work Distribution Crossbar Work Distribution Crossbar Crossbar 18

19 Work Distribution Crossbar OWDX SWDX Uses primitive bounding box to determine which rasterizers get which primitives reconstructs API order izers uniquely own pixels No subsequent sorting for ordering required OWDX SWDX OWDX Work Distribution Crossbar SWDX OWDX SWDX OWDX SWDX 19

20 Handling Load Imbalance Load imbalance is a concern for all region-based architectures because they are non adaptive Static imbalance Different screen regions get differing amounts of work Mitigated by relatively small pixel tiles Dynamic imbalance Lots of tiny primitives in same screen region at the same time Mitigated by buffering We can only buffer so much 20

21 Results 21

22 M tris/sec Historical Triangle Rate GF Jan-00 Jan-01 Jan-02 Jan-03 Jan-04 Jan-05 Jan-06 Jan-07 Jan-08 Jan-09 Jan-10 Chip Release 22

23 Triangles per clock Results Synthetic Performance Test Z + per-vertex color Z-only Triangle Size (pixels) 23

24 Results Island Demo Frame average of 1.94 triangles per clock 24

25 Results Unigine Heaven 2.34 triangles per clock in highly tessellated areas 25

26 Demo Time 26

27 Summary Tessellation Increases geometric realism without burdening the CPU Fermi GF100 is designed for tessellation Eliminates serialization points Dramatically improved primitive throughput Next-generation visual fidelity 27

28 Acknowledgements Steve Molnar Ziyad Hakura Andreas Dietrich (demo help) Entire Fermi GF100 team 28

29 Questions? 29