# Standard Forms of Expression. Minterms and Maxterms

Size: px
Start display at page:

Transcription

1 Standard Forms of Expression Minterms and Maxterms

2 Standard forms of expressions We can write expressions in many ways, but some ways are more useful than others A sum of products (SOP) expression contains: Only OR (sum) operations at the outermost level Each term that is summed must be a product of literals f(x,y,z) = y + x yz + xz The advantage is that any sum of products expression can be implemented using a two-level circuit literals and their complements at the 0th level AND gates at the first level a single OR gate at the second level This diagram uses some shorthands NOT gates are implicit literals are reused this is not okay in LogicWorks! CS231 Minterms & Maxterms 2

3 Minterms A minterm is a special product of literals, in which each input variable appears exactly once. A function with n variables has 2 n minterms (since each variable can appear complemented or not) A three-variable function, such as f(x,y,z), has 2 3 = 8 minterms: x y z x y z x yz x yz xy z xy z xyz xyz Each minterm is true for exactly one combination of inputs: Minterm Is true when Shorthand x y z x=0, y=0, z=0 m 0 x y z x=0, y=0, z=1 m 1 x yz x=0, y=1, z=0 m 2 x yz x=0, y=1, z=1 m 3 xy z x=1, y=0, z=0 m 4 xy z x=1, y=0, z=1 m 5 xyz x=1, y=1, z=0 m 6 xyz x=1, y=1, z=1 m 7 CS231 Minterms & Maxterms 3

4 Sum of minterms form Every function can be written as a sum of minterms, which is a special kind of sum of products form The sum of minterms form for any function is unique If you have a truth table for a function, you can write a sum of minterms expression just by picking out the rows of the table where the function output is 1. x y z f(x,y,z) f (x,y,z) f = x y z + x y z + x yz + x yz + xyz = m 0 + m 1 + m 2 + m 3 + m 6 = Σm(0,1,2,3,6) f = xy z + xy z + xyz = m 4 + m 5 + m 7 = Σm(4,5,7) f contains all the minterms not in f CS231 Minterms & Maxterms 4

5 The dual idea: products of sums Just to keep you on your toes... A product of sums (POS) expression contains: Only AND (product) operations at the outermost level Each term must be a sum of literals f(x,y,z) = y (x + y + z ) (x + z) Product of sums expressions can be implemented with two-level circuits literals and their complements at the 0th level OR gates at the first level a single AND gate at the second level Compare this with sums of products CS231 Minterms & Maxterms 5

6 Maxterms A maxterm is a sum of literals, in which each input variable appears exactly once. A function with n variables has 2 n maxterms The maxterms for a three-variable function f(x,y,z): x + y + z x + y + z x + y + z x + y + z x + y + z x + y + z x + y + z x + y + z Each maxterm is false for exactly one combination of inputs: Maxterm Is false when Shorthand x + y + z x=0, y=0, z=0 M 0 x + y + z x=0, y=0, z=1 M 1 x + y + z x=0, y=1, z=0 M 2 x + y + z x=0, y=1, z=1 M 3 x + y + z x=1, y=0, z=0 M 4 x + y + z x=1, y=0, z=1 M 5 x + y + z x=1, y=1, z=0 M 6 x + y + z x=1, y=1, z=1 M 7 CS231 Minterms & Maxterms 6

7 Product of maxterms form Every function can be written as a unique product of maxterms If you have a truth table for a function, you can write a product of maxterms expression by picking out the rows of the table where the function output is 0. (Be careful if you re writing the actual literals!) x y z f(x,y,z) f (x,y,z) f = (x + y + z)(x + y + z )(x + y + z ) = M 4 M 5 M 7 = ΠM(4,5,7) f = (x + y + z)(x + y + z )(x + y + z) (x + y + z )(x + y + z) = M 0 M 1 M 2 M 3 M 6 = ΠM(0,1,2,3,6) f contains all the maxterms not in f CS231 Minterms & Maxterms 7

8 Minterms and maxterms are related Any minterm m i is the complement of the corresponding maxterm M i Minterm Shorthand Maxterm Shorthand x y z m 0 x y z m 1 x yz m 2 x yz m 3 xy z m 4 xy z m 5 xyz m 6 xyz m 7 x + y + z M 0 x + y + z M 1 x + y + z M 2 x + y + z M 3 x + y + z M 4 x + y + z M 5 x + y + z M 6 x + y + z M 7 For example, m 4 = M 4 because (xy z ) = x + y + z CS231 Minterms & Maxterms 8

9 Converting between standard forms We can convert a sum of minterms to a product of maxterms From before f = Σm(0,1,2,3,6) and f = Σm(4,5,7) = m 4 + m 5 + m 7 complementing (f ) = (m 4 + m 5 + m 7 ) so f = m 4 m 5 m 7 [ DeMorgan s law ] = M 4 M 5 M 7 [ By the previous page ] = ΠM(4,5,7) In general, just replace the minterms with maxterms, using maxterm numbers that don t appear in the sum of minterms: f = Σm(0,1,2,3,6) = ΠM(4,5,7) The same thing works for converting from a product of maxterms to a sum of minterms CS231 Minterms & Maxterms 9

10 Summary so far So far: A bunch of Boolean algebra trickery for simplifying expressions and circuits The algebra guarantees us that the simplified circuit is equivalent to the original one Introducing some standard forms and terminology Next: An alternative simplification method We ll start using all this stuff to build and analyze bigger, more useful, circuits CS231 Minterms & Maxterms 10

11 Product of Sums If f(x, y, z) = sum of minterms (0, 1, 4, 5), represent f as a product of maxterms A: product of maxterms(2, 3) B: product of maxterms(2, 3, 6, 7) C: product of maxterms(0, 1, 4, 5) D: product of maxterms(5, 6, 7) 11

12 Product of Sums If f(x, y, z) = sum of minterms (0, 1, 4, 5), represent f as a product of maxterms A: product of maxterms(2, 3) B: product of maxterms(2, 3, 6, 7) C: product of maxterms(0, 1, 4, 5) D: product of maxterms(5, 6, 7) 12

### Review: Standard forms of expressions

Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can be combined to form complex expressions, which can

### Philadelphia University Faculty of Information Technology Department of Computer Science. Computer Logic Design. By Dareen Hamoudeh.

Philadelphia University Faculty of Information Technology Department of Computer Science Computer Logic Design By Dareen Hamoudeh Dareen Hamoudeh 1 Canonical Forms (Standard Forms of Expression) Minterms

### S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017

S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017 Karnaugh Map Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and

### Boolean algebra. June 17, Howard Huang 1

Boolean algebra Yesterday we talked about how analog voltages can represent the logical values true and false. We introduced the basic Boolean operations AND, OR and NOT, which can be implemented in hardware

### Circuit analysis summary

Boolean Algebra Circuit analysis summary After finding the circuit inputs and outputs, you can come up with either an expression or a truth table to describe what the circuit does. You can easily convert

### Computer Organization

Computer Organization (Logic circuits design and minimization) KR Chowdhary Professor & Head Email: kr.chowdhary@gmail.com webpage: krchowdhary.com Department of Computer Science and Engineering MBM Engineering

### CS February 17

Discrete Mathematics CS 26 February 7 Equal Boolean Functions Two Boolean functions F and G of degree n are equal iff for all (x n,..x n ) B, F (x,..x n ) = G (x,..x n ) Example: F(x,y,z) = x(y+z), G(x,y,z)

### Bawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University

Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of

### Experiment 3: Logic Simplification

Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed El-Saied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions

### Menu. Algebraic Simplification - Boolean Algebra EEL3701 EEL3701. MSOP, MPOS, Simplification

Menu Minterms & Maxterms SOP & POS MSOP & MPOS Simplification using the theorems/laws/axioms Look into my... 1 Definitions (Review) Algebraic Simplification - Boolean Algebra Minterms (written as m i ):

### Basic circuit analysis and design. Circuit analysis. Write algebraic expressions or make a truth table

Basic circuit analysis and design Circuit analysis Circuit analysis involves figuring out what some circuit does. Every circuit computes some function, which can be described with Boolean expressions or

### Unit-IV Boolean Algebra

Unit-IV Boolean Algebra Boolean Algebra Chapter: 08 Truth table: Truth table is a table, which represents all the possible values of logical variables/statements along with all the possible results of

### Lecture 5. Chapter 2: Sections 4-7

Lecture 5 Chapter 2: Sections 4-7 Outline Boolean Functions What are Canonical Forms? Minterms and Maxterms Index Representation of Minterms and Maxterms Sum-of-Minterm (SOM) Representations Product-of-Maxterm

### Digital Logic Lecture 7 Gate Level Minimization

Digital Logic Lecture 7 Gate Level Minimization By Ghada Al-Mashaqbeh The Hashemite University Computer Engineering Department Outline Introduction. K-map principles. Simplification using K-maps. Don t-care

### Chapter 2. Boolean Expressions:

Chapter 2 Boolean Expressions: A Boolean expression or a function is an expression which consists of binary variables joined by the Boolean connectives AND and OR along with NOT operation. Any Boolean

### CMPE223/CMSE222 Digital Logic

CMPE223/CMSE222 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum Product-of-Sums Forms, Incompletely Specified Functions Terminology For a given term, each

### Spring 2010 CPE231 Digital Logic Section 1 Quiz 1-A. Convert the following numbers from the given base to the other three bases listed in the table:

Section 1 Quiz 1-A Convert the following numbers from the given base to the other three bases listed in the table: Decimal Binary Hexadecimal 1377.140625 10101100001.001001 561.24 454.3125 111000110.0101

### DKT 122/3 DIGITAL SYSTEM 1

Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits

### ECE380 Digital Logic

ECE38 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum Product-of-Sums Forms, Incompletely Specified Functions Dr. D. J. Jackson Lecture 8- Terminology For

### QUESTION BANK FOR TEST

CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice

### Chapter 2 Combinational Logic Circuits

Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard

### Lecture 4: Implementation AND, OR, NOT Gates and Complement

EE210: Switching Systems Lecture 4: Implementation AND, OR, NOT Gates and Complement Prof. YingLi Tian Feb. 13, 2018 Department of Electrical Engineering The City College of New York The City University

### Gate-Level Minimization. BME208 Logic Circuits Yalçın İŞLER

Gate-Level Minimization BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Complexity of Digital Circuits Directly related to the complexity of the algebraic expression we use to

### Chapter 2: Combinational Systems

Uchechukwu Ofoegbu Chapter 2: Combinational Systems Temple University Adapted from Alan Marcovitz s Introduction to Logic and Computer Design Riddle Four switches can be turned on or off. One is the switch

### Combinational Logic Circuits

Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical

### ELCT201: DIGITAL LOGIC DESIGN

ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter

### BOOLEAN ALGEBRA. 1. State & Verify Laws by using :

BOOLEAN ALGEBRA. State & Verify Laws by using :. State and algebraically verify Absorption Laws. (2) Absorption law states that (i) X + XY = X and (ii) X(X + Y) = X (i) X + XY = X LHS = X + XY = X( + Y)

### ENGIN 112. Intro to Electrical and Computer Engineering

ENIN 2 Intro to Electrical and Computer Engineering Lecture 6 More Boolean Algebra ENIN2 L6: More Boolean Algebra September 5, 23 A B Overview Epressing Boolean functions Relationships between algebraic

### 2/8/2017. SOP Form Gives Good Performance. ECE 120: Introduction to Computing. K-Maps Can Identify Single-Gate Functions

University of Illinois at Urbana-Champaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing Two-Level Logic SOP Form Gives Good Performance s you know, one can use a K-map

### 2.6 BOOLEAN FUNCTIONS

2.6 BOOLEAN FUNCTIONS Binary variables have two values, either 0 or 1. A Boolean function is an expression formed with binary variables, the two binary operators AND and OR, one unary operator NOT, parentheses

### Gate Level Minimization Map Method

Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically

### 1. Mark the correct statement(s)

1. Mark the correct statement(s) 1.1 A theorem in Boolean algebra: a) Can easily be proved by e.g. logic induction b) Is a logical statement that is assumed to be true, c) Can be contradicted by another

### Announcements. Chapter 2 - Part 1 1

Announcements If you haven t shown the grader your proof of prerequisite, please do so by 11:59 pm on 09/05/2018 (Wednesday). I will drop students that do not show us the prerequisite proof after this

### UNIT-4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable.

UNIT-4 BOOLEAN LOGIC Boolean algebra is an algebra that deals with Boolean values((true and FALSE). Everyday we have to make logic decisions: Should I carry the book or not?, Should I watch TV or not?

### Chapter 2 Boolean algebra and Logic Gates

Chapter 2 Boolean algebra and Logic Gates 2. Introduction In working with logic relations in digital form, we need a set of rules for symbolic manipulation which will enable us to simplify complex expressions

### Simplification of Boolean Functions

Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.

### Chapter 3. Gate-Level Minimization. Outlines

Chapter 3 Gate-Level Minimization Introduction The Map Method Four-Variable Map Five-Variable Map Outlines Product of Sums Simplification Don t-care Conditions NAND and NOR Implementation Other Two-Level

### Experiment 4 Boolean Functions Implementation

Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.

### Binary logic. Dr.Abu-Arqoub

Binary logic Binary logic deals with variables like (a, b, c,, x, y) that take on two discrete values (, ) and with operations that assume logic meaning ( AND, OR, NOT) Truth table is a table of all possible

### Code No: R Set No. 1

Code No: R059210504 Set No. 1 II B.Tech I Semester Supplementary Examinations, February 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science

### UNIT 2 BOOLEAN ALGEBRA

UNIT 2 BOOLEN LGEBR Spring 2 2 Contents Introduction Basic operations Boolean expressions and truth tables Theorems and laws Basic theorems Commutative, associative, and distributive laws Simplification

### CprE 281: Digital Logic

CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Minimization CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative

### Gate Level Minimization

Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch- Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 =

### ENGINEERS ACADEMY. 7. Given Boolean theorem. (a) A B A C B C A B A C. (b) AB AC BC AB BC. (c) AB AC BC A B A C B C.

Digital Electronics Boolean Function QUESTION BANK. The Boolean equation Y = C + C + C can be simplified to (a) (c) A (B + C) (b) AC (d) C. The Boolean equation Y = (A + B) (A + B) can be simplified to

### X Y Z F=X+Y+Z

This circuit is used to obtain the compliment of a value. If X = 0, then X = 1. The truth table for NOT gate is : X X 0 1 1 0 2. OR gate : The OR gate has two or more input signals but only one output

### Combinational Logic Circuits

Chapter 2 Combinational Logic Circuits J.J. Shann (Slightly trimmed by C.P. Chung) Chapter Overview 2-1 Binary Logic and Gates 2-2 Boolean Algebra 2-3 Standard Forms 2-4 Two-Level Circuit Optimization

### Chapter 6. Logic Design Optimization Chapter 6

Chapter 6 Logic Design Optimization Chapter 6 Optimization The second part of our design process. Optimization criteria: Performance Size Power Two-level Optimization Manipulating a function until it is

### Introduction to Boolean logic and Logical Gates

Introduction to Boolean logic and Logical Gates Institute of Statistics Fall 2014 We saw the importance of the binary number system for data representation in a computer system. We ll see that the construction

### Module -7. Karnaugh Maps

1 Module -7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or Sum-of-Minterms (SOM) 2.4 Canonical product of sum or Product-of-Maxterms(POM)

### Gate-Level Minimization

Gate-Level Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2011 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method

### Department of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 Combinational Logic

Department of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 Combinational Logic Question 1: Due October 19 th, 2009 A convenient shorthand for specifying

### IT 201 Digital System Design Module II Notes

IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.

### ELCT201: DIGITAL LOGIC DESIGN

ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter

### Code No: 07A3EC03 Set No. 1

Code No: 07A3EC03 Set No. 1 II B.Tech I Semester Regular Examinations, November 2008 SWITCHING THEORY AND LOGIC DESIGN ( Common to Electrical & Electronic Engineering, Electronics & Instrumentation Engineering,

### SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road QUESTION BANK (DESCRIPTIVE)

SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road 517583 QUESTION BANK (DESCRIPTIVE) Subject with Code : STLD(16EC402) Year & Sem: II-B.Tech & I-Sem Course & Branch: B.Tech

### Combinational Logic Circuits Part III -Theoretical Foundations

Combinational Logic Circuits Part III -Theoretical Foundations Overview Simplifying Boolean Functions Algebraic Manipulation Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables) Systematic

### Outcomes. Unit 9. Logic Function Synthesis KARNAUGH MAPS. Implementing Combinational Functions with Karnaugh Maps

.. Outcomes Unit I can use Karnaugh maps to synthesize combinational functions with several outputs I can determine the appropriate size and contents of a memory to implement any logic function (i.e. truth

### Permutation Matrices. Permutation Matrices. Permutation Matrices. Permutation Matrices. Isomorphisms of Graphs. 19 Nov 2015

9 Nov 25 A permutation matrix is an n by n matrix with a single in each row and column, elsewhere. If P is a permutation (bijection) on {,2,..,n} let A P be the permutation matrix with A ip(i) =, A ij

### Chapter 3 Simplification of Boolean functions

3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean

### ENGIN 112 Intro to Electrical and Computer Engineering

ENGIN 2 Intro to Electrical and Computer Engineering Lecture 8 Minimization with Karnaugh Maps Overview K-maps: an alternate approach to representing oolean functions K-map representation can be used to

### 2.1 Binary Logic and Gates

1 EED2003 Digital Design Presentation 2: Boolean Algebra Asst. Prof.Dr. Ahmet ÖZKURT Asst. Prof.Dr Hakkı T. YALAZAN Based on the Lecture Notes by Jaeyoung Choi choi@comp.ssu.ac.kr Fall 2000 2.1 Binary

### Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions

Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make

### LSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology

LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a

### 01 Introduction to Digital Logic. ENGR 3410 Computer Architecture Mark L. Chang Fall 2008

Introduction to Digital Logic ENGR 34 Computer Architecture Mark L. Chang Fall 28 Acknowledgements Patterson & Hennessy: Book & Lecture Notes Patterson s 997 course notes (U.C. Berkeley CS 52, 997) Tom

### DSAS Laboratory no 4. Laboratory 4. Logic forms

Laboratory 4 Logic forms 4.1 Laboratory work goals Going from Boolean functions to Boolean forms. Logic forms equivalence. Boolean forms simplification. Shannon s theorems. Representation in NAND and NOR

### Standard Boolean Forms

Standard Boolean Forms In this section, we develop the idea of standard forms of Boolean expressions. In part, these forms are based on some standard Boolean simplification rules. Standard forms are either

### Chapter 3. Boolean Algebra and Digital Logic

Chapter 3 Boolean Algebra and Digital Logic Chapter 3 Objectives Understand the relationship between Boolean logic and digital computer circuits. Learn how to design simple logic circuits. Understand how

### Gate-Level Minimization

Gate-Level Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method

### CSCI 220: Computer Architecture I Instructor: Pranava K. Jha. Simplification of Boolean Functions using a Karnaugh Map

CSCI 22: Computer Architecture I Instructor: Pranava K. Jha Simplification of Boolean Functions using a Karnaugh Map Q.. Plot the following Boolean function on a Karnaugh map: f(a, b, c, d) = m(, 2, 4,

### R.M.D. ENGINEERING COLLEGE R.S.M. Nagar, Kavaraipettai

L T P C R.M.D. ENGINEERING COLLEGE R.S.M. Nagar, Kavaraipettai- 601206 DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EC8392 UNIT - I 3 0 0 3 OBJECTIVES: To present the Digital fundamentals, Boolean

### Digital logic fundamentals. Question Bank. Unit I

Digital logic fundamentals Question Bank Subject Name : Digital Logic Fundamentals Subject code: CA102T Staff Name: R.Roseline Unit I 1. What is Number system? 2. Define binary logic. 3. Show how negative

### CS470: Computer Architecture. AMD Quad Core

CS470: Computer Architecture Yashwant K. Malaiya, Professor malaiya@cs.colostate.edu AMD Quad Core 1 Architecture Layers Building blocks Gates, flip-flops Functional bocks: Combinational, Sequential Instruction

### Gate-Level Minimization

MEC520 디지털공학 Gate-Level Minimization Jee-Hwan Ryu School of Mechanical Engineering Gate-Level Minimization-The Map Method Truth table is unique Many different algebraic expression Boolean expressions may

### A B AB CD Objectives:

Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3

### Definitions. 03 Logic networks Boolean algebra. Boolean set: B 0,

3. Boolean algebra 3 Logic networks 3. Boolean algebra Definitions Boolean functions Properties Canonical forms Synthesis and minimization alessandro bogliolo isti information science and technology institute

### CS8803: Advanced Digital Design for Embedded Hardware

CS883: Advanced Digital Design for Embedded Hardware Lecture 2: Boolean Algebra, Gate Network, and Combinational Blocks Instructor: Sung Kyu Lim (limsk@ece.gatech.edu) Website: http://users.ece.gatech.edu/limsk/course/cs883

### Variable, Complement, and Literal are terms used in Boolean Algebra.

We have met gate logic and combination of gates. Another way of representing gate logic is through Boolean algebra, a way of algebraically representing logic gates. You should have already covered the

### Digital Design. Chapter 4. Principles Of. Simplification of Boolean Functions

Principles Of Digital Design Chapter 4 Simplification of Boolean Functions Karnaugh Maps Don t Care Conditions Technology Mapping Optimization, Conversions, Decomposing, Retiming Boolean Cubes for n =,

### Karnaugh Map (K-Map) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using K-map

Karnaugh Map (K-Map) Ch. 2.4 Ch. 2.5 Simplification using K-map A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or

### Chapter 2 Combinational

Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic

### Final Examination (Open Katz, asynchronous & test notes only, Calculators OK, 3 hours)

Your Name: UNIVERSITY OF CALIFORNIA AT BERKELEY BERKELEY DAVIS IRVINE LOS ANGELES RIVERSIDE SAN DIEGO SAN FRANCISCO Department of Electrical Engineering and Computer Sciences SANTA BARBARA SANTA CRUZ CS

### Code No: R Set No. 1

Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2006 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems

### Computer Science. Unit-4: Introduction to Boolean Algebra

Unit-4: Introduction to Boolean Algebra Learning Objective At the end of the chapter students will: Learn Fundamental concepts and basic laws of Boolean algebra. Learn about Boolean expression and will

### Question Total Possible Test Score Total 100

Computer Engineering 2210 Final Name 11 problems, 100 points. Closed books, closed notes, no calculators. You would be wise to read all problems before beginning, note point values and difficulty of problems,

### Boolean Algebra. BME208 Logic Circuits Yalçın İŞLER

Boolean Algebra BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com 5 Boolean Algebra /2 A set of elements B There exist at least two elements x, y B s. t. x y Binary operators: +

### 數位系統 Digital Systems 朝陽科技大學資工系. Speaker: Fuw-Yi Yang 楊伏夷. 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象, 視之不可見者曰夷

數位系統 Digital Systems Department of Computer Science and Information Engineering, Chaoyang University of Technology 朝陽科技大學資工系 Speaker: Fuw-Yi Yang 楊伏夷 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象,

### Specifying logic functions

CSE4: Components and Design Techniques for Digital Systems Specifying logic functions Instructor: Mohsen Imani Slides from: Prof.Tajana Simunic and Dr.Pietro Mercati We have seen various concepts: Last

### Code No: R Set No. 1

Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems

### 3. According to universal addressing, what is the address of vertex d? 4. According to universal addressing, what is the address of vertex f?

1. Prove: A full m-ary tree with i internal vertices contains n = mi + 1 vertices. 2. For a full m-ary tree with n vertices, i internal vertices, and l leaves, prove: (i) i = (n 1)/m and l = [(m 1)n +

### Combinational Logic & Circuits

Week-I Combinational Logic & Circuits Spring' 232 - Logic Design Page Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other

### B.Tech II Year I Semester (R13) Regular Examinations December 2014 DIGITAL LOGIC DESIGN

B.Tech II Year I Semester () Regular Examinations December 2014 (Common to IT and CSE) (a) If 1010 2 + 10 2 = X 10, then X is ----- Write the first 9 decimal digits in base 3. (c) What is meant by don

### SUBJECT CODE: IT T35 DIGITAL SYSTEM DESIGN YEAR / SEM : 2 / 3

UNIT - I PART A (2 Marks) 1. Using Demorgan s theorem convert the following Boolean expression to an equivalent expression that has only OR and complement operations. Show the function can be implemented

28 The McGraw-Hill Companies, Inc. All rights reserved. 28 The McGraw-Hill Companies, Inc. All rights reserved. All or Nothing Gate Boolean Expression: A B = Y Truth Table (ee next slide) or AB = Y 28

### Boolean Logic CS.352.F12

Boolean Logic CS.352.F12 Boolean Algebra Boolean Algebra Mathematical system used to manipulate logic equations. Boolean: deals with binary values (True/False, yes/no, on/off, 1/0) Algebra: set of operations

### CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey

CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input

### Incompletely Specified Functions with Don t Cares 2-Level Transformation Review Boolean Cube Karnaugh-Map Representation and Methods Examples

Lecture B: Logic Minimization Incompletely Specified Functions with Don t Cares 2-Level Transformation Review Boolean Cube Karnaugh-Map Representation and Methods Examples Incompletely specified functions

### MODULE 5 - COMBINATIONAL LOGIC

Introduction to Digital Electronics Module 5: Combinational Logic 1 MODULE 5 - COMBINATIONAL LOGIC OVERVIEW: For any given combination of input binary bits or variables, the logic will have a specific

### Dr. Chuck Cartledge. 10 June 2015

Miscellanea Exam #1 Break Exam review 2.1 2.2 2.3 2.4 Break 3 4 Conclusion References CSC-205 Computer Organization Lecture #003 Chapter 2, Sections 2.1 through 4 Dr. Chuck Cartledge 10 June 2015 1/30