Register Allocation, iii. Bringing in functions & using spilling & coalescing
|
|
|
- Cecily Crawford
- 5 years ago
- Views:
Transcription
1 Register Allocation, iii Bringing in functions & using spilling & coalescing 1
2 Function Calls ;; f(x) = let y = g(x) ;; in h(y+x) + y*5 (:f (x <- eax) ;; save our argument (call :g) ;; call g with our argument (y <- eax) ;; save g's result in y (eax += x) ;; compute h's arg (call :h) ;; call h (y5 <- y) ;; compute y*5 in y5, i (y5 *= 5) ;; compute y*5 in y5, ii (eax += y5) ;; add h's res to y*5 (return)) ;; and we're done. 2
3 Gen & Kill gen kill 1: :f () () 2: (x <- eax) (eax) (x) 3: (call :g) (eax ecx edx) (ebx ecx edx eax) 4: (y <- eax) (eax) (y) 5: (eax += x) (eax x) (eax) 6: (call :h) (eax ecx edx) (ebx ecx edx eax) 7: (y5 <- y) (y) (y5) 8: (y5 *= 5) (y5) (y5) 9: (eax += y5) (eax y5) (eax) 10: (return) (eax edi esi) () 3
4 Liveness in 1: :f () () 2: (x <- eax) () () 3: (call :g) () () 4: (y <- eax) () () 5: (eax += x) () () 6: (call :h) () () 7: (y5 <- y) () () 8: (y5 *= 5) () () 9: (eax += y5) () () 10: (return) () () out 4
5 Liveness in 1: :f () () 2: (x <- eax) (eax) () 3: (call :g) (eax ecx edx) () 4: (y <- eax) (eax) () 5: (eax += x) (eax x) () 6: (call :h) (eax ecx edx) () 7: (y5 <- y) (y) () 8: (y5 *= 5) (y5) () 9: (eax += y5) (eax y5) () 10: (return) (eax edi esi) () out 5
6 Liveness in out 1: :f () (eax) 2: (x <- eax) (eax) (eax ecx edx) 3: (call :g) (eax ecx edx) (eax) 4: (y <- eax) (eax) (eax x) 5: (eax += x) (eax x) (eax ecx edx) 6: (call :h) (eax ecx edx) (y) 7: (y5 <- y) (y) (y5) 8: (y5 *= 5) (y5) (eax y5) 9: (eax += y5) (eax y5) (eax edi esi) 10: (return) (eax edi esi) () 6
7 Liveness in out 1: :f (eax) (eax) 2: (x <- eax) (eax ecx edx) (eax ecx edx) 3: (call :g) (eax ecx edx) (eax) 4: (y <- eax) (eax x) (eax x) 5: (eax += x) (eax ecx edx x) (eax ecx edx) 6: (call :h) (eax ecx edx y) (y) 7: (y5 <- y) (y) (y5) 8: (y5 *= 5) (eax y5) (eax y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 7
8 Liveness in out 1: :f (eax) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx) 3: (call :g) (eax ecx edx) (eax x) 4: (y <- eax) (eax x) (eax ecx edx x) 5: (eax += x) (eax ecx edx x) (eax ecx edx y) 6: (call :h) (eax ecx edx y) (y) 7: (y5 <- y) (y) (eax y5) 8: (y5 *= 5) (eax y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 8
9 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx) 3: (call :g) (eax ecx edx x) (eax x) 4: (y <- eax) (eax ecx edx x) (eax ecx edx x) 5: (eax += x) (eax ecx edx x y) (eax ecx edx y) 6: (call :h) (eax ecx edx y) (y) 7: (y5 <- y) (eax y) (eax y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 9
10 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edx x) (eax ecx edx x) 4: (y <- eax) (eax ecx edx x) (eax ecx edx x y) 5: (eax += x) (eax ecx edx x y) (eax ecx edx y) 6: (call :h) (eax ecx edx y) (eax y) 7: (y5 <- y) (eax y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 10
11 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edx x) (eax ecx edx x) 4: (y <- eax) (eax ecx edx x) (eax ecx edx x y) 5: (eax += x) (eax ecx edx x y) (eax ecx edx y) 6: (call :h) (eax ecx edx y) (eax y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 11
12 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edx x) (eax ecx edx x) 4: (y <- eax) (eax ecx edx x) (eax ecx edx x y) 5: (eax += x) (eax ecx edx x y) (eax ecx edx y) 6: (call :h) (eax ecx edx y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 12
13 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edx x) (eax ecx edx x) 4: (y <- eax) (eax ecx edx x) (eax ecx edx x y) 5: (eax += x) (eax ecx edx x y) (eax ecx edx y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 13
14 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edx x) (eax ecx edx x) 4: (y <- eax) (eax ecx edx x) (eax ecx edx x y) 5: (eax += x) (eax ecx edx x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 14
15 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edx x) (eax ecx edx x) 4: (y <- eax) (eax ecx edx x) (eax ecx edx x y) 5: (eax += x) (eax ecx edi edx esi x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 15
16 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edx x) (eax ecx edx x) 4: (y <- eax) (eax ecx edx x) (eax ecx edi edx esi x y) 5: (eax += x) (eax ecx edi edx esi x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 16
17 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edx x) (eax ecx edx x) 4: (y <- eax) (eax ecx edi edx esi x) (eax ecx edi edx esi x y) 5: (eax += x) (eax ecx edi edx esi x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 17
18 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edx x) (eax ecx edi edx esi x) 4: (y <- eax) (eax ecx edi edx esi x) (eax ecx edi edx esi x y) 5: (eax += x) (eax ecx edi edx esi x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 18
19 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edx x) 3: (call :g) (eax ecx edi edx esi x) (eax ecx edi edx esi x) 4: (y <- eax) (eax ecx edi edx esi x) (eax ecx edi edx esi x y) 5: (eax += x) (eax ecx edi edx esi x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 19
20 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edx) (eax ecx edi edx esi x) 3: (call :g) (eax ecx edi edx esi x) (eax ecx edi edx esi x) 4: (y <- eax) (eax ecx edi edx esi x) (eax ecx edi edx esi x y) 5: (eax += x) (eax ecx edi edx esi x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 20
21 Liveness in out 1: :f (eax ecx edx) (eax ecx edx) 2: (x <- eax) (eax ecx edi edx esi) (eax ecx edi edx esi x) 3: (call :g) (eax ecx edi edx esi x) (eax ecx edi edx esi x) 4: (y <- eax) (eax ecx edi edx esi x) (eax ecx edi edx esi x y) 5: (eax += x) (eax ecx edi edx esi x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 21
22 Liveness in out 1: :f (eax ecx edx) (eax ecx edi edx esi) 2: (x <- eax) (eax ecx edi edx esi) (eax ecx edi edx esi x) 3: (call :g) (eax ecx edi edx esi x) (eax ecx edi edx esi x) 4: (y <- eax) (eax ecx edi edx esi x) (eax ecx edi edx esi x y) 5: (eax += x) (eax ecx edi edx esi x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 22
23 Liveness in out 1: :f (eax ecx edi edx esi) (eax ecx edi edx esi) 2: (x <- eax) (eax ecx edi edx esi) (eax ecx edi edx esi x) 3: (call :g) (eax ecx edi edx esi x) (eax ecx edi edx esi x) 4: (y <- eax) (eax ecx edi edx esi x) (eax ecx edi edx esi x y) 5: (eax += x) (eax ecx edi edx esi x y) (eax ecx edi edx esi y) 6: (call :h) (eax ecx edi edx esi y) (eax edi esi y) 7: (y5 <- y) (eax edi esi y) (eax edi esi y5) 8: (y5 *= 5) (eax edi esi y5) (eax edi esi y5) 9: (eax += y5) (eax edi esi y5) (eax edi esi) 10: (return) (eax edi esi) () 23
24 Liveness :f (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (return) x y y5 eax ebx ecx edi edx esi 24
25 ebx eax x ecx esi edx edi y y5 25
26 ebx eax x ecx esi edx y y5 edi y5 26
27 ebx eax x ecx esi edx y y5 edi x y5 27
28 ebx eax x ecx esi edx y y y5 edi x y5 28
29 ebx eax x ecx esi edx y y y5 edi x y5 29
30 ebx eax x ecx esi edx y y5 edi x y5 30
31 ebx eax x ecx esi edx y y5 edi x y5 31
32 ebx eax x ecx esi edx y y5 edi y5 32
33 ebx eax x ecx esi edx y y5 edi y5 33
34 ebx eax x ecx esi edx edi y y5 34
35 ebx eax x ecx esi edx edi y y5 35
36 Spilling y Before: :f (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (return) After: :f (x <- eax) (call :g) ((mem ebp -4) <- eax) (eax += x) (call :h) (y5 <- (mem ebp -4)) (y5 *= 5) (eax += y5) (return) 36
37 Spilling y :f (x <- eax) (call :g) ((mem ebp -4) <- eax) (eax += x) (call :h) (y5 <- (mem ebp -4)) (y5 *= 5) (eax += y5) (return) ebp x y5 eax ebx ecx edi edx esi 37
38 eax ebx x ecx esi edx edi y5 38
39 eax ebx x ecx esi edx edi y5 y5 39
40 eax ebx x ecx esi edx edi x y5 y5 40
41 eax ebx x ecx esi edx edi x y5 y5 41
42 eax ebx x ecx esi edx edi y5 y5 42
43 eax ebx x ecx esi edx edi y5 y5 43
44 eax ebx x ecx esi edx edi y5 44
45 eax ebx x ecx esi edx edi y5 45
46 Spilling x Before: :f (x <- eax) (call :g) ((mem ebp -4) <- eax) (eax += x) (call :h) (y5 <- (mem ebp -4)) (y5 *= 5) (eax += y5) (return) After: :f ((mem ebp -8) <- eax) (call :g) ((mem ebp -4) <- eax) (sx0 <- (mem ebp -8)) (eax += sx0) (call :h) (y5 <- (mem ebp -4)) (y5 *= 5) (eax += y5) (return) Note that this time we introduce a sx0, but compare its live range to x s 46
47 Spilling x :f ((mem ebp -8) <- eax) (call :g) ((mem ebp -4) <- eax) (sx0 <- (mem ebp -8)) (eax += sx0) (call :h) (y5 <- (mem ebp -4)) (y5 *= 5) (eax += y5) (return) ebp sx0 y5 eax ebx ecx edi edx esi 47
48 ebx ecx eax edx esi sx0 edi y5 48
49 ebx ecx eax edx esi sx0 edi sx0 y5 49
50 ebx ecx eax edx esi sx0 edi y5 sx0 y5 50
51 ebx ecx eax edx esi sx0 edi y5 sx0 y5 51
52 ebx ecx eax edx esi sx0 edi sx0 y5 52
53 ebx ecx eax edx esi sx0 edi sx0 y5 53
54 ebx ecx eax edx esi sx0 edi y5 54
55 ebx ecx eax edx esi sx0 edi y5 55
56 Live ranges :f (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (return) x y y5 eax ebx ecx edi edx esi 56
57 Live ranges We spilled two variables that have relatively short live ranges, but look at those long live ranges with no uses of the variables that the callee save registers, i.e. edi and esi, have. We d rather spill them. 57
58 Spilling callee saves Unfortunately, it gets complicated to spill real registers. Instead, a trick: we just make up new variables to hold their values. Semantics of the program does not change, but: Now the real registers now have short live ranges, and New temporaries are spillable 58
59 Adding new variables g-ans Before: :f (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (return) After: :f (z1 <- edi) (z2 <- esi) (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (edi <- z1) (esi <- z2) (return) Init new variables at beginning of fun, restore them before returning or making a tail call. 59
60 Live ranges with new variables :f (z1 <- edi) (z2 <- esi) (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (edi <- z1) (esi <- z2) (return) x y y5 z1 z2 eax ebx ecx edi edx esi 60
61 Spilling z1 & z2 Before: :f (z1 <- edi) (z2 <- esi) (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (edi <- z1) (esi <- z2) (return) After: :f ((mem ebp -4) <- edi) ((mem ebp -8) <- esi) (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (edi <- (mem ebp -4)) (esi <- (mem ebp -8)) (return) 61
62 x esi edi eax y5 ebx y ecx edx 62
63 x esi edi eax y5 ebx ecx edx y y 63
64 x esi edi eax y5 ebx ecx edx y x y 64
65 x esi edi eax y5 ebx y5 ecx edx y x y 65
66 x esi edi eax y5 ebx y5 ecx edx y x y 66
67 x esi edi eax y5 ebx ecx edx y x y 67
68 x esi edi eax y5 ebx ecx edx y x y 68
69 x esi edi eax y5 ebx ecx edx y y 69
70 x esi edi eax y5 ebx ecx edx y y 70
71 x esi edi eax y5 ebx y ecx edx 71
72 x esi edi eax y5 ebx y ecx edx 72
73 How to choose spills Pick variables with long live ranges and few uses to spill (callee saves have this profile) In this case, we can spill z1 and z2 to save us from spilling variables x and y that are frequently accessed 73
74 Finishing up register allocation When you ve spilled enough to successfully allocate the program, count the number of spills and adjust esp at the beginning of the function. (Recall calling convention.) 74
75 Calling convention reminder (see lecture03.txt) (call s) pushl $<new-label> pushl %ebp movl %esp, %ebp jmp <s> <new-label>: (return) movl %ebp, %esp popl %ebp ret // pop & goto (tail-call s) movl %ebp, %esp jmp <s> (cleaned up version of call followed by return) 75
76 Registers: allocated (:f (esp -= 8) ((mem ebp -4) <- esi) ((mem ebp -8) <- edi) (esi <- eax) (call :g) (edi <- eax) (eax += esi) (call :h) (ebx <- edi) (ebx *= 5) (eax += ebx) (esi <- (mem ebp -4)) (edi <- (mem ebp -8)) (return)) 76
77 Coalescing If we see a (x <- y) instruction, we might be able to just change all of the x's into y's That s called coalescing x and y Lets use coalescing to remove y and y5 from our example program 77
78 Coalescing example :f ((mem ebp -4) <- edi) ((mem ebp -8) <- esi) (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (edi <- (mem ebp -4)) (esi <- (mem ebp -8)) (return) :f ((mem ebp -4) <- edi) ((mem ebp -8) <- esi) (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y <- y) (y *= 5) (eax += y) (edi <- (mem ebp -4)) (esi <- (mem ebp -8)) (return) 78
79 Live ranges before coalescing :f ((mem ebp -4) <- edi) ((mem ebp -8) <- esi) (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y5 <- y) (y5 *= 5) (eax += y5) (edi <- (mem ebp -4)) (esi <- (mem ebp -8)) (return) ebp x y y5 eax ebx ecx edi edx esi 79
80 Live ranges after coalescing :f ((mem ebp -4) <- edi) ((mem ebp -8) <- esi) (x <- eax) (call :g) (y <- eax) (eax += x) (call :h) (y <- y) (y *= 5) (eax += y) (edi <- (mem ebp -4)) (esi <- (mem ebp -8)) (return) ebp x y eax ebx ecx edi edx esi 80
81 Lets try to register allocate the coalesced graph 81
82 esi x edi eax y ebx edx ecx 82
83 esi x edi eax y ebx edx y ecx 83
84 esi x edi eax y ebx edx x y ecx 84
85 esi x edi eax y ebx edx x y ecx 85
86 esi x edi eax y ebx edx y ecx 86
87 esi x edi eax y ebx edx y ecx 87
88 esi x edi eax y ebx edx ecx 88
89 esi x edi eax y ebx edx ecx 89
90 It worked that time, but this doesn t always work 90
91 Coalescing Problem (r_a <- 1) (r_z <- r_a) (r_1 <- 1) (r_2 <- 2) (r_3 <- 3) (r_a += 1) (r_4 <- 4) (r_5 <- 5) ( <- 6) (r_1 += 1) (r_2 += 1) (r_3 += 1) (r_z <- 1) (r_4 += 1) (r_5 += 1) ( += 1) (r_z += 1) r_1 r_2 r_3 r_4 r_5 r_a r_z eax ebx ecx edi edx esi 91
92 r_z r_1 r_a r_2 r_3 r_5 r_4 92
93 r_z r_1 r_a r_2 r_3 r_5 r_z r_4 93
94 r_z r_1 r_a r_2 r_3 r_5 r_a r_z r_4 94
95 r_z r_1 r_a r_2 r_3 r_5 r_a r_z r_4 95
96 r_z r_1 r_a r_2 r_3 r_5 r_5 r_a r_z r_4 96
97 r_z r_1 r_a r_2 r_3 r_5 r_4 r_5 r_a r_z r_4 97
98 r_z r_1 r_a r_2 r_3 r_5 r_3 r_4 r_5 r_a r_z r_4 98
99 r_z r_2 r_1 r_3 r_a r_5 r_2 r_3 r_4 r_5 r_a r_z r_4 99
100 r_z r_2 r_1 r_3 r_a r_5 r_1 r_2 r_3 r_4 r_5 r_a r_z r_4 100
101 r_z r_2 r_1 r_3 r_a r_5 r_2 r_3 r_4 r_5 r_a r_z r_4 101
102 r_z r_2 r_1 r_3 r_a r_5 r_2 r_3 r_4 r_5 r_a r_z r_4 102
103 r_z r_1 r_a r_2 r_3 r_5 r_3 r_4 r_5 r_a r_z r_4 103
104 r_z r_1 r_a r_2 r_3 r_5 r_3 r_4 r_5 r_a r_z r_4 104
105 r_z r_1 r_a r_2 r_3 r_5 r_4 r_5 r_a r_z r_4 105
106 r_z r_1 r_a r_2 r_3 r_5 r_4 r_5 r_a r_z r_4 106
107 r_z r_1 r_a r_2 r_3 r_5 r_5 r_a r_z r_4 107
108 r_z r_1 r_a r_2 r_3 r_5 r_5 r_a r_z r_4 108
109 r_z r_1 r_a r_2 r_3 r_5 r_a r_z r_4 109
110 r_z r_1 r_a r_2 r_3 r_5 r_a r_z r_4 110
111 r_z r_1 r_a r_2 r_3 r_5 r_a r_z r_4 111
112 r_z r_1 r_a r_2 r_3 r_5 r_a r_z r_4 112
113 r_z r_1 r_a r_2 r_3 r_5 r_z r_4 113
114 r_z r_1 r_a r_2 r_3 r_5 r_z r_4 114
115 r_z r_1 r_a r_2 r_3 r_5 r_4 115
116 r_z r_1 r_a r_2 r_3 r_5 r_4 116
117 Now, we coalesce r a and r z 117
118 Coalescing Problem (r_a <- 1) (r_z <- r_a) (r_1 <- 1) (r_2 <- 2) (r_3 <- 3) (r_a += 1) (r_4 <- 4) (r_5 <- 5) ( <- 6) (r_1 += 1) (r_2 += 1) (r_3 += 1) (r_z <- 1) (r_4 += 1) (r_5 += 1) ( += 1) (r_z += 1) r_1 r_2 r_3 r_4 r_5 r_a r_z eax ebx ecx edi edx esi 118
119 Coalescing Problem (r_z <- 1) (r_z <- r_z) (r_1 <- 1) (r_2 <- 2) (r_3 <- 3) (r_z += 1) (r_4 <- 4) (r_5 <- 5) ( <- 6) (r_1 += 1) (r_2 += 1) (r_3 += 1) (r_z <- 1) (r_4 += 1) (r_5 += 1) ( += 1) (r_z += 1) r_1 r_2 r_3 r_4 r_5 r_z eax ebx ecx edi edx esi 119
120 r_1 r_z r_2 r_3 r_4 r_5 120
121 r_1 r_z r_2 r_3 r_z r_4 r_5 121
122 r_1 r_z r_2 r_3 r_z r_5 r_4 122
123 r_1 r_z r_2 r_3 r_5 r_z r_5 r_4 123
124 r_1 r_z r_2 r_3 r_4 r_5 r_z r_5 r_4 124
125 r_1 r_z r_2 r_3 r_3 r_4 r_5 r_z r_5 r_4 125
126 r_1 r_z r_2 r_3 r_2 r_3 r_4 r_5 r_z r_5 r_4 126
127 r_1 r_z r_2 r_3 r_1 r_2 r_3 r_4 r_5 r_z r_5 r_4 127
128 r_1 r_z r_2 r_3 r_2 r_3 r_4 r_5 r_z r_5 r_4 128
129 r_1 r_z r_2 r_3 r_2 r_3 r_4 r_5 r_z r_5 r_4 129
130 r_1 r_z r_2 r_3 r_3 r_4 r_5 r_z r_5 r_4 130
131 r_1 r_z r_2 r_3 r_3 r_4 r_5 r_z r_5 r_4 131
132 r_1 r_z r_2 r_3 r_4 r_5 r_z r_5 r_4 132
133 r_1 r_z r_2 r_3 r_4 r_5 r_z r_5 r_4 133
134 r_1 r_z r_2 r_3 r_5 r_z r_5 r_4 134
135 r_1 r_z r_2 r_3 r_5 r_z r_5 r_4 135
136 r_1 r_z r_2 r_3 r_z r_5 r_4 136
137 r_1 r_z r_2 r_3 r_z r_5 r_4 137
138 r_1 r_z r_2 r_3 r_z r_4 r_5 138
139 r_1 r_z r_2 r_3 r_z r_4 r_5 139
140 r_1 r_z r_2 r_3 r_4 r_5 140
141 r_1 r_z r_2 r_3 r_4 r_5 141
142 Coalescing during graph coloring Extend the interference graph with a new kind of edge, called a move edge. A move edge connects two nodes if there is a (x <- y) instruction in the program Combine two move-edge connected nodes into a single node (at any step in the coloring algorithm), if: They don t interfere The resulting node has fewer than 6 neighbors This ensures the graph is colorable (if it was before) 142
143 Roadmap: putting it all together 143
144 Programming There are a number of different modules to put together A liveness library: gen & kill functions on instructions; the in and out loop; going from liveness to interference A graph library: creating graphs, creating nodes, creating edges, removing nodes (and their edges), iterating over edges and nodes An interference library: build a graph from the liveness information 144
145 Programming There are a number of different modules to put together, cotd A coloring library: color a graph using the coloring algorithm A spilling library: given a variable and a stack position, rewrite the program to move the variable in and out of the stack right as it is used The final translation: When you have a valid coloring, rewrite the variables to use registers and insert the esp adjustment, turning the L2 program into an L1 one. 145
146 Test 146
147 Unit testing The most underrated part of developing good software is testing it well. Build simple (unit) tests for the api for each module, as you design the API As you write the code, write a test for each different case in the code together with the case itself Whenever you find a bug, always add a test case before fixing the bug; make sure the test case fails so you know you wrote it properly 147
Assembly Language: Function Calls" Goals of this Lecture"
Assembly Language: Function Calls" 1 Goals of this Lecture" Help you learn:" Function call problems:" Calling and returning" Passing parameters" Storing local variables" Handling registers without interference"
Assembly Language: Function Calls" Goals of this Lecture"
Assembly Language: Function Calls" 1 Goals of this Lecture" Help you learn:" Function call problems:" Calling and urning" Passing parameters" Storing local variables" Handling registers without interference"
Assembly Language: Function Calls
Assembly Language: Function Calls 1 Goals of this Lecture Help you learn: Function call problems: Calling and returning Passing parameters Storing local variables Handling registers without interference
CS 31: Intro to Systems Functions and the Stack. Martin Gagne Swarthmore College February 23, 2016
CS 31: Intro to Systems Functions and the Stack Martin Gagne Swarthmore College February 23, 2016 Reminders Late policy: you do not have to send me an email to inform me of a late submission before the
Assembly Language: Function Calls. Goals of this Lecture. Function Call Problems
Assembly Language: Function Calls 1 Goals of this Lecture Help you learn: Function call problems: Calling and urning Passing parameters Storing local variables Handling registers without interference Returning
CMSC 313 Lecture 12. Project 3 Questions. How C functions pass parameters. UMBC, CMSC313, Richard Chang
Project 3 Questions CMSC 313 Lecture 12 How C functions pass parameters UMBC, CMSC313, Richard Chang Last Time Stack Instructions: PUSH, POP PUSH adds an item to the top of the stack POP
Function Calls COS 217. Reading: Chapter 4 of Programming From the Ground Up (available online from the course Web site)
Function Calls COS 217 Reading: Chapter 4 of Programming From the Ground Up (available online from the course Web site) 1 Goals of Today s Lecture Finishing introduction to assembly language o EFLAGS register
COMP 210 Example Question Exam 2 (Solutions at the bottom)
_ Problem 1. COMP 210 Example Question Exam 2 (Solutions at the bottom) This question will test your ability to reconstruct C code from the assembled output. On the opposing page, there is asm code for
X86 Stack Calling Function POV
X86 Stack Calling Function POV Computer Systems Section 3.7 Stack Frame Reg Value ebp xffff FFF0 esp xffff FFE0 eax x0000 000E Memory Address Value xffff FFF8 xffff FFF4 x0000 0004 xffff FFF4 x0000 0003
Procedure Calls. Young W. Lim Sat. Young W. Lim Procedure Calls Sat 1 / 27
Procedure Calls Young W. Lim 2016-11-05 Sat Young W. Lim Procedure Calls 2016-11-05 Sat 1 / 27 Outline 1 Introduction References Stack Background Transferring Control Register Usage Conventions Procedure
Stack -- Memory which holds register contents. Will keep the EIP of the next address after the call
Call without Parameter Value Transfer What are involved? ESP Stack Pointer Register Grows by 4 for EIP (return address) storage Stack -- Memory which holds register contents Will keep the EIP of the next
Machine-level Programming (3)
Machine-level Programming (3) Procedures A: call A call A return Two issues How to return to the correct position? How to pass arguments and return values between callee to caller? 2 Procedure Control
ICS143A: Principles of Operating Systems. Midterm recap, sample questions. Anton Burtsev February, 2017
ICS143A: Principles of Operating Systems Midterm recap, sample questions Anton Burtsev February, 2017 Describe the x86 address translation pipeline (draw figure), explain stages. Address translation What
Machine Program: Procedure. Zhaoguo Wang
Machine Program: Procedure Zhaoguo Wang Requirements of procedure calls? P() { y = Q(x); y++; 1. Passing control int Q(int i) { int t, z; return z; Requirements of procedure calls? P() { y = Q(x); y++;
Implementing Threads. Operating Systems In Depth II 1 Copyright 2018 Thomas W. Doeppner. All rights reserved.
Implementing Threads Operating Systems In Depth II 1 Copyright 2018 Thomas W Doeppner All rights reserved The Unix Address Space stack dynamic bss data text Operating Systems In Depth II 2 Copyright 2018
W4118: PC Hardware and x86. Junfeng Yang
W4118: PC Hardware and x86 Junfeng Yang A PC How to make it do something useful? 2 Outline PC organization x86 instruction set gcc calling conventions PC emulation 3 PC board 4 PC organization One or more
Procedure Calls. Young W. Lim Mon. Young W. Lim Procedure Calls Mon 1 / 29
Procedure Calls Young W. Lim 2017-08-21 Mon Young W. Lim Procedure Calls 2017-08-21 Mon 1 / 29 Outline 1 Introduction Based on Stack Background Transferring Control Register Usage Conventions Procedure
Processes (Intro) Yannis Smaragdakis, U. Athens
Processes (Intro) Yannis Smaragdakis, U. Athens Process: CPU Virtualization Process = Program, instantiated has memory, code, current state What kind of memory do we have? registers + address space Let's
CPEG421/621 Tutorial
CPEG421/621 Tutorial Compiler data representation system call interface calling convention Assembler object file format object code model Linker program initialization exception handling relocation model
CSE 351: Week 4. Tom Bergan, TA
CSE 35 Week 4 Tom Bergan, TA Does this code look okay? int binarysearch(int a[], int length, int key) { int low = 0; int high = length - ; while (low
CS213. Machine-Level Programming III: Procedures
CS213 Machine-Level Programming III: Procedures Topics IA32 stack discipline Register saving conventions Creating pointers to local variables IA32 Region of memory managed with stack discipline Grows toward
Assembly III: Procedures. Jin-Soo Kim Computer Systems Laboratory Sungkyunkwan University
Assembly III: Procedures Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu IA-32 (1) Characteristics Region of memory managed with stack discipline
Instruction Set Architecture
CS:APP Chapter 4 Computer Architecture Instruction Set Architecture Randal E. Bryant adapted by Jason Fritts http://csapp.cs.cmu.edu CS:APP2e Hardware Architecture - using Y86 ISA For learning aspects
Subprograms: Local Variables
Subprograms: Local Variables ICS312 Machine-Level and Systems Programming Henri Casanova (henric@hawaii.edu) Local Variables in Subprograms In all the examples we have seen so far, the subprograms were
CS 33: Week 3 Discussion. x86 Assembly (v1.0) Section 1G
CS 33: Week 3 Discussion x86 Assembly (v1.0) Section 1G Announcements - HW2 due Sunday - MT1 this Thursday! - Lab2 out Info Name: Eric Kim (Section 1G, 2-4 PM, BH 5419) Office Hours (Boelter 2432) - Wed
Question 4.2 2: (Solution, p 5) Suppose that the HYMN CPU begins with the following in memory. addr data (translation) LOAD 11110
Questions 1 Question 4.1 1: (Solution, p 5) Define the fetch-execute cycle as it relates to a computer processing a program. Your definition should describe the primary purpose of each phase. Question
x86 assembly CS449 Fall 2017
x86 assembly CS449 Fall 2017 x86 is a CISC CISC (Complex Instruction Set Computer) e.g. x86 Hundreds of (complex) instructions Only a handful of registers RISC (Reduced Instruction Set Computer) e.g. MIPS
Machine-Level Programming III: Procedures
Machine-Level Programming III: Procedures IA32 Region of memory managed with stack discipline Grows toward lower addresses Register indicates lowest stack address address of top element Bottom Increasing
CMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING
CMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING LECTURE 16, SPRING 2013 TOPICS TODAY Project 6 Perils & Pitfalls of Memory Allocation C Function Call Conventions in Assembly Language PERILS
CS429: Computer Organization and Architecture
CS429: Computer Organization and Architecture Warren Hunt, Jr. and Bill Young Department of Computer Sciences University of Texas at Austin Last updated: October 1, 2014 at 12:03 CS429 Slideset 6: 1 Topics
Variables vs. Registers/Memory. Simple Approach. Register Allocation. Interference Graph. Register Allocation Algorithm CS412/CS413
Variables vs. Registers/Memory CS412/CS413 Introduction to Compilers Tim Teitelbaum Lecture 33: Register Allocation 18 Apr 07 Difference between IR and assembly code: IR (and abstract assembly) manipulate
ASSEMBLY III: PROCEDURES. Jo, Heeseung
ASSEMBLY III: PROCEDURES Jo, Heeseung IA-32 STACK (1) Characteristics Region of memory managed with stack discipline Grows toward lower addresses Register indicates lowest stack address - address of top
Assembly III: Procedures. Jo, Heeseung
Assembly III: Procedures Jo, Heeseung IA-32 Stack (1) Characteristics Region of memory managed with stack discipline Grows toward lower addresses Register indicates lowest stack address - address of top
EECE.3170: Microprocessor Systems Design I Summer 2017 Homework 4 Solution
1. (40 points) Write the following subroutine in x86 assembly: Recall that: int f(int v1, int v2, int v3) { int x = v1 + v2; urn (x + v3) * (x v3); Subroutine arguments are passed on the stack, and can
CMSC 313 Lecture 12 [draft] How C functions pass parameters
![CMSC 313 Lecture 12 [draft] How C functions pass parameters](/thumbs/88/117067553.jpg "CMSC 313 Lecture 12 [draft] How C functions pass parameters")
CMSC 313 Lecture 12 [draft] How C functions pass parameters UMBC, CMSC313, Richard Chang Last Time Stack Instructions: PUSH, POP PUSH adds an item to the top of the stack POP removes an
CPSC W Term 2 Problem Set #3 - Solution
1. (a) int gcd(int a, int b) { if (a == b) urn a; else if (a > b) urn gcd(a - b, b); else urn gcd(a, b - a); CPSC 313 06W Term 2 Problem Set #3 - Solution.file "gcdrec.c".globl gcd.type gcd, @function
Lecture 4 CIS 341: COMPILERS
Lecture 4 CIS 341: COMPILERS CIS 341 Announcements HW2: X86lite Available on the course web pages. Due: Weds. Feb. 7 th at midnight Pair-programming project Zdancewic CIS 341: Compilers 2 X86 Schematic
SYSTEM CALL IMPLEMENTATION. CS124 Operating Systems Fall , Lecture 14
SYSTEM CALL IMPLEMENTATION CS124 Operating Systems Fall 2017-2018, Lecture 14 2 User Processes and System Calls Previously stated that user applications interact with the kernel via system calls Typically
Fall Compiler Principles Lecture 12: Register Allocation. Roman Manevich Ben-Gurion University
Fall 2014-2015 Compiler Principles Lecture 12: Register Allocation Roman Manevich Ben-Gurion University Syllabus Front End Intermediate Representation Optimizations Code Generation Scanning Lowering Local
4) C = 96 * B 5) 1 and 3 only 6) 2 and 4 only
Instructions: The following questions use the AT&T (GNU) syntax for x86-32 assembly code, as in the course notes. Submit your answers to these questions to the Curator as OQ05 by the posted due date and
The course that gives CMU its Zip! Machine-Level Programming III: Procedures Sept. 17, 2002
15-213 The course that gives CMU its Zip! Machine-Level Programming III: Procedures Sept. 17, 2002 Topics IA32 stack discipline Register saving conventions Creating pointers to local variables class07.ppt
ECE 391 Exam 1 Review Session - Spring Brought to you by HKN
ECE 391 Exam 1 Review Session - Spring 2018 Brought to you by HKN DISCLAIMER There is A LOT (like a LOT) of information that can be tested for on the exam, and by the nature of the course you never really
Y86 Processor State. Instruction Example. Encoding Registers. Lecture 7A. Computer Architecture I Instruction Set Architecture Assembly Language View
Computer Architecture I Instruction Set Architecture Assembly Language View Processor state Registers, memory, Instructions addl, movl, andl, How instructions are encoded as bytes Layer of Abstraction
Homework. In-line Assembly Code Machine Language Program Efficiency Tricks Reading PAL, pp 3-6, Practice Exam 1
Homework In-line Assembly Code Machine Language Program Efficiency Tricks Reading PAL, pp 3-6, 361-367 Practice Exam 1 1 In-line Assembly Code The gcc compiler allows you to put assembly instructions in-line
administrivia today start assembly probably won t finish all these slides Assignment 4 due tomorrow any questions?
administrivia today start assembly probably won t finish all these slides Assignment 4 due tomorrow any questions? exam on Wednesday today s material not on the exam 1 Assembly Assembly is programming
211: Computer Architecture Summer 2016
211: Computer Architecture Summer 2016 Liu Liu Topic: Assembly Programming Storage - Assembly Programming: Recap - project2 - Structure/ Array Representation - Structure Alignment Rutgers University Liu
Instruction Set Architecture
CS:APP Chapter 4 Computer Architecture Instruction Set Architecture Randal E. Bryant Carnegie Mellon University http://csapp.cs.cmu.edu CS:APP Instruction Set Architecture Assembly Language View! Processor
Instruction Set Architecture
CS:APP Chapter 4 Computer Architecture Instruction Set Architecture Randal E. Bryant Carnegie Mellon University http://csapp.cs.cmu.edu CS:APP Instruction Set Architecture Assembly Language View Processor
X86 Review Process Layout, ISA, etc. CS642: Computer Security. Drew Davidson
X86 Review Process Layout, ISA, etc. CS642: Computer Security Drew Davidson davidson@cs.wisc.edu From Last Time ACL-based permissions (UNIX style) Read, Write, execute can be restricted on users and groups
Lecture #16: Introduction to Runtime Organization. Last modified: Fri Mar 19 00:17: CS164: Lecture #16 1
Lecture #16: Introduction to Runtime Organization Last modified: Fri Mar 19 00:17:19 2010 CS164: Lecture #16 1 Status Lexical analysis Produces tokens Detects & eliminates illegal tokens Parsing Produces
AS08-C++ and Assembly Calling and Returning. CS220 Logic Design AS08-C++ and Assembly. AS08-C++ and Assembly Calling Conventions
CS220 Logic Design Outline Calling Conventions Multi-module Programs 1 Calling and Returning We have already seen how the call instruction is used to execute a subprogram. call pushes the address of the
CSC 2400: Computing Systems. X86 Assembly: Function Calls"
CSC 24: Computing Systems X86 Assembly: Function Calls" 1 Lecture Goals! Challenges of supporting functions" Providing information for the called function" Function arguments and local variables" Allowing
An Elegant Weapon for a More Civilized Age
An Elegant Weapon for a More Civilized Age Solving an Easy Problem What are the input types? What is the output type? Give example input/output pairs Which input represents the domain of the recursion,
CS412/CS413. Introduction to Compilers Tim Teitelbaum. Lecture 21: Generating Pentium Code 10 March 08
CS412/CS413 Introduction to Compilers Tim Teitelbaum Lecture 21: Generating Pentium Code 10 March 08 CS 412/413 Spring 2008 Introduction to Compilers 1 Simple Code Generation Three-address code makes it
Systems I. Machine-Level Programming V: Procedures
Systems I Machine-Level Programming V: Procedures Topics abstraction and implementation IA32 stack discipline Procedural Memory Usage void swap(int *xp, int *yp) int t0 = *xp; int t1 = *yp; *xp = t1; *yp
CSC 2400: Computing Systems. X86 Assembly: Function Calls
CSC 24: Computing Systems X86 Assembly: Function Calls 1 Lecture Goals Challenges of supporting functions Providing information for the called function Function arguments and local variables Allowing the
Calling Conventions. See P&H 2.8 and Hakim Weatherspoon CS 3410, Spring 2013 Computer Science Cornell University
Calling Conventions See P&H 2.8 and 2.12 Hakim Weatherspoon CS 3410, Spring 2013 Computer Science Cornell University Goals for Today Review: Calling Conventions call a routine (i.e. transfer control to
16.317: Microprocessor Systems Design I Fall 2015
16.317: Microprocessor Systems Design I Fall 2015 Exam 2 Solution 1. (16 points, 4 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response by circling
CS61 Section Solutions 3
CS61 Section Solutions 3 (Week of 10/1-10/5) 1. Assembly Operand Specifiers 2. Condition Codes 3. Jumps 4. Control Flow Loops 5. Procedure Calls 1. Assembly Operand Specifiers Q1 Operand Value %eax 0x104
x86 assembly CS449 Spring 2016
x86 assembly CS449 Spring 2016 CISC vs. RISC CISC [Complex instruction set Computing] - larger, more feature-rich instruction set (more operations, addressing modes, etc.). slower clock speeds. fewer general
X86 Assembly -Procedure II:1
X86 Assembly -Procedure II:1 IA32 Object Code Setup Label.L61 becomes address 0x8048630 Label.L62 becomes address 0x80488dc Assembly Code switch_eg:... ja.l61 # if > goto default jmp *.L62(,%edx,4) # goto
CMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING PREVIEW SLIDES 16, SPRING 2013
CMSC 313 COMPUTER ORGANIZATION & ASSEMBLY LANGUAGE PROGRAMMING PREVIEW SLIDES 16, SPRING 2013 CONST POINTERS CONST POINTERS 4 ways to declare pointers in combination with const:!! int *ptr! const int *ptr!
Chapter 4! Processor Architecture!
Chapter 4! Processor Architecture!! Y86 Instruction Set Architecture! Instructor: Dr. Hyunyoung Lee! Texas A&M University! Based on slides provided by Randal E. Bryant, CMU Why Learn Processor Design?!
Program Exploitation Intro
Program Exploitation Intro x86 Assembly 04//2018 Security 1 Univeristà Ca Foscari, Venezia What is Program Exploitation "Making a program do something unexpected and not planned" The right bugs can be
CS , Fall 2004 Exam 1
Andrew login ID: Full Name: CS 15-213, Fall 2004 Exam 1 Tuesday October 12, 2004 Instructions: Make sure that your exam is not missing any sheets, then write your full name and Andrew login ID on the front.
%r8 %r8d. %r9 %r9d. %r10 %r10d. %r11 %r11d. %r12 %r12d. %r13 %r13d. %r14 %r14d %rbp. %r15 %r15d. Sean Barker
Procedure Call Registers Return %rax %eax %r8 %r8d Arg 5 %rbx %ebx %r9 %r9d Arg 6 Arg 4 %rcx %ecx %r10 %r10d Arg 3 %rdx %edx %r11 %r11d Arg 2 %rsi %esi %r12 %r12d Arg 1 %rdi %edi %r13 %r13d ptr %esp %r14
Digital Forensics Lecture 3 - Reverse Engineering
Digital Forensics Lecture 3 - Reverse Engineering Low-Level Software Akbar S. Namin Texas Tech University Spring 2017 Reverse Engineering High-Level Software Low-level aspects of software are often the
CS24: INTRODUCTION TO COMPUTING SYSTEMS. Spring 2016 Lecture 12
CS24: INTRODUCTION TO COMPUTING SYSTEMS Spring 2016 Lecture 12 CS24 MIDTERM Midterm format: 6 hour overall time limit, multiple sittings (If you are focused on midterm, clock should be running.) Open book
Assignment 11: functions, calling conventions, and the stack
Assignment 11: functions, calling conventions, and the stack ECEN 4553 & 5013, CSCI 4555 & 5525 Prof. Jeremy G. Siek December 5, 2008 The goal of this week s assignment is to remove function definitions
Sungkyunkwan University
Switch statements IA 32 Procedures Stack Structure Calling Conventions Illustrations of Recursion & Pointers long switch_eg (long x, long y, long z) { long w = 1; switch(x) { case 1: w = y*z; break; case
CS642: Computer Security
X86 Review Process Layout, ISA, etc. CS642: Computer Security Drew Davidson davidson@cs.wisc.edu From Last Week ACL- based permissions (UNIX style) Read, Write, execute can be restricted on users and groups
CPS104 Recitation: Assembly Programming
CPS104 Recitation: Assembly Programming Alexandru Duțu 1 Facts OS kernel and embedded software engineers use assembly for some parts of their code some OSes had their entire GUIs written in assembly in
cmovxx ra, rb 2 fn ra rb irmovl V, rb rb V rmmovl ra, D(rB) 4 0 ra rb D mrmovl D(rB), ra 5 0 ra rb D OPl ra, rb 6 fn ra rb jxx Dest 7 fn Dest
Instruction Set Architecture Instruction Set Architecture CSci 2021: Machine Architecture and Organization Lecture #16, February 25th, 2015 Your instructor: Stephen McCamant Based on slides originally
Chapter 11. Addressing Modes
Chapter 11 Addressing Modes 1 2 Chapter 11 11 1 Register addressing mode is the most efficient addressing mode because the operands are in the processor itself (there is no need to access memory). Chapter
3. Process Management in xv6
Lecture Notes for CS347: Operating Systems Mythili Vutukuru, Department of Computer Science and Engineering, IIT Bombay 3. Process Management in xv6 We begin understanding xv6 process management by looking
Sungkyunkwan University
u Complete addressing mode, address computa3on (leal) u Arithme3c opera3ons u x86-64 u Control: Condi3on codes u Condi3onal branches u While loops int absdiff(int x, int y) { int result; if (x > y) { result
Function Call Convention
Function Call Convention Compass Security Schweiz AG Werkstrasse 20 Postfach 2038 CH-8645 Jona Tel +41 55 214 41 60 Fax +41 55 214 41 61 team@csnc.ch www.csnc.ch Content Intel Architecture Memory Layout
CS241 Computer Organization Spring 2015 IA
CS241 Computer Organization Spring 2015 IA-32 2-10 2015 Outline! Review HW#3 and Quiz#1! More on Assembly (IA32) move instruction (mov) memory address computation arithmetic & logic instructions (add,
Instruction Set Architecture
CISC 360 Instruction Set Architecture Michela Taufer October 9, 2008 Powerpoint Lecture Notes for Computer Systems: A Programmer's Perspective, R. Bryant and D. O'Hallaron, Prentice Hall, 2003 Chapter
CISC 360 Instruction Set Architecture
CISC 360 Instruction Set Architecture Michela Taufer October 9, 2008 Powerpoint Lecture Notes for Computer Systems: A Programmer's Perspective, R. Bryant and D. O'Hallaron, Prentice Hall, 2003 Chapter
1 /* file cpuid2.s */ 4.asciz "The processor Vendor ID is %s \n" 5.section.bss. 6.lcomm buffer, section.text. 8.globl _start.
1 /* file cpuid2.s */ 2.section.data 3 output: 4.asciz "The processor Vendor ID is %s \n" 5.section.bss 6.lcomm buffer, 12 7.section.text 8.globl _start 9 _start: 10 movl $0, %eax 11 cpuid 12 movl $buffer,
CS3330 Exam 1 Spring Name: CS3330 Spring 2015 Exam 1 Page 1 of 6 ID: KEY
S3330 Spring 2015 xam 1 Page 1 of 6 mail I: KY S3330 xam 1 Spring 2015 Name: irections: Put the letter of your selection or the short answer requested in the box. Write clearly: if we are unsure what you
Access. Young W. Lim Fri. Young W. Lim Access Fri 1 / 18
Access Young W. Lim 2017-01-27 Fri Young W. Lim Access 2017-01-27 Fri 1 / 18 Outline 1 Introduction References IA32 Operand Forms Data Movement Instructions Young W. Lim Access 2017-01-27 Fri 2 / 18 Based
Review Questions. 1 The DRAM problem [5 points] Suggest a solution. 2 Big versus Little Endian Addressing [5 points]
![Review Questions. 1 The DRAM problem [5 points] Suggest a solution. 2 Big versus Little Endian Addressing [5 points]](/thumbs/80/81375776.jpg "Review Questions. 1 The DRAM problem [5 points] Suggest a solution. 2 Big versus Little Endian Addressing [5 points]")
Review Questions 1 The DRAM problem [5 points] Suggest a solution 2 Big versus Little Endian Addressing [5 points] Consider the 32-bit hexadecimal number 0x21d3ea7d. 1. What is the binary representation
x86 Assembly Tutorial COS 318: Fall 2017
x86 Assembly Tutorial COS 318: Fall 2017 Project 1 Schedule Design Review: Monday 9/25 Sign up for 10-min slot from 3:00pm to 7:00pm Complete set up and answer posted questions (Official) Precept: Monday
CS61, Fall 2012 Midterm Review Section
CS61, Fall 2012 Midterm Review Section (10/16/2012) Q1: Hexadecimal and Binary Notation - Solve the following equations and put your answers in hex, decimal and binary. Hexadecimal Decimal Binary 15 +
Register Allocation, i. Overview & spilling
Register Allocation, i Overview & spilling 1 L1 p ::=(label f...) f ::=(label nat nat i...) i ::=(w
238P: Operating Systems. Lecture 3: Calling conventions. Anton Burtsev October, 2018
238P: Operating Systems Lecture 3: Calling conventions Anton Burtsev October, 2018 What does CPU do internally? (Remember Lecture 01 - Introduction?) CPU execution loop CPU repeatedly reads instructions
Assembly Language Lab # 9
Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 9 Stacks and Subroutines Eng. Doaa Abu Jabal Assembly Language Lab # 9 Stacks and Subroutines
Access. Young W. Lim Sat. Young W. Lim Access Sat 1 / 19
Access Young W. Lim 2017-06-10 Sat Young W. Lim Access 2017-06-10 Sat 1 / 19 Outline 1 Introduction References IA32 Operand Forms Data Movement Instructions Data Movement Examples Young W. Lim Access 2017-06-10
Lecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86
Lecture 15 Intel Manual, Vol. 1, Chapter 3 Hampden-Sydney College Fri, Mar 6, 2009 Outline 1 2 Overview See the reference IA-32 Intel Software Developer s Manual Volume 1: Basic, Chapter 3. Instructions
An Experience Like No Other. Stack Discipline Aug. 30, 2006
15-410 An Experience Like No Other Discipline Aug. 30, 2006 Bruce Maggs Dave Eckhardt Slides originally stolen from 15-213 15-410, F 06 Synchronization Registration If you're here but not registered, please
Ausgewählte Betriebssysteme. Anatomy of a system call
Ausgewählte Betriebssysteme Anatomy of a system call 1 User view #include int main(void) { printf( Hello World!\n ); return 0; } 2 3 Syscall (1) User: write(fd, buffer, sizeof(buffer)); size
Stack Discipline Jan. 19, 2018
15-410 An Experience Like No Other Discipline Jan. 19, 2018 Dave Eckhardt Brian Railing Slides originally stolen from 15-213 1 15-410, S 18 Synchronization Registration The wait list will probably be done
You may work with a partner on this quiz; both of you must submit your answers.
Instructions: Choose the best answer for each of the following questions. It is possible that several answers are partially correct, but one answer is best. It is also possible that several answers are
ANITA S SUPER AWESOME RECITATION SLIDES
ANITA S SUPER AWESOME RECITATION SLIDES 15/18-213: Introduction to Computer Systems Stacks and Buflab, 11 Jun 2013 Anita Zhang, Section M WHAT S NEW (OR NOT) Bomblab is due tonight, 11:59 PM EDT Your late
BUFFER OVERFLOW DEFENSES & COUNTERMEASURES
BUFFER OVERFLOW DEFENSES & COUNTERMEASURES CMSC 414 FEB 01 2018 RECALL OUR CHALLENGES How can we make these even more difficult? Putting code into the memory (no zeroes) Finding the return address (guess
Region of memory managed with stack discipline Grows toward lower addresses. Register %esp contains lowest stack address = address of top element
Machine Representa/on of Programs: Procedures Instructors: Sanjeev Se(a 1 IA32 Stack Region of memory managed with stack discipline Grows toward lower addresses Stack BoGom Increasing Addresses Register
16.317: Microprocessor Systems Design I Fall 2014
16.317: Microprocessor Systems Design I Fall 2014 Exam 2 Solution 1. (16 points, 4 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response by circling
Lab 10: Introduction to x86 Assembly
CS342 Computer Security Handout # 8 Prof. Lyn Turbak Wednesday, Nov. 07, 2012 Wellesley College Revised Nov. 09, 2012 Lab 10: Introduction to x86 Assembly Revisions: Nov. 9 The sos O3.s file on p. 10 was