CSE303 Logic Design II Laboratory 01

Size: px
Start display at page:

Download "CSE303 Logic Design II Laboratory 01"

Transcription

1 CSE303 Logic Design II Laboratory 01 # Student ID Student Name Grade (10) 1 Instructor signature Delivery Date -1 / 15 -

2 Experiment 01 (Half adder) Objectives In the first experiment, a half adder is implemented exclusively using AND/NAND or OR/NOR gates. Circuit diagrams This experiment is set up according to the circuit diagram shown below. Virtual instruments Set the instruments to 8 bits and the display to decimal (DEC). Experiment set-up -2 / 15 -

3 Virtual instruments Set the instruments to 8 bits and the display to decimal (DEC). Experiment set-up -3 / 15 -

4 Evaluation Enter into the table the responses you see at the output when various inputs are applied. Truth table: A B Sum (S) Carry(C) From the truth table for the addition of two single-bit operands it can be seen that output S, the "Sum" output, is only ever "1" if no more than one operand has a value of "1". What logical operation has the same effect? Exclusive NOR, XNOR or equivalence Exclusive AND, XAND or equivalence Exclusive OR, XOR or antivalence A carry of C = 1 is output by the half-adder circuit when operand and operand B simultaneously have the value "1". What logical circuit has the same effect as this? NAND circuit OR circuit AND circuit Test of knowledge Use this table to determine the logic equation for a half adder. Logic equation for half-adder S (sum) output: S = (A B) (A B) S = (A B) + (A B) S = (A B) + (A B) Logic function for half adder C (carry) output: -4 / 15 -

5 C = A + B C = A B C = A B -5 / 15 -

6 Experiment 02 (Full adder) Experiment set-up -6 / 15 -

7 Evaluation Vary the logic level using the input switches at the input to the circuit in accordance with the truth table provided and determine the output responses whích are missing from the table. A B C Sum (S) Carry (c n+1 ) Karnaugh maps The Karnaugh-Veitch diagrams below show the contents of the truth table with separate entries for the sum and carry outputs. Sum output: A A B B C C C Carry output: A A B B C C C What range of numbers can be added together using a 1-bit full adder? -7 / 15 -

8 Test of knowledge Decimal numbers 6 and 16 are to be added together. How many 1-bit full adders need to be cascaded together to accomplish this? Only one Ten Four Five -8 / 15 -

9 Experiment 03 (4-bit numbers) Circuit diagram Experiment set-up Evaluation Decimal Binary / 15 -

10 Inputs A-D Inputs E-H Carry 10 Sum Decimal Binary Inputs A-D Inputs E-H Carry 24 Sum Do your calculated results agree with the actual results of the experiment? Yes No -10 / 15 -

11 Experiment 04 (Half subtractor) Circuit diagram Experiment set-up Evaluation Enter into the table the responses of the difference and carry/borrow-bit outputs when various logical inputs are applied. Truth table for half-subtractors): -11 / 15 -

12 A B Difference (D) Logic equation for difference: D = (A B) + (A B) D = (A B) (A B) D = (A B) + (A B) Carry (C) Logic equation for borrow (carry): C = A B C = A B C = A B -12 / 15 -

13 Experiment 05 (Full subtractor) Circuit diagram -13 / 15 -

14 Experiment set-up Evaluation Fill out the truth table provided by entering the responses of the full subtractor circuit. Truth table: A B C Difference (D) Carry (c n+1 ) Logic equation for difference: -14 / 15 -

15 D = (A B C) + (A B C) + (A B C) (A B C) D = (A B C) + (A B C) + (A B C) + (A B C) D = (A B C) + (A B C) + (A B C) + (A B C) Logic equation for borrow (carry): C n+1 = (A C) + (B C) + (A B) C n+1 = (A C) + (B C) + (A B) C n+1 = (A C) (B C) (A B) -15 / 15 -

LAB #1 BASIC DIGITAL CIRCUIT

LAB #1 BASIC DIGITAL CIRCUIT LAB #1 BASIC DIGITAL CIRCUIT OBJECTIVES 1. To study the operation of basic logic gates. 2. To build a logic circuit from Boolean expressions. 3. To introduce some basic concepts and laboratory techniques

More information

Binary Adders: Half Adders and Full Adders

Binary Adders: Half Adders and Full Adders Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order

More information

Objectives: 1. Design procedure. 2. Fundamental circuits. 1. Design procedure

Objectives: 1. Design procedure. 2. Fundamental circuits. 1. Design procedure Objectives: 1. Design procedure. 2. undamental circuits. 1. Design procedure Design procedure has five steps: o Specification. o ormulation. o Optimization. o Technology mapping. o Verification. Specification:

More information

Basic Arithmetic (adding and subtracting)

Basic Arithmetic (adding and subtracting) Basic Arithmetic (adding and subtracting) Digital logic to show add/subtract Boolean algebra abstraction of physical, analog circuit behavior 1 0 CPU components ALU logic circuits logic gates transistors

More information

LOGIC CIRCUITS. Kirti P_Didital Design 1

LOGIC CIRCUITS. Kirti P_Didital Design 1 LOGIC CIRCUITS Kirti P_Didital Design 1 Introduction The digital system consists of two types of circuits, namely (i) Combinational circuits and (ii) Sequential circuit A combinational circuit consists

More information

NAND. Grade (10) Instructor. Logic Design 1 / 13

NAND. Grade (10) Instructor. Logic Design 1 / 13 Logic Design I Laboratory 02 NAND NOR XOR # Student ID 1 Student Name Grade (10) Instructor signature 2 3 Delivery Date 1 / 13 Objective To find the basic NAND & NOR & XOR gates concept and study on multiple

More information

BUILDING BLOCKS OF A BASIC MICROPROCESSOR. Part 1 PowerPoint Format of Lecture 3 of Book

BUILDING BLOCKS OF A BASIC MICROPROCESSOR. Part 1 PowerPoint Format of Lecture 3 of Book BUILDING BLOCKS OF A BASIC MICROPROCESSOR Part PowerPoint Format of Lecture 3 of Book Decoder Tri-state device Full adder, full subtractor Arithmetic Logic Unit (ALU) Memories Example showing how to write

More information

Chapter Three. Digital Components

Chapter Three. Digital Components Chapter Three 3.1. Combinational Circuit A combinational circuit is a connected arrangement of logic gates with a set of inputs and outputs. The binary values of the outputs are a function of the binary

More information

Philadelphia University Student Name: Student Number:

Philadelphia University Student Name: Student Number: Philadelphia University Student Name: Student Number: Faculty of Engineering Serial Number: Final Exam, First Semester: 2018/2019 Dept. of Computer Engineering Course Title: Logic Circuits Date: 03/01/2019

More information

Department of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 Combinational Logic

Department of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 Combinational Logic Department of Electrical Engineering McGill University ECSE 221 Introduction to Computer Engineering Assignment 2 Combinational Logic Question 1: Due October 19 th, 2009 A convenient shorthand for specifying

More information

Student Number: UTORid: Question 0. [1 mark] Read and follow all instructions on this page, and fill in all fields.

Student Number: UTORid: Question 0. [1 mark] Read and follow all instructions on this page, and fill in all fields. CSC 258H1 Y 2016 Midterm Test Duration 1 hour and 50 minutes Aids allowed: none Student Number: UTORid: Last Name: First Name: Question 0. [1 mark] Read and follow all instructions on this page, and fill

More information

How a Digital Binary Adder Operates

How a Digital Binary Adder Operates Overview of a Binary Adder How a Digital Binary Adder Operates By: Shawn R Moser A binary adder is a digital electronic component that is used to perform the addition of two binary numbers and return the

More information

Experiment 7 Arithmetic Circuits Design and Implementation

Experiment 7 Arithmetic Circuits Design and Implementation Experiment 7 Arithmetic Circuits Design and Implementation Introduction: Addition is just what you would expect in computers. Digits are added bit by bit from right to left, with carries passed to the

More information

Electronic Engineering Part 1 Laboratory Experiment. Digital Circuit Design 1 Combinational Logic. (3 hours)

Electronic Engineering Part 1 Laboratory Experiment. Digital Circuit Design 1 Combinational Logic. (3 hours) Electronic Engineering Part 1 Laboratory Experiment Digital Circuit Design 1 Combinational Logic (3 hours) 1. Introduction These days most signal processing is done digitally. Electronic signals (representing

More information

COMBINATIONAL LOGIC CIRCUITS

COMBINATIONAL LOGIC CIRCUITS COMBINATIONAL LOGIC CIRCUITS 4.1 INTRODUCTION The digital system consists of two types of circuits, namely: (i) Combinational circuits and (ii) Sequential circuits A combinational circuit consists of logic

More information

1. Mark the correct statement(s)

1. Mark the correct statement(s) 1. Mark the correct statement(s) 1.1 A theorem in Boolean algebra: a) Can easily be proved by e.g. logic induction b) Is a logical statement that is assumed to be true, c) Can be contradicted by another

More information

Von Neumann Architecture

Von Neumann Architecture Von Neumann Architecture Assist lecturer Donya A. Khalid Lecture 2 2/29/27 Computer Organization Introduction In 945, just after the World War, Jon Von Neumann proposed to build a more flexible computer.

More information

Date Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 09 MULTIPLEXERS

Date Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 09 MULTIPLEXERS Name: Instructor: Engr. Date Performed: Marks Obtained: /10 Group Members (ID):. Checked By: Date: Experiment # 09 MULTIPLEXERS OBJECTIVES: To experimentally verify the proper operation of a multiplexer.

More information

DIGITAL CIRCUIT LOGIC UNIT 7: MULTI-LEVEL GATE CIRCUITS NAND AND NOR GATES

DIGITAL CIRCUIT LOGIC UNIT 7: MULTI-LEVEL GATE CIRCUITS NAND AND NOR GATES DIGITAL CIRCUIT LOGIC UNIT 7: MULTI-LEVEL GATE CIRCUITS NAND AND NOR GATES 1 iclicker Question 13 Considering the K-Map, f can be simplified as (2 minutes): A) f = b c + a b c B) f = ab d + a b d AB CD

More information

Combinational Logic Circuits

Combinational Logic Circuits Combinational Logic Circuits By Dr. M. Hebaishy Digital Logic Design Ch- Rem.!) Types of Logic Circuits Combinational Logic Memoryless Outputs determined by current values of inputs Sequential Logic Has

More information

60-265: Winter ANSWERS Exercise 4 Combinational Circuit Design

60-265: Winter ANSWERS Exercise 4 Combinational Circuit Design 60-265: Winter 2010 Computer Architecture I: Digital Design ANSWERS Exercise 4 Combinational Circuit Design Question 1. One-bit Comparator [ 1 mark ] Consider two 1-bit inputs, A and B. If we assume that

More information

Chapter 3: part 3 Binary Subtraction

Chapter 3: part 3 Binary Subtraction Chapter 3: part 3 Binary Subtraction Iterative combinational circuits Binary adders Half and full adders Ripple carry and carry lookahead adders Binary subtraction Binary adder-subtractors Signed binary

More information

Lecture #21 March 31, 2004 Introduction to Gates and Circuits

Lecture #21 March 31, 2004 Introduction to Gates and Circuits Lecture #21 March 31, 2004 Introduction to Gates and Circuits To this point we have looked at computers strictly from the perspective of assembly language programming. While it is possible to go a great

More information

ECEN 468 Advanced Logic Design

ECEN 468 Advanced Logic Design ECEN 468 Advanced Logic Design Lecture 26: Verilog Operators ECEN 468 Lecture 26 Operators Operator Number of Operands Result Arithmetic 2 Binary word Bitwise 2 Binary word Reduction 1 Bit Logical 2 Boolean

More information

Chapter 4 Arithmetic Functions

Chapter 4 Arithmetic Functions Logic and Computer Design Fundamentals Chapter 4 Arithmetic Functions Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show mode) Overview Iterative combinational

More information

Combinational Logic II

Combinational Logic II Combinational Logic II Ranga Rodrigo July 26, 2009 1 Binary Adder-Subtractor Digital computers perform variety of information processing tasks. Among the functions encountered are the various arithmetic

More information

KING FAHD UNIVERSITY OF PETROLEUM & MINERALS COMPUTER ENGINEERING DEPARTMENT

KING FAHD UNIVERSITY OF PETROLEUM & MINERALS COMPUTER ENGINEERING DEPARTMENT KING FAHD UNIVERSITY OF PETROLEUM & MINERALS COMPUTER ENGINEERING DEPARTMENT COE 202: Digital Logic Design Term 162 (Spring 2017) Instructor: Dr. Abdulaziz Barnawi Class time: U.T.R.: 11:00-11:50AM Class

More information

Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions

Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make

More information

CONTENTS CHAPTER 1: NUMBER SYSTEM. Foreword...(vii) Preface... (ix) Acknowledgement... (xi) About the Author...(xxiii)

CONTENTS CHAPTER 1: NUMBER SYSTEM. Foreword...(vii) Preface... (ix) Acknowledgement... (xi) About the Author...(xxiii) CONTENTS Foreword...(vii) Preface... (ix) Acknowledgement... (xi) About the Author...(xxiii) CHAPTER 1: NUMBER SYSTEM 1.1 Digital Electronics... 1 1.1.1 Introduction... 1 1.1.2 Advantages of Digital Systems...

More information

DLD VIDYA SAGAR P. potharajuvidyasagar.wordpress.com. Vignana Bharathi Institute of Technology UNIT 3 DLD P VIDYA SAGAR

DLD VIDYA SAGAR P. potharajuvidyasagar.wordpress.com. Vignana Bharathi Institute of Technology UNIT 3 DLD P VIDYA SAGAR DLD UNIT III Combinational Circuits (CC), Analysis procedure, Design Procedure, Combinational circuit for different code converters and other problems, Binary Adder- Subtractor, Decimal Adder, Binary Multiplier,

More information

Real Digital Problem Set #6

Real Digital Problem Set #6 Real igital Problem et #6. (2 points) ketch a block diagram for a magnitude comparator bit-slice circuit. Create K-maps to define the bit-slice circuit, and use them to find optimal logic equations. ketch

More information

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010 Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate

More information

Institute of Engineering & Management

Institute of Engineering & Management Course:CS493- Computer Architecture Lab PROGRAMME: COMPUTERSCIENCE&ENGINEERING DEGREE:B. TECH COURSE: Computer Architecture Lab SEMESTER: 4 CREDITS: 2 COURSECODE: CS493 COURSE TYPE: Practical COURSE AREA/DOMAIN:

More information

Experiment 9: Binary Arithmetic Circuits. In-Lab Procedure and Report (30 points)

Experiment 9: Binary Arithmetic Circuits. In-Lab Procedure and Report (30 points) ELEC 2010 Laboratory Manual Experiment 9 In-Lab Procedure Page 1 of 7 Experiment 9: Binary Arithmetic Circuits In-Lab Procedure and Report (30 points) Before starting the procedure, record the table number

More information

Experimental Methods I

Experimental Methods I Experimental Methods I Computing: Data types and binary representation M.P. Vaughan Learning objectives Understanding data types for digital computers binary representation of different data types: Integers

More information

Midterm Exam Review. CS 2420 :: Fall 2016 Molly O'Neil

Midterm Exam Review. CS 2420 :: Fall 2016 Molly O'Neil Midterm Exam Review CS 2420 :: Fall 2016 Molly O'Neil Midterm Exam Thursday, October 20 In class, pencil & paper exam Closed book, closed notes, no cell phones or calculators, clean desk 20% of your final

More information

DIGITAL ELECTRONICS. Vayu Education of India

DIGITAL ELECTRONICS. Vayu Education of India DIGITAL ELECTRONICS ARUN RANA Assistant Professor Department of Electronics & Communication Engineering Doon Valley Institute of Engineering & Technology Karnal, Haryana (An ISO 9001:2008 ) Vayu Education

More information

Chapter 4. Combinational Logic. Dr. Abu-Arqoub

Chapter 4. Combinational Logic. Dr. Abu-Arqoub Chapter 4 Combinational Logic Introduction N Input Variables Combinational Logic Circuit M Output Variables 2 Design Procedure The problem is stated 2 The number of available input variables & required

More information

EE 8351 Digital Logic Circuits Ms.J.Jayaudhaya, ASP/EEE

EE 8351 Digital Logic Circuits Ms.J.Jayaudhaya, ASP/EEE EE 8351 Digital Logic Circuits Ms.J.Jayaudhaya, ASP/EEE 1 Logic circuits for digital systems may be combinational or sequential. A combinational circuit consists of input variables, logic gates, and output

More information

GC03 Boolean Algebra

GC03 Boolean Algebra Why study? GC3 Boolean Algebra Computers transfer and process binary representations of data. Binary operations are easily represented and manipulated in Boolean algebra! Digital electronics is binary/boolean

More information

B.Tech II Year I Semester (R13) Regular Examinations December 2014 DIGITAL LOGIC DESIGN

B.Tech II Year I Semester (R13) Regular Examinations December 2014 DIGITAL LOGIC DESIGN B.Tech II Year I Semester () Regular Examinations December 2014 (Common to IT and CSE) (a) If 1010 2 + 10 2 = X 10, then X is ----- Write the first 9 decimal digits in base 3. (c) What is meant by don

More information

Henry Lin, Department of Electrical and Computer Engineering, California State University, Bakersfield Lecture 7 (Digital Logic) July 24 th, 2012

Henry Lin, Department of Electrical and Computer Engineering, California State University, Bakersfield Lecture 7 (Digital Logic) July 24 th, 2012 Henry Lin, Department of Electrical and Computer Engineering, California State University, Bakersfield Lecture 7 (Digital Logic) July 24 th, 2012 1 Digital vs Analog Digital signals are binary; analog

More information

TWO-LEVEL COMBINATIONAL LOGIC

TWO-LEVEL COMBINATIONAL LOGIC TWO-LEVEL COMBINATIONAL LOGIC OVERVIEW Canonical forms To-level simplification Boolean cubes Karnaugh maps Quine-McClusky (Tabulation) Method Don't care terms Canonical and Standard Forms Minterms and

More information

SIR C.R.REDDY COLLEGE OF ENGINEERING, ELURU DEPARTMENT OF INFORMATION TECHNOLOGY LESSON PLAN

SIR C.R.REDDY COLLEGE OF ENGINEERING, ELURU DEPARTMENT OF INFORMATION TECHNOLOGY LESSON PLAN SIR C.R.REDDY COLLEGE OF ENGINEERING, ELURU DEPARTMENT OF INFORMATION TECHNOLOGY LESSON PLAN SUBJECT: CSE 2.1.6 DIGITAL LOGIC DESIGN CLASS: 2/4 B.Tech., I SEMESTER, A.Y.2017-18 INSTRUCTOR: Sri A.M.K.KANNA

More information

Register Transfer Language and Microoperations (Part 2)

Register Transfer Language and Microoperations (Part 2) Register Transfer Language and Microoperations (Part 2) Adapted by Dr. Adel Ammar Computer Organization 1 MICROOPERATIONS Computer system microoperations are of four types: Register transfer microoperations

More information

www.vidyarthiplus.com Question Paper Code : 31298 B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2013. Third Semester Computer Science and Engineering CS 2202/CS 34/EC 1206 A/10144 CS 303/080230012--DIGITAL

More information

Combinational Circuits

Combinational Circuits Combinational Circuits Combinational circuit consists of an interconnection of logic gates They react to their inputs and produce their outputs by transforming binary information n input binary variables

More information

Chapter 4 Arithmetic

Chapter 4 Arithmetic Computer Eng 1 (ECE290) Chapter 4 Arithmetic Functions and Circuits HOANG Trang Reference: 2008 Pearson Education, Inc. Lecture note of Prof.Donna J.Brown Overview Binary adders Half and full adders Ripple

More information

Combinational Circuits

Combinational Circuits Combinational Circuits Jason Filippou CMSC250 @ UMCP 06-02-2016 ason Filippou (CMSC250 @ UMCP) Circuits 06-02-2016 1 / 1 Outline ason Filippou (CMSC250 @ UMCP) Circuits 06-02-2016 2 / 1 Hardware design

More information

Chapter 3 Arithmetic for Computers

Chapter 3 Arithmetic for Computers Chapter 3 Arithmetic for Computers 1 Arithmetic Where we've been: Abstractions: Instruction Set Architecture Assembly Language and Machine Language What's up ahead: Implementing the Architecture operation

More information

CENG 241 Digital Design 1

CENG 241 Digital Design 1 CENG 241 Digital Design 1 Lecture 5 Amirali Baniasadi amirali@ece.uvic.ca This Lecture Lab Review of last lecture: Gate-Level Minimization Continue Chapter 3:XOR functions, Hardware Description Language

More information

REGISTER TRANSFER LANGUAGE

REGISTER TRANSFER LANGUAGE REGISTER TRANSFER LANGUAGE The operations executed on the data stored in the registers are called micro operations. Classifications of micro operations Register transfer micro operations Arithmetic micro

More information

Computer Architecture and Organization: L04: Micro-operations

Computer Architecture and Organization: L04: Micro-operations Computer Architecture and Organization: L4: Micro-operations By: A. H. Abdul Hafez Abdul.hafez@hku.edu.tr, ah.abdulhafez@gmail.com, hafez@research.iiit.ac.in 1 Outlines 1. Arithmetic microoperation 2.

More information

UPY14602-DIGITAL ELECTRONICS AND MICROPROCESSORS Lesson Plan

UPY14602-DIGITAL ELECTRONICS AND MICROPROCESSORS Lesson Plan UPY14602-DIGITAL ELECTRONICS AND MICROPROCESSORS Lesson Plan UNIT I - NUMBER SYSTEMS AND LOGIC GATES Introduction to decimal- Binary- Octal- Hexadecimal number systems-inter conversions-bcd code- Excess

More information

Computer Organization

Computer Organization Register Transfer Logic Department of Computer Science Missouri University of Science & Technology hurson@mst.edu 1 Note, this unit will be covered in three lectures. In case you finish it earlier, then

More information

Computer Logical Organization Tutorial

Computer Logical Organization Tutorial Computer Logical Organization Tutorial COMPUTER LOGICAL ORGANIZATION TUTORIAL Simply Easy Learning by tutorialspoint.com tutorialspoint.com i ABOUT THE TUTORIAL Computer Logical Organization Tutorial Computer

More information

II/IV B.Tech (Regular/Supplementary) DEGREE EXAMINATION. Answer ONE question from each unit.

II/IV B.Tech (Regular/Supplementary) DEGREE EXAMINATION. Answer ONE question from each unit. Hall Ticket Number: 14CS IT303 November, 2017 Third Semester Time: Three Hours Answer Question No.1 compulsorily. II/IV B.Tech (Regular/Supplementary) DEGREE EXAMINATION Common for CSE & IT Digital Logic

More information

UNIT-III REGISTER TRANSFER LANGUAGE AND DESIGN OF CONTROL UNIT

UNIT-III REGISTER TRANSFER LANGUAGE AND DESIGN OF CONTROL UNIT UNIT-III 1 KNREDDY UNIT-III REGISTER TRANSFER LANGUAGE AND DESIGN OF CONTROL UNIT Register Transfer: Register Transfer Language Register Transfer Bus and Memory Transfers Arithmetic Micro operations Logic

More information

Introduction to Boole algebra. Binary algebra

Introduction to Boole algebra. Binary algebra Introduction to Boole algebra Binary algebra Boole algebra George Boole s book released in 1847 We have only two digits: true and false We have NOT, AND, OR, XOR etc operations We have axioms and theorems

More information

Digital Logic Design Exercises. Assignment 1

Digital Logic Design Exercises. Assignment 1 Assignment 1 For Exercises 1-5, match the following numbers with their definition A Number Natural number C Integer number D Negative number E Rational number 1 A unit of an abstract mathematical system

More information

UNIT II - COMBINATIONAL LOGIC Part A 2 Marks. 1. Define Combinational circuit A combinational circuit consist of logic gates whose outputs at anytime are determined directly from the present combination

More information

QUESTION BANK FOR TEST

QUESTION BANK FOR TEST CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice

More information

Dec Hex Bin ORG ; ZERO. Introduction To Computing

Dec Hex Bin ORG ; ZERO. Introduction To Computing Dec Hex Bin 0 0 00000000 ORG ; ZERO Introduction To Computing OBJECTIVES this chapter enables the student to: Convert any number from base 2, base 10, or base 16 to any of the other two bases. Add and

More information

Logic design Ibn Al Haitham collage /Computer science Eng. Sameer

Logic design Ibn Al Haitham collage /Computer science Eng. Sameer DEMORGAN'S THEOREMS One of DeMorgan's theorems stated as follows: The complement of a product of variables is equal to the sum of the complements of the variables. DeMorgan's second theorem is stated as

More information

Written exam for IE1204/5 Digital Design Thursday 29/

Written exam for IE1204/5 Digital Design Thursday 29/ Written exam for IE1204/5 Digital Design Thursday 29/10 2015 9.00-13.00 General Information Examiner: Ingo Sander. Teacher: William Sandqvist phone 08-7904487 Exam text does not have to be returned when

More information

R10. II B. Tech I Semester, Supplementary Examinations, May

R10. II B. Tech I Semester, Supplementary Examinations, May SET - 1 1. a) Convert the following decimal numbers into an equivalent binary numbers. i) 53.625 ii) 4097.188 iii) 167 iv) 0.4475 b) Add the following numbers using 2 s complement method. i) -48 and +31

More information

This tutorial gives a complete understanding on Computer Logical Organization starting from basic computer overview till its advanced architecture.

This tutorial gives a complete understanding on Computer Logical Organization starting from basic computer overview till its advanced architecture. About the Tutorial Computer Logical Organization refers to the level of abstraction above the digital logic level, but below the operating system level. At this level, the major components are functional

More information

EXPERIMENT #8: BINARY ARITHMETIC OPERATIONS

EXPERIMENT #8: BINARY ARITHMETIC OPERATIONS EE 2 Lab Manual, EE Department, KFUPM EXPERIMENT #8: BINARY ARITHMETIC OPERATIONS OBJECTIVES: Design and implement a circuit that performs basic binary arithmetic operations such as addition, subtraction,

More information

ELCT 501: Digital System Design

ELCT 501: Digital System Design ELCT 501: Digital System Lecture 4: CAD tools (Continued) Dr. Mohamed Abd El Ghany, Basic VHDL Concept Via an Example Problem: write VHDL code for 1-bit adder 4-bit adder 2 1-bit adder Inputs: A (1 bit)

More information

DIGITAL ELECTRONICS. P41l 3 HOURS

DIGITAL ELECTRONICS. P41l 3 HOURS UNIVERSITY OF SWAZILAND FACUL TY OF SCIENCE AND ENGINEERING DEPARTMENT OF PHYSICS MAIN EXAMINATION 2015/16 TITLE OF PAPER: COURSE NUMBER: TIME ALLOWED: INSTRUCTIONS: DIGITAL ELECTRONICS P41l 3 HOURS ANSWER

More information

Combinational Logic Worksheet

Combinational Logic Worksheet Combinational Logic Worksheet Concept Inventory: Truth tables sum-of-products equations implementation using NOT/AND/OR Demorgan s Law, implementation using NAND/NOR Simplification, truth tables w/ don

More information

THE LOGIC OF COMPOUND STATEMENTS

THE LOGIC OF COMPOUND STATEMENTS CHAPTER 2 THE LOGIC OF COMPOUND STATEMENTS Copyright Cengage Learning. All rights reserved. SECTION 2.5 Application: Number Systems and Circuits for Addition Copyright Cengage Learning. All rights reserved.

More information

Chapter 4. Combinational Logic

Chapter 4. Combinational Logic Chapter 4. Combinational Logic Tong In Oh 1 4.1 Introduction Combinational logic: Logic gates Output determined from only the present combination of inputs Specified by a set of Boolean functions Sequential

More information

ECE468 Computer Organization & Architecture. The Design Process & ALU Design

ECE468 Computer Organization & Architecture. The Design Process & ALU Design ECE6 Computer Organization & Architecture The Design Process & Design The Design Process "To Design Is To Represent" Design activity yields description/representation of an object -- Traditional craftsman

More information

Principles of Computer Architecture. Chapter 3: Arithmetic

Principles of Computer Architecture. Chapter 3: Arithmetic 3-1 Chapter 3 - Arithmetic Principles of Computer Architecture Miles Murdocca and Vincent Heuring Chapter 3: Arithmetic 3-2 Chapter 3 - Arithmetic 3.1 Overview Chapter Contents 3.2 Fixed Point Addition

More information

Logic, Words, and Integers

Logic, Words, and Integers Computer Science 52 Logic, Words, and Integers 1 Words and Data The basic unit of information in a computer is the bit; it is simply a quantity that takes one of two values, 0 or 1. A sequence of k bits

More information

Revision: August 31, E Main Suite D Pullman, WA (509) Voice and Fax

Revision: August 31, E Main Suite D Pullman, WA (509) Voice and Fax Exercise 7: Combinational rithmetic Circuits Revision: ugust 3, 29 25 E Main uite D Pullman, W 9963 (59) 334 636 Voice and Fax TUDENT I am submitting my own work, and I understand penalties will be assessed

More information

Chapter 3. Gate-Level Minimization. Outlines

Chapter 3. Gate-Level Minimization. Outlines Chapter 3 Gate-Level Minimization Introduction The Map Method Four-Variable Map Five-Variable Map Outlines Product of Sums Simplification Don t-care Conditions NAND and NOR Implementation Other Two-Level

More information

Boolean Algebra and Logic Gates

Boolean Algebra and Logic Gates Boolean Algebra and Logic Gates Binary logic is used in all of today's digital computers and devices Cost of the circuits is an important factor Finding simpler and cheaper but equivalent circuits can

More information

COMPUTER ARCHITECTURE AND DIGITAL DESIGN

COMPUTER ARCHITECTURE AND DIGITAL DESIGN SPECIAL MAKEUP - FINAL EXAMINATION COMPUTER ARCHITECTURE AND DIGITAL DESIGN 03-60-265-01 S C H O O L O F C O M P U T E R S C I E N C E - U N I V E R S I T Y O F W I N D S O R Fall 2008 Last Name: First

More information

Gate-Level Minimization. BME208 Logic Circuits Yalçın İŞLER

Gate-Level Minimization. BME208 Logic Circuits Yalçın İŞLER Gate-Level Minimization BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Complexity of Digital Circuits Directly related to the complexity of the algebraic expression we use to

More information

IA Digital Electronics - Supervision I

IA Digital Electronics - Supervision I IA Digital Electronics - Supervision I Nandor Licker Due noon two days before the supervision 1 Overview The goal of this exercise is to design an 8-digit calculator capable of adding

More information

Parallel logic circuits

Parallel logic circuits Computer Mathematics Week 9 Parallel logic circuits College of Information cience and Engineering Ritsumeikan University last week the mathematics of logic circuits the foundation of all digital design

More information

*Instruction Matters: Purdue Academic Course Transformation. Introduction to Digital System Design. Module 4 Arithmetic and Computer Logic Circuits

*Instruction Matters: Purdue Academic Course Transformation. Introduction to Digital System Design. Module 4 Arithmetic and Computer Logic Circuits Purdue IM:PACT* Fall 2018 Edition *Instruction Matters: Purdue Academic Course Transformation Introduction to Digital System Design Module 4 Arithmetic and Computer Logic Circuits Glossary of Common Terms

More information

01 Introduction to Digital Logic. ENGR 3410 Computer Architecture Mark L. Chang Fall 2006

01 Introduction to Digital Logic. ENGR 3410 Computer Architecture Mark L. Chang Fall 2006 Introduction to Digital Logic ENGR 34 Computer Architecture Mark L. Chang Fall 26 Acknowledgements Patterson & Hennessy: Book & Lecture Notes Patterson s 997 course notes (U.C. Berkeley CS 52, 997) Tom

More information

Section 001. Read this before starting!

Section 001. Read this before starting! Points missed: Student's Name: Total score: / points East Tennessee State University Department of Computer and Information Sciences CSCI 25 (Tarnoff) Computer Organization TEST 2 for Fall Semester, 25

More information

1 of 8. I. (13pts) TRUE OR FALSE

1 of 8. I. (13pts) TRUE OR FALSE Sample PLC Final Exam Name (1pt): By signing I agree to abide by the UWA policies governing academic integrity. I. (13pts) TRUE OR FALSE 1. The user memory segment stores information needed to execute

More information

University of Toronto Mississauga. Flip to the back cover and write down your name and student number.

University of Toronto Mississauga. Flip to the back cover and write down your name and student number. University of Toronto Mississauga Midterm Test Course: CSC258H5 Winter 2016 Instructor: Larry Zhang Duration: 50 minutes Aids allowed: None Last Name: Given Name: Flip to the back cover and write down

More information

Propositional Calculus. Math Foundations of Computer Science

Propositional Calculus. Math Foundations of Computer Science Propositional Calculus Math Foundations of Computer Science Propositional Calculus Objective: To provide students with the concepts and techniques from propositional calculus so that they can use it to

More information

2008 The McGraw-Hill Companies, Inc. All rights reserved.

2008 The McGraw-Hill Companies, Inc. All rights reserved. 28 The McGraw-Hill Companies, Inc. All rights reserved. 28 The McGraw-Hill Companies, Inc. All rights reserved. All or Nothing Gate Boolean Expression: A B = Y Truth Table (ee next slide) or AB = Y 28

More information

Hybrid Electronics Laboratory

Hybrid Electronics Laboratory Hybrid Electronics Laboratory Design and Simulation of Various Code Converters Aim: To Design and Simulate Binary to Gray, Gray to Binary, BCD to Excess 3, Excess 3 to BCD code converters. Objectives:

More information

Gate-Level Minimization. section instructor: Ufuk Çelikcan

Gate-Level Minimization. section instructor: Ufuk Çelikcan Gate-Level Minimization section instructor: Ufuk Çelikcan Compleity of Digital Circuits Directly related to the compleity of the algebraic epression we use to build the circuit. Truth table may lead to

More information

Let s put together a Manual Processor

Let s put together a Manual Processor Lecture 14 Let s put together a Manual Processor Hardware Lecture 14 Slide 1 The processor Inside every computer there is at least one processor which can take an instruction, some operands and produce

More information

Code No: R Set No. 1

Code No: R Set No. 1 Code No: R059210504 Set No. 1 II B.Tech I Semester Supplementary Examinations, February 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science

More information

Simplification of Boolean Functions

Simplification of Boolean Functions Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.

More information

NH 67, Karur Trichy Highways, Puliyur C.F, Karur District UNIT-II COMBINATIONAL CIRCUITS

NH 67, Karur Trichy Highways, Puliyur C.F, Karur District UNIT-II COMBINATIONAL CIRCUITS NH 67, Karur Trichy Highways, Puliyur C.F, 639 114 Karur District DEPARTMENT OF ELETRONICS AND COMMUNICATION ENGINEERING COURSE NOTES SUBJECT: DIGITAL ELECTRONICS CLASS: II YEAR ECE SUBJECT CODE: EC2203

More information

ECE 152A LABORATORY 2

ECE 152A LABORATORY 2 ECE 152A LABORATORY 2 Objectives : 1. Understand the trade-off between time- and space-efficiency in the design of adders. In this lab, adders operate on unsigned numbers. 2. Learn how to write Verilog

More information

LECTURE 4. Logic Design

LECTURE 4. Logic Design LECTURE 4 Logic Design LOGIC DESIGN The language of the machine is binary that is, sequences of 1 s and 0 s. But why? At the hardware level, computers are streams of signals. These signals only have two

More information

(ii) Simplify and implement the following SOP function using NOR gates:

(ii) Simplify and implement the following SOP function using NOR gates: DHANALAKSHMI COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING EE6301 DIGITAL LOGIC CIRCUITS UNIT I NUMBER SYSTEMS AND DIGITAL LOGIC FAMILIES PART A 1. How can an OR gate be

More information

Number System. Introduction. Decimal Numbers

Number System. Introduction. Decimal Numbers Number System Introduction Number systems provide the basis for all operations in information processing systems. In a number system the information is divided into a group of symbols; for example, 26

More information