Math 230 Assembly Programming (AKA Computer Organization) Spring MIPS Intro

Transcription

1 Math 230 Assembly Programming (AKA Computer Organization) Spring 2008 MIPS Intro Adapted from slides developed for: Mary J. Irwin PSU CSE331 Dave Patterson s UCB CS152 M230 L09.1 Smith Spring 2008

2 MIPS - originally an acronym for Microprocessor without Interlocked Pipeline Stages) M230 L09.2 Smith Spring 2008

3 M230 L09.3 Smith Spring 2008

4 Below the Program M230 L09.5 Smith Spring 2008

5 Below the Program Machine (object) code (for MIPS) M230 L09.5 Smith Spring 2008

6 Below the Program Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4,$2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) M230 L09.5 Smith Spring 2008

7 Below the Program High-level language program (in C) swap (int v[], int k) {int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4,$2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) M230 L09.5 Smith Spring 2008

8 Below the Program High-level language program (in C) swap (int v[], int k) {int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4,$2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 C compiler Machine (object) code (for MIPS) M230 L09.5 Smith Spring 2008

9 Below the Program High-level language program (in C) swap (int v[], int k) {int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; } Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4,$2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 C compiler Machine (object) code (for MIPS) assembler M230 L09.5 Smith Spring 2008

10 Advantages of Higher-Level Languages Higher-level languages As a result, very little programming is done today at the assembler level M230 L09.7 Smith Spring 2008

11 Advantages of Higher-Level Languages Higher-level languages Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, ) As a result, very little programming is done today at the assembler level M230 L09.7 Smith Spring 2008

12 Advantages of Higher-Level Languages Higher-level languages Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, ) Improve programmer productivity more understandable code that is easier to debug and validate As a result, very little programming is done today at the assembler level M230 L09.7 Smith Spring 2008

13 Advantages of Higher-Level Languages Higher-level languages Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, ) Improve programmer productivity more understandable code that is easier to debug and validate Improve program maintainability As a result, very little programming is done today at the assembler level M230 L09.7 Smith Spring 2008

14 Advantages of Higher-Level Languages Higher-level languages Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, ) Improve programmer productivity more understandable code that is easier to debug and validate Improve program maintainability Allow programmers to be independent of the computer on which they are developed (compilers and assemblers can translate high-level language programs to the binary instructions of any machine) As a result, very little programming is done today at the assembler level M230 L09.7 Smith Spring 2008

15 Advantages of Higher-Level Languages Higher-level languages Allow the programmer to think in a more natural language and for their intended use (Fortran for scientific computation, Cobol for business programming, Lisp for symbol manipulation, ) Improve programmer productivity more understandable code that is easier to debug and validate Improve program maintainability Allow programmers to be independent of the computer on which they are developed (compilers and assemblers can translate high-level language programs to the binary instructions of any machine) Emergence of optimizing compilers that produce very efficient assembly code optimized for the target machine As a result, very little programming is done today at the assembler level M230 L09.7 Smith Spring 2008

16 Machine Organization M230 L09.8 Smith Spring 2008

17 Machine Organization Capabilities and performance characteristics of the principal Functional Units (FUs) e.g., register file, ALU, multiplexors, memories,... M230 L09.8 Smith Spring 2008

18 Machine Organization Capabilities and performance characteristics of the principal Functional Units (FUs) e.g., register file, ALU, multiplexors, memories,... The ways those FUs are interconnected e.g., buses M230 L09.8 Smith Spring 2008

19 Machine Organization Capabilities and performance characteristics of the principal Functional Units (FUs) e.g., register file, ALU, multiplexors, memories,... The ways those FUs are interconnected e.g., buses Logic and means by which information flow between FUs is controlled M230 L09.8 Smith Spring 2008

20 Machine Organization Capabilities and performance characteristics of the principal Functional Units (FUs) e.g., register file, ALU, multiplexors, memories,... The ways those FUs are interconnected e.g., buses Logic and means by which information flow between FUs is controlled The machine s Instruction Set Architecture (ISA) M230 L09.8 Smith Spring 2008

21 Machine Organization Capabilities and performance characteristics of the principal Functional Units (FUs) e.g., register file, ALU, multiplexors, memories,... The ways those FUs are interconnected e.g., buses Logic and means by which information flow between FUs is controlled The machine s Instruction Set Architecture (ISA) Register Transfer Level (RTL) machine description M230 L09.8 Smith Spring 2008

22 Major Components of a Computer Processor Devices Control Memory Input Datapath Output M230 L09.9 Smith Spring 2008

23 Below the Program High-level language program (in C) swap (int v[], int k)... Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) one-to-many one-to-one C compiler assembler M230 L09.11 Smith Spring 2008

24 Below the Program High-level language program (in C) swap (int v[], int k)... Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) one-to-many one-to-one C compiler assembler M230 L09.11 Smith Spring 2008

25 Below the Program High-level language program (in C) swap (int v[], int k)... Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) one-to-many one-to-one C compiler assembler M230 L09.11 Smith Spring 2008

26 Below the Program High-level language program (in C) swap (int v[], int k)... Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) one-to-many one-to-one C compiler assembler M230 L09.11 Smith Spring 2008

27 Below the Program High-level language program (in C) swap (int v[], int k)... Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) one-to-many one-to-one C compiler assembler M230 L09.11 Smith Spring 2008

28 Below the Program High-level language program (in C) swap (int v[], int k)... Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) one-to-many one-to-one C compiler assembler M230 L09.11 Smith Spring 2008

29 Below the Program High-level language program (in C) swap (int v[], int k)... Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) one-to-many one-to-one C compiler assembler M230 L09.11 Smith Spring 2008

30 Below the Program High-level language program (in C) swap (int v[], int k)... Assembly language program (for MIPS) swap: sll $2, $5, 2 add $2, $4, $2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Machine (object) code (for MIPS) one-to-many one-to-one C compiler assembler M230 L09.11 Smith Spring 2008

31 Input Device Inputs Object Code Processor Devices Control Memory Input Datapath Output M230 L09.12 Smith Spring 2008

32 Object Code Stored in Memory Processor Control Datapath Memory Devices Input Output M230 L09.13 Smith Spring 2008

33 Processor Fetches an Instruction Processor fetches an instruction from memory Processor Control Datapath Memory Devices Input Output Where does it fetch from? M230 L09.14 Smith Spring 2008

34 Control Decodes the Instruction Control decodes the instruction to determine what to execute Processor Control Datapath Memory Devices Input Output M230 L09.15 Smith Spring 2008

35 Datapath Executes the Instruction Datapath executes the instruction as directed by control Processor Control Datapath contents Reg #4 ADD contents Reg #2 results put in Reg #2 Memory Devices Input Output M230 L09.16 Smith Spring 2008

36 Processor Organization M230 L09.17 Smith Spring 2008

37 Processor Organization Control needs to have the Ability to input instructions from memory Logic and means to control instruction sequencing Logic and means to issue signals that control the way information flows between datapath components Logic and means to control what operations the datapath s functional units perform M230 L09.17 Smith Spring 2008

38 Processor Organization Control needs to have the Ability to input instructions from memory Logic and means to control instruction sequencing Logic and means to issue signals that control the way information flows between datapath components Logic and means to control what operations the datapath s functional units perform Datapath needs to have the Components - functional units (e.g., adder) and storage locations (e.g., register file) - needed to execute instructions Components interconnected so that the instructions can be accomplished Ability to load data from and store data to memory M230 L09.17 Smith Spring 2008

39 Processor Organization Control needs to have the Ability to input instructions from memory Logic and means to control instruction sequencing Logic and means to issue signals that control the way information flows between datapath components Logic and means to control what operations the datapath s functional units perform Datapath needs to have the Components - functional units (e.g., adder) and storage locations (e.g., register file) - needed to execute instructions Components interconnected so that the instructions can be accomplished Ability to load data from and store data to memory Where does it load and store from and to? M230 L09.17 Smith Spring 2008

40 What Happens Next? Processor Control Datapath Memory Devices Input Output M230 L09.19 Smith Spring 2008

41 What Happens Next? Processor Control Datapath Memory Devices Input Output Fetch M230 L09.19 Smith Spring 2008

42 What Happens Next? Processor Control Datapath Memory Devices Input Output Fetch M230 L09.19 Smith Spring 2008

43 What Happens Next? Processor Control Datapath Memory Devices Input Output Fetch Decode M230 L09.19 Smith Spring 2008

44 What Happens Next? Processor Control Datapath Memory Devices Input Output Fetch Decode M230 L09.19 Smith Spring 2008

45 What Happens Next? Processor Control Datapath Memory Devices Input Output Fetch Exec Decode M230 L09.19 Smith Spring 2008

46 What Happens Next? Processor Control Datapath Memory Devices Input Output Fetch Exec Decode M230 L09.19 Smith Spring 2008

47 Output Data Stored in Memory At program completion the data to be output resides in memory Processor Memory Devices Control Input Datapath Output M230 L09.20 Smith Spring 2008

48 Output Data Stored in Memory At program completion the data to be output resides in memory Processor Memory Devices Control Input Datapath Output M230 L09.20 Smith Spring 2008

49 Output Device Outputs Data Processor Devices Control Memory Input Datapath Output M230 L09.21 Smith Spring 2008

50 The Instruction Set Architecture software instruction set architecture hardware M230 L09.22 Smith Spring 2008

51 The Instruction Set Architecture software instruction set architecture hardware M230 L09.22 Smith Spring 2008

52 The Instruction Set Architecture software instruction set architecture hardware The interface description separating the software and hardware. M230 L09.22 Smith Spring 2008

53 MIPS R3000 Instruction Set Architecture Instruction Categories Load/Store Computational Jump and Branch Floating Point - coprocessor Memory Management Special Registers R0 - R31 PC HI LO 3 Instruction Formats: all 32 bits wide OP OP OP rs rt rd sa funct rs rt immediate jump target M230 L09.23 Smith Spring 2008

54 MIPS R3000 Instruction Set Architecture Instruction Categories Load/Store Computational Jump and Branch Floating Point - coprocessor Memory Management Special Registers R0 - R31 PC HI LO 3 Instruction Formats: all 32 bits wide OP OP OP rs rt rd sa funct rs rt immediate jump target Q: How many already familiar with MIPS ISA? M230 L09.23 Smith Spring 2008

55 Assembly Language Instructions Language of the machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS arithmetic instructions We ll be working with the MIPS instruction set architecture similar to other architectures developed since the 1980's used by NEC, Nintendo, Silicon Graphics, Sony, Design goals: maximize performance, minimize cost, reduce design time, minimize memory space (embedded systems), minimize power consumption (mobile systems) M230 L09.25 Smith Spring 2008

56 RISC - Reduced Instruction Set Computer RISC philosophy fixed instruction lengths load-store instruction sets limited addressing modes limited operations MIPS, Sun SPARC, HP PA-RISC, IBM PowerPC, Intel (Compaq) Alpha, Instruction sets are measured by how well compilers use them as opposed to how well assembly language programmers use them M230 L09.26 Smith Spring 2008

57 MIPS Arithmetic Instruction MIPS assembly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 Each arithmetic instruction performs only one operation Each arithmetic instruction specifies exactly three operands destination source1 op source2 Those operands are contained in the datapath s register file ($t0, $s1,$s2) Operand order is fixed (destination first) M230 L09.28 Smith Spring 2008

58 MIPS Arithmetic Instruction MIPS assembly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 Each arithmetic instruction performs only one operation Each arithmetic instruction specifies exactly three operands destination source1 op source2 Those operands are contained in the datapath s register file ($t0, $s1,$s2) Operand order is fixed (destination first) M230 L09.28 Smith Spring 2008

59 MIPS Arithmetic Instruction MIPS assembly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 Each arithmetic instruction performs only one operation Each arithmetic instruction specifies exactly three operands destination source1 op source2 Those operands are contained in the datapath s register file ($t0, $s1,$s2) Operand order is fixed (destination first) M230 L09.28 Smith Spring 2008

60 MIPS Arithmetic Instruction MIPS assembly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 Each arithmetic instruction performs only one operation Each arithmetic instruction specifies exactly three operands destination source1 op source2 Those operands are contained in the datapath s register file ($t0, $s1,$s2) Operand order is fixed (destination first) M230 L09.28 Smith Spring 2008

61 MIPS Arithmetic Instruction MIPS assembly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 Each arithmetic instruction performs only one operation Each arithmetic instruction specifies exactly three operands destination source1 op source2 Those operands are contained in the datapath s register file ($t0, $s1,$s2) Operand order is fixed (destination first) M230 L09.28 Smith Spring 2008

62 Compiling More Complex Statements Assuming variable b is stored in register $s1, c is stored in $s2, and d is stored in $s3 and the result is to be left in $s0, what is the assembler equivalent to the C statement h = (b - c) + d M230 L09.30 Smith Spring 2008

63 Compiling More Complex Statements Assuming variable b is stored in register $s1, c is stored in $s2, and d is stored in $s3 and the result is to be left in $s0, what is the assembler equivalent to the C statement h = (b - c) + d sub $t0, $s1, $s2 add $s0, $t0, $s3 M230 L09.30 Smith Spring 2008

64 MIPS Register File Operands of arithmetic instructions must be from a limited number of special locations contained in the datapath s register file Holds thirty-two 32-bit registers - With two read ports and - One write port Registers are Faster than main memory Easier for a compiler to use - e.g., (A*B) (C*D) (E*F) can do multiplies in any order vs. stack Can hold variables so that - code density improves (since register are named with fewer bits than a memory location) Register addresses are indicated by using $ M230 L09.32 Smith Spring 2008

65 MIPS Register File Operands of arithmetic instructions must be from a limited number of special locations contained in the datapath s register file Holds thirty-two 32-bit registers - With two read ports and - One write port Registers are Faster than main memory Easier for a compiler to use - e.g., (A*B) (C*D) (E*F) can do multiplies in any order vs. stack Can hold variables so that src1 addr src2 addr dst addr write data Register File 32 locations 32 bits - code density improves (since register are named with fewer bits than a memory location) src1 data src2 data Register addresses are indicated by using $ M230 L09.32 Smith Spring 2008

66 MIPS Register File Operands of arithmetic instructions must be from a limited number of special locations contained in the datapath s register file Holds thirty-two 32-bit registers - With two read ports and - One write port Registers are Faster than main memory Easier for a compiler to use - e.g., (A*B) (C*D) (E*F) can do multiplies in any order vs. stack Can hold variables so that src1 addr src2 addr dst addr write data Register File - code density improves (since register are named with fewer bits than a memory location) 5 32 locations 32 bits src1 data src2 data Register addresses are indicated by using $ M230 L09.32 Smith Spring 2008

67 MIPS Register File Operands of arithmetic instructions must be from a limited number of special locations contained in the datapath s register file Holds thirty-two 32-bit registers - With two read ports and - One write port Registers are Faster than main memory Easier for a compiler to use - e.g., (A*B) (C*D) (E*F) can do multiplies in any order vs. stack Can hold variables so that src1 addr src2 addr dst addr write data Register File - code density improves (since register are named with fewer bits than a memory location) locations 32 bits src1 data src2 data Register addresses are indicated by using $ M230 L09.32 Smith Spring 2008

68 MIPS Register File Operands of arithmetic instructions must be from a limited number of special locations contained in the datapath s register file Holds thirty-two 32-bit registers - With two read ports and - One write port Registers are Faster than main memory Easier for a compiler to use - e.g., (A*B) (C*D) (E*F) can do multiplies in any order vs. stack Can hold variables so that src1 addr src2 addr dst addr write data Register File - code density improves (since register are named with fewer bits than a memory location) locations 32 bits src1 data src2 data Register addresses are indicated by using $ M230 L09.32 Smith Spring 2008

69 MIPS Register File Operands of arithmetic instructions must be from a limited number of special locations contained in the datapath s register file Holds thirty-two 32-bit registers - With two read ports and - One write port Registers are Faster than main memory Easier for a compiler to use - e.g., (A*B) (C*D) (E*F) can do multiplies in any order vs. stack Can hold variables so that src1 addr src2 addr dst addr write data Register File - code density improves (since register are named with fewer bits than a memory location) locations 32 bits src1 data src2 data Register addresses are indicated by using $ M230 L09.32 Smith Spring 2008

70 MIPS Register File Operands of arithmetic instructions must be from a limited number of special locations contained in the datapath s register file Holds thirty-two 32-bit registers - With two read ports and - One write port Registers are Faster than main memory Easier for a compiler to use - e.g., (A*B) (C*D) (E*F) can do multiplies in any order vs. stack Can hold variables so that src1 addr src2 addr dst addr write data Register File - code density improves (since register are named with fewer bits than a memory location) locations 32 bits 32 src1 data src2 data Register addresses are indicated by using $ M230 L09.32 Smith Spring 2008

71 MIPS Register File Operands of arithmetic instructions must be from a limited number of special locations contained in the datapath s register file Holds thirty-two 32-bit registers - With two read ports and - One write port Registers are Faster than main memory Easier for a compiler to use - e.g., (A*B) (C*D) (E*F) can do multiplies in any order vs. stack Can hold variables so that src1 addr src2 addr dst addr write data Register File - code density improves (since register are named with fewer bits than a memory location) locations 32 bits src1 data src2 data Register addresses are indicated by using $ M230 L09.32 Smith Spring 2008

72 Naming Conventions for Registers 0 $zero constant 0 (Hdware) 1 $at reserved for assembler 2 $v0 expression evaluation & 3 $v1 function results 4 $a0 arguments 5 $a1 6 $a2 7 $a3 8 $t0 temporary: caller saves... (callee can clobber) 15 $t7 16 $s0 callee saves... (caller can clobber) 23 $s7 24 $t8 temporary (cont d) 25 $t9 26 $k0 reserved for OS kernel 27 $k1 28 $gp pointer to global area 29 $sp stack pointer 30 $fp frame pointer 31 $ra return address (Hdware) M230 L09.33 Smith Spring 2008

73 Registers vs. Memory Arithmetic instructions operands must be registers, only thirty-two registers provided Processor Devices Control Memory Input Datapath Output Compiler associates variables with registers What about programs with lots of variables? M230 L09.35 Smith Spring 2008

74 Registers vs. Memory Arithmetic instructions operands must be registers, only thirty-two registers provided Processor Devices Control Memory Input Datapath Output Compiler associates variables with registers What about programs with lots of variables? M230 L09.35 Smith Spring 2008

75 Registers vs. Memory Arithmetic instructions operands must be registers, only thirty-two registers provided Processor Devices Control Memory Input Datapath Output Compiler associates variables with registers What about programs with lots of variables? M230 L09.35 Smith Spring 2008

76 Accessing Memory MIPS has two basic data transfer instructions for accessing memory lw $t0, 4($s3) #load word from memory sw $t0, 8($s3) #store word to memory (assume $s3 holds ) The data transfer instruction must specify where in memory to read from (load) or write to (store) memory address where in the register file to write to (load) or read from (store) register destination (source) The memory address is formed by summing the constant portion of the instruction and the contents of the second register M230 L09.37 Smith Spring 2008

77 Accessing Memory MIPS has two basic data transfer instructions for accessing memory 28 lw $t0, 4($s3) #load word from memory sw $t0, 8($s3) #store word to memory (assume $s3 holds ) The data transfer instruction must specify where in memory to read from (load) or write to (store) memory address where in the register file to write to (load) or read from (store) register destination (source) The memory address is formed by summing the constant portion of the instruction and the contents of the second register M230 L09.37 Smith Spring 2008

78 Accessing Memory MIPS has two basic data transfer instructions for accessing memory 28 lw $t0, 4($s3) #load word from memory sw $t0, 8($s3) #store word to memory 32 (assume $s3 holds ) The data transfer instruction must specify where in memory to read from (load) or write to (store) memory address where in the register file to write to (load) or read from (store) register destination (source) The memory address is formed by summing the constant portion of the instruction and the contents of the second register M230 L09.37 Smith Spring 2008

79 MIPS Instructions, so far Category Instr Op Code Example Meaning Arithmetic add 0 and 32 add $s1, $s2, $s3 $s1 = $s2 + $s3 (R format) subtract 0 and 34 sub $s1, $s2, $s3 $s1 = $s2 - $s3 Data load word 35 lw $s1, 100($s2) $s1 = Memory($s2+100) transfer store word 43 sw $s1, 100($s2) Memory($s2+100) = $s1 (I format) M230 L09.38 Smith Spring 2008