Prof. Mohamed Hamada Software Engineering Lab. The University of Aizu Japan

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1 Language Processing Systems Prof. Mohamed Hamada Software ngineering Lab. The University of Aizu Japan

2 Intermediate/Code Generation Source language Scanner (lexical analysis) tokens Parser (syntax analysis) Parse tree Semantic Analysis AST Intr. IC Code Generator generator Intermediate Language Code Optimizer Intermediate Language OIL Code Generator Target language rror Handler Symbol Table

3 Intermediate Code Generation

4 Intermediate Code Similar terms: Intermediate representation, intermediate language Ties the front and back ends together Language and Machine neutral Many forms More than one intermediate language may be used by a compiler

5 Intermediate Representation There is no standard Intermediate Representation. IR is a step in expressing a source program so that machine understands it As the translation takes place, IR is repeatedly analyzed and transformed Compiler users want analysis and translation to be fast and correct Compiler writers want optimizations to be simple to write, easy to understand and easy to extend IR should be simple and light weight while allowing easy expression of optimizations and transformations.

6 Issues in new IR Design How much machine dependent xpressiveness: how many languages are covered Appropriateness for code optimization Appropriateness for code generation Front end Optimizer

7 Intermediate Languages Types Graphical IRs: Abstract Syntax trees, DAGs, Control Flow Graphs, etc. Linear IRs: Stack based (postfix) Three address code (quadruples) etc.

8 Graphical IRs Abstract Syntax Trees (AST) retain essential structure of the parse tree, eliminating unneeded nodes. Directed Acyclic Graphs (DAG) compacted AST to avoid duplication smaller footprint as well Control Flow Graphs (CFG) explicitly model control flow

9 Abstract Syntax Tree/DAG Condensed form of parse tree Useful for representing language constructs Depicts the natural hierarchical structure of the source program ach internal node represents an operator Children of the nodes represent operands Leaf nodes represent operands DAG is more compact than abstract syntax tree because common sub expressions are eliminated

10 ASTs and DAGs: xample: a := b *-c + b*-c AST := a + DAG := a + * * * b - (uni) b - (uni) b - (uni) c c c

11 Linear IR Low level IL before final code generation A linear sequence of low-level instructions Resemble assembly code for an abstract machine xplicit conditional branches and goto jumps Reflect instruction sets of the target machine Stack-machine code and three-address code Implemented as a collection (table or list) of tuples Linear IR examples Stack based (postfix) Three address code (quadruples)

12 Stack based: Postfix notation Linearized representation of a syntax tree List of nodes of the tree Nodes appear immediately after its children The postfix notation for an expression is defined as follows: If is a variable or constant then the postfix notation is itself If is an expression of the form 1 op 2 where op is a binary operator then the postfix notation for is 1 ' 2 ' op where 1 ' and 2 are the postfix notations for 1 and 2 respectively If is an expression of the form ( 1 ) then the postfix notation for 1 is also the postfix notation for

13 Stack based: Postfix notation No parenthesis are needed in postfix notation because the position and parity of the operators permits only one decoding of a postfix expression Postfix notation for a = b * -c + b * - c is a b c - * b c - * + =

14 Stack-machine code Also called one-address code Assumes an operand stack Operations take operands from the stack and push results back onto the stack Need special operations such as Swapping two operands on top of the stack Compact in space, simple to generate and execute Most operands do not need names Results are transitory unless explicitly moved to memory Used as IR for Smalltalk and Java Stack-machine code for x 2 * y Push 2 Push y Multiply Push x subtract

15 Three address code It is a sequence of statements of the general form X := Y op Z where X, Y or Z are names, constants or compiler generated temporaries op stands for any operator such as a fixed- or floating-point arithmetic operator, or a logical operator

16 Three address code Only one operator on the right hand side is allowed Source expression like x + y * z might be translated into t 1 := y * z t 2 := x + t 1 where t 1 and t 2 are compiler generated temporary names Unraveling of complicated arithmetic expressions and of control flow makes 3-address code desirable for code generation and optimization The use of names for intermediate values allows 3-address code to be easily rearranged Three address code is a linearized representation of a syntax tree where explicit names correspond to the interior nodes of the graph

17 Three address instructions Assignment x = y op z x = op y x = y Function param x call p,n return y Jump goto L if x relop y goto L Indexed assignment x = y[i] x[i] = y Pointer x = &y x = *y *x = y

18 Three address code very instruction manipulates at most two operands and one result. Typical forms include: Arithmetic operations: x := y op z x := op y Data movement: x := y [ z ] x[z] := y x := y Control flow: if y op z goto x goto x Function call: param x return y call foo xample: Three-address code for x 2 * y := 2 t2 := y t3 := *t2 t4 := x t5 := t4-t3

19 Storing three-address code Store all instructions in a quadruple table very instruction has four fields: op, arg1, arg2, result The label of instructions è index of instruction in table Quadruple entries xample: Three-address code op arg1 arg2 result := - c t2 := b * t3 := -c t4 := b * t3 t5 := t2 + t4 a := t5 (0) Uminus c (1) Mult b t2 (2) Uminus c t3 (3) Mult b t3 t4 (4) Plus t2 t4 t5 (5) Assign t5 a Alternative: store all the instructions in a singly/doubly linked list What is the tradeoff?

20 Linear IR: xample xample: Linear IR for x 2 * y Stack-machine code two-address code three-address code Push 2 Push y Multiply Push x subtract MOV 2 => MOV y => t2 MULT t2 => MOV x => t4 SUB => t4 := 2 t2 := y t3 := *t2 t4 := x t5 := t4-t3

21 Generating Intermediate Code As we parse, generate IC for the given input. Use attributes to pass information about temporary variables up the tree

22 xample1: a := b *-c + b*-c t0 = b t0 b

23 xample1: a := b *-c + b*-c t0 = b = -c t0 b - (uni) c

24 xample1: a := b *-c + b*-c t0 * b - (uni) t0 = b = -c = * t0 c

25 xample1: a := b *-c + b*-c t0 * b - (uni) b t0 t0 = b = -c = * t0 t0 = b c

26 xample1: a := b *-c + b*-c t0 * b - (uni) c t0 b - (uni) t2 t2 c t0 = b = -c = * t0 t0 = b t2 = -c

27 xample1: a := b *-c + b*-c t0 * * b - (uni) c t0 b t0 - (uni) t2 t2 c t0 = b = -c = * t0 t0 = b t2 = -c t0 = t0 * t2

28 xample1: a := b *-c + b*-c t0 + * * b - (uni) c t0 b t0 - (uni) t2 t2 c t0 = b = -c = * t0 t0 = b t2 = -c t0 = t0 * t2 = t0 +

29 xample1: a := b *-c + b*-c t0 assign a + * * b - (uni) c t0 b t0 - (uni) t2 t2 c t0 = b = -c = * t0 t0 = b t2 = -c t0 = t0 * t2 = t0 + a =

30 xample1: a := b *-c + b*-c t0 = b = -c = * t0 t0 = * a = 0 assign a t0 + t0 b * - (uni) t0 c

31 xpressions xample 2: Grammar: S à id := à + à id S Generate: = b 1 a := b + c + d + e

32 xpressions xample 2: Grammar: S à id := à + à id ach number a := b + c + d + e corresponds to a temporary variable. S 1 2 Generate: = b t2 = c

33 xpressions xample 2: Grammar: S à id := à + à id 3 ach number a := b + c + d + e corresponds to a temporary variable. S 1 2 Generate: = b t2 = c t3 = + t2

34 xpressions xample 2: Grammar: S à id := à + à id 3 ach number a := b + c + d + e corresponds to a temporary variable. S Generate: = b t2 = c t3 = + t2 t4 = d

35 xpressions xample 2: Grammar: S à id := à + à id 3 ach number a := b + c + d + e corresponds to a temporary variable. S Generate: = b t2 = c t3 = + t2 t4 = d t5 = t3 + t4

36 xpressions xample 2: Grammar: S à id := à + à id ach number a := b + c + d + e corresponds to a temporary variable. S Generate: = b t2 = c t3 = + t2 t4 = d t5 = t3 + t4 t6 = e

37 xpressions xample 2: Grammar: S à id := à + à id S ach number a := b + c + d + e corresponds to a temporary variable. Generate: = b t2 = c t3 = + t2 t4 = d t5 = t3 + t4 t6 = e t7 = t5 + t6

38 xpressions xample 2: Grammar: S à id := à + à id S ach number a := b + c + d + e corresponds to a temporary variable. Generate: = b t2 = c t3 = + t2 t4 = d t5 = t3 + t4 t6 = e t7 = t5 + t6 a = t7

39 Other representations SSA: Single Static Assignment RTL: Register transfer language Stack machines: P-code CFG: Control Flow Graph Dominator Trees DJ-graph: dominator tree augmented with join edges PDG: Program Dependence Graph VDG: Value Dependence Graph GURRR: Global unified resource requirement representation. Combines PDG with resource requirements Java intermediate bytecodes The list goes on...

Principles of Compiler Design

Principles of Compiler Design Intermediate Representation Compiler Lexical Analysis Syntax Analysis Semantic Analysis Source Program Token stream Abstract Syntax tree Unambiguous Program representation