SOLUTIONS!! DO NOT DISTRIBUTE!!

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1 THE UNIVERSITY OF THE WEST INDIES EXAMINATIONS OF FEBRUARY MID-TERM 2005 Code and Name of Course: EE25M Introduction to Microprocessors Paper: Date and Time: Duration: One Hour INSTRUCTIONS TO CANDIDATES: This paper has 10 pages and 18 questions Answer ALL questions in Sections A and B. Marks for each question are given in the margin. Approved calculators may be used. SOLUTIONS!! DO NOT DISTRIBUTE!! Section A (15 marks) contains 15 multiple-choice questions. Questions in Section A should be answered on this exam script. Choose the most appropriate answer for each question, and circle your chosen answer. You should spend about 20 minutes on Section A. Section B (30 marks) contains 3 questions. Section B should be answered on this exam script. Any code written for Section B should be appropriately commented for clarity. You should spend about 40 minutes on Section B. The following datasheets/information are attached to/distributed with this exam paper. PIC16F87x instruction set summary Please write your ID# on the front cover and on each page in the spaces provided. c The University of the West Indies

2 page 2. Section A Q1. The Arithmetic and Logic Unit (ALU) typically performs which of the following functions within the Central Processing Unit (CPU)? I addition II generation of status ags III interpretation of instructions IV bit-wise logical operations (a) I only (b) I and II only (c) I and IV only (d) I, II and IV only (e) I, II, III, and IV Q2. Which ONE of the following statements is correct: (a) Microprocessors use cycle stealing to access the system bus. (b) Choosing a bus for a particular application depends on whether the memory is Read-Only or Read-Write. (c) Memory mapped I/O systems have a special CPU instruction for accessing peripherals. (d) EEPROM is a form of randomly accessible memory. (e) All system busses have a dedicated clock line, which is used to synchronize bus transactions. Q3. Multiple devices need to be connected to a bus. Indicate which of the following output circuitry combinations is appropriate: I all devices have push-pull outputs. II one device has a push-pull output, the other devices have open-drain outputs. III one device has a tri-state output, the other devices have push-pull outputs. IV all devices have tri-state outputs. (a) I only (b) I and II only (c) II and IV only (d) I, II and IV only (e) II, III, and IV only

3 page 3. Q4. We have two CPU's, which both use the same instruction format, are accumulator-based and support load and store operations. The processors are both supplied in 40 pin packages, and were manufactured using a 180nm semiconductor manufacturing process. Processor A supports an add instruction. Processor B supports both add and multiply instructions. Which ONE of the following statements is correct: (a) The processors have dierent architecture, but the same organisation. (b) The processors have dierent architecture, we cannot determine if the organisation is the same. (c) The processors have the same architecture, and dierent organisation. (d) The processors have the same architecture, and the same organisation. (e) The processors have the same architecture, we cannot determine if the organisation is the same. Q5. In order to set bits 3 and 5, and clear bit 6 of a byte, we can: (a) bit-wise AND with then bit-wise OR with (b) bit-wise AND with then bit-wise XOR with (c) bit-wise OR with then bit-wise AND with (d) bit-wise OR with then bit-wise XOR with (e) bit-wise XOR with then bit-wise AND with Q6. Choose the word combination which best completes the following sentence: Within the development tool chain, the simulator runs on the Q6I and takes Q6II as input, while the online debugger runs on the host, and communicates with the Q6III. (a) Q6I: host Q6II: assembly language text Q6III: target emulator (b) Q6I: host Q6II: binary le (hex le or executable)q6iii: target debug kernel (c) Q6I: host Q6II: binary le (hex le or executable)q6iii: target emulator (d) Q6I: target Q6II: assembly language text Q6III: target debug kernel (e) Q6I: target Q6II: binary le (hex le or executable)q6iii: target emulator Q7. We wish to examine the signals crossing a bit-parallel bus. We should use: (a) ICD (b) logic analyser (c) logic probe (d) oscilloscope (e) volt-meter

4 page 4. Q8. A microcontroller may belong to a family of products from a particular manufacturer. We can presume: I all items in the family recognise the same assembly language commands II all items in the family have the same instruction format III all items in the family are pin-compatible IV all items in the family operate at the same clock speed (a) none (b) I and II only (c) II and IV only (d) I, II and IV only (e) I, II, III, and IV Q9. Which ONE of the following statements about the PIC16F877 is correct: (a) Instruction (Program) memory is 8 bits wide with a 13 bit address. (b) Only Special Function/Peripheral Registers can be accessed from multiple data banks. (c) PIC16F877 contains a pipeline; as a result of which all instructions appear to take 1 machine cycle. (d) PIC16F877 instructions have opcodes which specify the addressing mode to be used. (e) The data memory is banked, however the program memory is not banked. Q10. We wish to specify the target microprocessor to the CCS compiler. Which ONE of the following pre-processor directives is most appropriate: (a) #include (b) #dene (c) #device (d) #org (e) #inline Q11. If the byte represented a signed xed point number (two's complement representation, 3 bits before numeric point), the number would be: (a) (b) (c) (d) (e)

5 page 5. Q12. The working shows an attempt to perform Booth's algorithm to determine : A Q Q 1 M Count Comment Initialise; pattern Arithmetic Shift Right Decrement count; pattern Arithmetic Shift Right Decrement count; pattern Arithmetic Shift Right Decrement count; pattern Subtract A=A-M Arithmetic Right Shift Decrement count and stop Answer is which is the two's complement representation of Identify the aw in the method shown: (a) arithmetic error (b) incorrect assignment of numbers to M and Q i.e. use M = 1000 and Q = 1011 (c) incorrect interpretation of result (d) incorrect shifting (e) insucient bits used in representation Q13. In order to multiply two real numbers using xed point represention/arithmetic, we: (a) perform integer addition on the representation, and interpret the result using the xed point format of the multiplier (b) perform integer multiplication on the representation, and interpret the result using the xed point format determined by the combination of the formats of multiplier and multiplicand (c) perform integer multiplication on the representation, and interpret the result using the xed point format of the multiplicand (d) perform integer multiplication on the representation, and interpret the result using the xed point format of the multiplier (e) perform integer subtraction on the representation, and interpret the result using the xed point format of the multiplier

6 page 6. Q14. A string of characters needs to be stored in the PIC16F877. If the DT directive is used to store the string, to access the characters we: (a) use bank switching, and use the index to decide which bank to switch to. (b) use indirect addressing, and place the index of the character in the FSR. (c) use lookup table, and pass the index of the character in W. (d) use the data EEPROM, and pass the index of the character in EEADR. (e) use the program EEPROM, and pass the index of the character in EEADR. Q15. mysub movlw 255 clrf Out_hi btfsc In, 7 movwf Out_hi movf In,W movwf Out_lo return Choose the correct statement. The above piece of code will: (a) check the least signicant bit of le register In. (b) clear Out_hi if In is 0x92. (c) clear Out_lo if In is 0x92. (d) leave the working register unchanged. (e) run when the instruction call mysub is executed.

7 page 7. Section B Q1. Write an assembly language routine named lkup for the PIC16F877 which will retrieve the decimal numbers 10, 5, 8, 13, 9 (in that order) from a lookup table, based on the index value (0-4) in the working register. 2 marks for correct decimal/hexadecimal specier and numbers. 2 marks for label and return operation. 2 marks for retlw or DT directive. Deduct 1 for excessive return or wrong keyword/directive. 2 marks for addwf to PCL,F. Deduct 1 if wrong register or destination. 2 marks for: alternate method OR bank boundary checking Sample answers: 8 marks lkup addwf PCL,F retlw D'10' retlw D'5' retlw D'8' retlw D'13' retlw D'9'

8 page 8. Q2. Write an assembly language routine named mul8 for the PIC16F877 which will perform multiplication of a 4 bit number located in the working register, by the number 8, and return the answer in the working register. You may use a temporary le register named tmp if required. 2 marks: return with value in working register and not tmp ( bad return) 2 marks: loop 8 times and do addition each time +2 marks: use rotate instead of add +2 marks: use swapf instead of rotate or add Sample answers: 8 marks mul8 movwf tmp swapf tmp,w return

9 page 9. Q3. Write an assembly language program for the PIC16F877 which loops 5 times and then sleeps. On each iteration it should (a) retrieve the next number using a routine named lkup, (b) call the multiplication routine mul8, (c) store the answer in the le register located at 0x30+i where i is the iteration count. Your main program should indicate where the preceding routines mul8 and lkup are to be placed, but you do NOT need to rewrite them. Your main program should use appropriate preprocessor directives. 4 marks: use of LIST, INCLUDE, ORG and END 2 marks: declaration of registers for i and tmp using EQU 2 marks: initialise i and terminate look correctly 2 marks: use of call to access routines, and goto from reset vector 2 marks: initialise FSR correctly and increment on each loop 2 marks: store successfully using INDF 14 marks LIST p=16f877 INCLUDE <p16f877.inc> i EQU 0x20 tmp EQU 0x21 ORG goto 0x00 start ORG 0x20 start movlw 0x05 movwf i movlw 0x30 movwf FSR loop movf i,w call lkup call mul8 movwf INDF incf FSR,F decfsz i,f goto loop sleep END ; put the two routines here!! END OF QUESTION PAPER

10 page 10. Mnemonic, Description Status Operands Aected Byte-oriented le register operations ADDWF f,d Add W and f C,DC,Z ANDWF f,d AND W with f Z CLRF f Clear f Z CLRW - Clear W Z COMF f,d Complement f Z DECF f,d Decrement f Z DECFSZ f,d Decrement f, Skip if 0 INCF f,d Increment f Z INCFSZ f,d Increment f, Skip if 0 IORWF f,d Inclusive OR W with f Z MOVF f,d Move f Z MOVWF d Move W to f NOP - No operation RLF f,d Rotate Left f through Carry C RRF f,d Rotate Right f through Carry C SUBWF f,d Subtract W from f C,DC,Z SWAPF f,d Swap nibbles in f XORWF f,d Exclusive OR W with f Z Bit-oriented le register operations BCF f,b Bit Clear f BSF f,b Bit Set f BTFSC f,b Bit Test f, Skip if Clear BTFSS f,b Bit Test f, Skip if Set Literal and Control operations ADDLW k Add literal and W C,DC,Z ANDLW k AND literal with W Z CALL k Call subroutine CLRWDT - Clear watchdog timer TO, PD GOTO k Goto address IORLW k Inclusive OR literal with W Z MOVLW k Move literal to W RETFIE - Return from interrupt RETLW k Return with literal in W RETURN - Return from subroutine SLEEP - Clear watchdog timer TO, PD SUBLW k Subtract W from literal C,DC,Z XORLW k Exclusive OR literal with W Z Field f W b k d Description Register le address (0x00 to 0x7F) Working register (accumulator) Bit address within an 8-bit le register Literal eld, constant data or label Destination select: d = 0, Store result in W d = 1, Store result in le register f default is d = 1