The plot thickens. Some MIPS instructions you can write cannot be translated to a 32-bit number

Size: px
Start display at page:

Download "The plot thickens. Some MIPS instructions you can write cannot be translated to a 32-bit number"

Transcription

1 The plot thickens Some MIPS instructions you can write cannot be translated to a 32-bit number some reasons why 1) constants are too big 2) relative addresses are too big 3) absolute addresses are outside the range of a jump 4) convenience instructions that have no opcode

2 CS 2630 Computer Organization Meeting 8: pseudo instructions; functions in MIPS Brandon Myers University of Iowa

3 Project 1 int x = arr[1]; arr[2] = x + 10; Compiler you build this lw $t0, 4($r0) addi $t0, $t0, 10 sw $t0, 8($r0) Assembler

4 Project 1: Three phases to MiniMa 0. We assume the program has been parsed from a text file into an array of Instruction objects 1. Translate MAL (combo of real and pseudo instructions) into TAL (real instructions) 2. Convert logical labels into immediates (i.e., branch label turned into a relative address) 3. Translate each instruction into a 32-bit word The main skeleton is provided, as well as test code and one test case your job: complete the three phases one at a time, testing as you go

5 Project 1 declare partner by end of today (ICON People tab) you have a DYB on Tuesday; take advantage!

6 Where we are going Compiler Instruction set architecture (e.g., MIPS) translating source code (C or Java) Programs to assembly language And linking your code to Library code How the software talks To the hardware Memory system Processor Datapath & Control Digital logic I/O system How a processor runs MIPS Programs! How switches (1 or 0) can be used to build Interesting functions: from integer arithmetic to programmable computers

7 Representations of a program int x = arr[1]; arr[2] = x + 10; Compiler High level language program (human readable) lw $t0, 4($r0) addi $t0, $t0, 10 sw $t0, 8($r0) Assembler assembly program as text (CS2630 student readable) assembly program as binary (machine readable)

8 Storing an instruction as bits each MIPS instructions is 32 bits, stored in instruction memory address contents meaning C e e ae ff ff 1e 20 ff f9 lw lw $s3, 0($s0) $s4, 4($s0) add $s2, $s3, $s4 sw $s2, 8($s0) addi $s0, $s0, 4 addi $s1, $s1, -1 bgtz $s1, loop

9 Pseudo instructions Not all the MIPS instructions are real (i.e., understood by the processor) TAL the true assembly language; MIPS processors know all of these instructions MAL slightly more convenient language; each MAL instruction is usually translated to 1-3 TAL instructions by the assembler

10 Pseudo instructions (MAL) Example: how many bits are required for the immediate in this instruction? addiu $t1, $t2, 0x assembler translates it to lui $t2, 0x0012 ori $t3, $t3, 0x3456 addu $t1, $t2, $t3 lui = load upper immediate

11 More pseudo instructions (MAL) other I-type instructions with too-large immediate move $rd, $rs li $rd, [32-bit immediate] la $rd, [32-bit immediate] branch instructions with <, >, <=, >= really use slt (set if less than), followed by beq to 0 or 1 For you to try: use these instructions in a MIPS program, then see what MARS translates them to

12 Peer instruction Put the following into (A) only in MAL (B) TAL

13 Reading quiz 1. What is the purpose of the stack in MIPS? 2. What is a return address? 3. When you call a procedure in MIPS, how do you pass arguments? 4. Why do procedure calls use the jal instruction?

14 Let s look at different proposals for translating procedure definitions and calls to MIPS First try: use the name of the procedure as a label and just jump to it int mult_by_2(int x) { return x*2; } int z = mult_by_2(5); What are the limitations of this proposal? mult_by_2: sll $v0, $a0, 1 # calculate and set return value j return_here # return addiu $a0, $zero, 5 # argument=5 j mult_by_2 # call procedure return_here: #... # use the result in $v0... #...

15 Full example multbyn: # prolog # "push" registers onto the stack addiu $sp,$sp,-8 sw $ra, 0($sp) sw $s0, 4($sp) move $s0, $a0 // x*n for positive n int multbyn(int x, int n) { if (n<=1) return 0; else return x + multbyn(n-1); } # body ble $a1, 1, return0 addiu $a1, $a1, -1 # recursive call jal multbyn # set return value add $v0, $s0, $v0 j end return0: # set return value addiu $v0, $zero, 0 end: # epilog # "pop" registers off the stack lw $ra, 0($sp) lw $s0, 4($sp) addiu $sp,$sp,8 j $ra

16 Function calls: only 6 steps 1. store arguments somewhere the callee code can access them 2. save current location and then jump to function 3. allocate local storage needed (saving registers) for running the function 4. perform the code in the function 5. store result somewhere the caller code can access it and restore saved registers 6. jump back to location of the function call

17 MIPS registers used for function calls Register Number Conventional Name Usage $0 $zero hard-wired to 0 $1 $at reserved for assembler $2 - $3 $v0, $v1 return values from functions $4 - $7 $a0 - $a3 arguments $8 - $15 $t0 - $t7 temporary registers $16 - $23 $s0 - $s7 saved registers $24 - $25 $t8 - $t9 temporary registers $26 - $27 $k0 - $k1 reserved for OS $28 $gp global pointer $29 $sp stack Pointer $30 $fp frame Pointer $31 $ra return Address

18 First try: use the name of the procedure as a label and just jump to it int mult_by_2(int x) { return x*2; } int z = mult_by_2(5); mult_by_2: sll $v0, $a0, 1 # calculate and set return value j return_here # return addiu $a0, $zero, 5 # argument=5 j mult_by_2 # call procedure return_here: #... # use the result in $v0... #...

19 Second try: allow multiple callsites by saving return address in $ra reference: $ra return address $v0 return value $a0 argument int mult_by_2(int x) { return x*2; } int z = mult_by_2(5); mult_by_2: sll $v0, $a0, 1 # calculate # and set return value jr $ra # return addiu $a0, $zero, 5 addiu $ra, $zero, return_here j mult_by_2 return_here

20 Convenient tip: use jal to save $ra for you! int mult_by_2(int x) { return x*2; } int z = mult_by_2(5); mult_by_2: sll $v0, $a0, 1 # calculate jr $ra reference: $ra return address $v0 return value $a0 argument # and set return value # return addiu $a0, $zero, 5 jal mult_by_2 # jump-and-link does # $ra <- return addr # then jumps

21 Problem: no modularity! every procedure needs to know what registers are being used by every callsite L

22 Convention to the rescue! Register Number Conventional Name Usage $0 $zero hard-wired to 0 $1 $at reserved for assembler $2 - $3 $v0, $v1 return values from functions $4 - $7 $a0 - $a3 arguments $8 - $15 $t0 - $t7 temporary registers $16 - $23 $s0 - $s7 saved registers $24 - $25 $t8 - $t9 temporary registers $26 - $27 $k0 - $k1 reserved for OS $28 $gp global pointer $29 $sp stack Pointer $30 $fp frame Pointer $31 $ra return Address

23 temporary registers might have a different contents after a procedure call as they did before saved registers have the same contents after a procedure call as they did before

24 Treat saved registers like you treat a campground Before Independence day weekend During Independence day weekend After Independence day weekend

25 How to clean up your campground Before you use a saved register, save its value. When you are finished, restore the value. how do we save and restore registers?

26 Calling procedures within procedures Make sure one of the registers you save/restore is $ra! Refer to the preserved across a call column of the REGISTER table on the MIPS reference card No means the caller needs to save it if they want it later Yes means the callee needs to clean the campground before returning

27 Peer instruction What must be saved before the procedure runs and restored before it returns? multiple answer 1. $t0 2. $a0 3. $zero 4. $s0 5. $s1 6. $s2 7. $ra 8. $v0

28

29 Stack machines x+y*z+u no architectural registers many architectures (real and virtual) have been designed this way

30 CS 2630 Computer Organization Meeting 9: the stack Brandon Myers University of Iowa

31 Memory organization of programs local variables, return addresses RW dynamically allocated memory like Java objects RW global data (initialized when process starts) RW assembled code (initialized when process starts) RX legend: R=readable W=writeable X=executable

32 The stack The call-stack (or just stack) has one part, or frame, for each active procedure an active procedure is a Java method, Python function, etc that has not yet returned The frame stores the state needed by the procedure call, including return address, local variables that don t fit in registers, and saved registers In MIPS, we use register $sp (stack pointer) to store the address of the current frame

33 Example: using the stack stack yoo frame who frame ami frame ami frame procedure ami is recursive (calls itself) ami frame

34 Example: using the stack in MIPS

35 Template for a procedure definition

36 Helpful tip: macros in MIPS # define macro to push a register value to stack.macro push (%x) addiu $sp, $sp, -4 sw %x, 0($sp).end_macro # define a macro to pop a register value from stack.macro pop (%x) lw %x, 0($sp) addiu $sp, $sp, 4.end_macro push/pop involves: 1. decrementing/incrementing $sp 2. sw/lwthe saved register so for convenience, we can define a macro that does those things

37 Template for a procedure definition (using push and pop macros) procedure_name: # prolog # "push" registers onto the stack push(r1) push(r2)... # body get arguments from $a0,$a1 (if applies) do the work, call other procedures call other functions set return value $v0 (if applies) # epilog # "pop" registers off the stack pop(r1) pop(r2)... j $ra

38 Checklist (go through this when you write a function in MIPS) qdid I use the $a0-$a3 registers to pass arguments? qdid I use the $v0, $v1 registers for passing return values? qdid I save the $s_ registers that my function clobbers? qdid I match the restores (pops) with the saves (pushes)? qif there is a jal in my function did I save/resotre the $ra register?

39 Full example (revisited) multbyn: # prolog # "push" registers onto the stack addiu $sp,$sp,-8 sw $ra, 0($sp) sw $s0, 4($sp) move $s0, $a0 // x*n for positive n int multbyn(int x, int n) { if (n<=1) return 0; else return x + multbyn(n-1); } # body ble $a1, 1, return0 addiu $a1, $a1, -1 # recursive call jal multbyn # set return value add $v0, $s0, $v0 j end return0: # set return value addiu $v0, $zero, 0 end: # epilog # "pop" registers off the stack lw $ra, 0($sp) lw $s0, 4($sp) addiu $sp,$sp,8 j $ra

40 1 Your turn get into a group of 3 (appoint scribe, manager, skeptic) for each problem: a) write in high level (e.g. Java) pseudocode b) translate to MIPS c) MIPS code to call the function on sample inputs (assume register $s0 already holds the address of array x for 2 & 3) // returns x+y int xplusy(int x, int y) on the board use the template and checklist to help with your skepticism 2 // add 1 to each array element in-place (recursive) void add1(int[] x, int size) 3 // return the sum of the elements in the array (recursive) int sum(int[] x, int size)

The plot thickens. Some MIPS instructions you can write cannot be translated to a 32-bit number

The plot thickens. Some MIPS instructions you can write cannot be translated to a 32-bit number The plot thickens Some MIPS instructions you can write cannot be translated to a 32-bit number some reasons why 1) constants are too big 2) relative addresses are too big 3) absolute addresses are outside

More information

CS 2630 Computer Organization. Meeting 10/11: data structures in MIPS Brandon Myers University of Iowa

CS 2630 Computer Organization. Meeting 10/11: data structures in MIPS Brandon Myers University of Iowa CS 2630 Computer Organization Meeting 10/11: data structures in MIPS Brandon Myers University of Iowa Where we are going Compiler Instruction set architecture (e.g., MIPS) translating source code (C or

More information

COMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture

COMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture COMP 303 Computer Architecture Lecture 3 Comp 303 Computer Architecture 1 Supporting procedures in computer hardware The execution of a procedure Place parameters in a place where the procedure can access

More information

MIPS Functions and the Runtime Stack

MIPS Functions and the Runtime Stack MIPS Functions and the Runtime Stack COE 301 Computer Organization Prof. Muhamed Mudawar College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals Presentation Outline

More information

Subroutines. int main() { int i, j; i = 5; j = celtokel(i); i = j; return 0;}

Subroutines. int main() { int i, j; i = 5; j = celtokel(i); i = j; return 0;} Subroutines Also called procedures or functions Example C code: int main() { int i, j; i = 5; j = celtokel(i); i = j; return 0;} // subroutine converts Celsius to kelvin int celtokel(int i) { return (i

More information

Lecture 5: Procedure Calls

Lecture 5: Procedure Calls Lecture 5: Procedure Calls Today s topics: Memory layout, numbers, control instructions Procedure calls 1 Memory Organization The space allocated on stack by a procedure is termed the activation record

More information

Branch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015

Branch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015 Branch Addressing Branch instructions specify Opcode, two registers, target address Most branch targets are near branch Forward or backward op rs rt constant or address 6 bits 5 bits 5 bits 16 bits PC-relative

More information

Control Instructions

Control Instructions Control Instructions Tuesday 22 September 15 Many slides adapted from: and Design, Patterson & Hennessy 5th Edition, 2014, MK and from Prof. Mary Jane Irwin, PSU Summary Previous Class Instruction Set

More information

UCB CS61C : Machine Structures

UCB CS61C : Machine Structures inst.eecs.berkeley.edu/~cs61c UCB CS61C : Machine Structures Lecture 10 Introduction to MIPS Procedures I Sr Lecturer SOE Dan Garcia 2014-02-14 If cars broadcast their speeds to other vehicles (and the

More information

EE 361 University of Hawaii Fall

EE 361 University of Hawaii Fall C functions Road Map Computation flow Implementation using MIPS instructions Useful new instructions Addressing modes Stack data structure 1 EE 361 University of Hawaii Implementation of C functions and

More information

CS 61c: Great Ideas in Computer Architecture

CS 61c: Great Ideas in Computer Architecture MIPS Functions July 1, 2014 Review I RISC Design Principles Smaller is faster: 32 registers, fewer instructions Keep it simple: rigid syntax, fixed instruction length MIPS Registers: $s0-$s7,$t0-$t9, $0

More information

Memory Usage 0x7fffffff. stack. dynamic data. static data 0x Code Reserved 0x x A software convention

Memory Usage 0x7fffffff. stack. dynamic data. static data 0x Code Reserved 0x x A software convention Subroutines Why we use subroutines more modular program (small routines, outside data passed in) more readable, easier to debug code reuse i.e. smaller code space Memory Usage A software convention stack

More information

Course Administration

Course Administration Fall 2018 EE 3613: Computer Organization Chapter 2: Instruction Set Architecture Introduction 4/4 Avinash Karanth Department of Electrical Engineering & Computer Science Ohio University, Athens, Ohio 45701

More information

CS61C : Machine Structures

CS61C : Machine Structures inst.eecs.berkeley.edu/~cs61c/su05 CS61C : Machine Structures Lecture #8: MIPS Procedures 2005-06-30 CS 61C L08 MIPS Procedures (1) Andy Carle Topic Outline Functions More Logical Operations CS 61C L08

More information

Control Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary

Control Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary Control Instructions Computer Organization Architectures for Embedded Computing Thursday, 26 September 2013 Many slides adapted from: Computer Organization and Design, Patterson & Hennessy 4th Edition,

More information

CS61C : Machine Structures

CS61C : Machine Structures inst.eecs.berkeley.edu/~cs61c/su06 CS61C : Machine Structures Lecture #9: MIPS Procedures 2006-07-11 CS 61C L09 MIPS Procedures (1) Andy Carle C functions main() { int i,j,k,m;... i = mult(j,k);... m =

More information

Lec 10: Assembler. Announcements

Lec 10: Assembler. Announcements Lec 10: Assembler Kavita Bala CS 3410, Fall 2008 Computer Science Cornell University Announcements HW 2 is out Due Wed after Fall Break Robot-wide paths PA 1 is due next Wed Don t use incrementor 4 times

More information

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero Do-While Example In C++ do { z--; while (a == b); z = b; In assembly language loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero 25 Comparisons Set on less than (slt) compares its source registers

More information

CSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI.

CSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI. CSCI 402: Computer Architectures Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI Recall Big endian, little endian Memory alignment Unsigned

More information

MIPS%Assembly% E155%

MIPS%Assembly% E155% MIPS%Assembly% E155% Outline MIPS Architecture ISA Instruction types Machine codes Procedure call Stack 2 The MIPS Register Set Name Register Number Usage $0 0 the constant value 0 $at 1 assembler temporary

More information

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine Machine Language Instructions Introduction Instructions Words of a language understood by machine Instruction set Vocabulary of the machine Current goal: to relate a high level language to instruction

More information

CS 2630 Computer Organization. Meeting 4: Intro to Architecture (specifically, MIPS) Brandon Myers University of Iowa

CS 2630 Computer Organization. Meeting 4: Intro to Architecture (specifically, MIPS) Brandon Myers University of Iowa CS 2630 Computer Organization Meeting 4: Intro to Architecture (specifically, MIPS) Brandon Myers University of Iowa Where we are going Compiler Instruction set architecture (e.g., MIPS) translating source

More information

CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions

CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions Instructors: John Wawrzynek & Vladimir Stojanovic http://inst.eecs.berkeley.edu/~cs61c/fa15 1 Machine Interpretation Levels of Representation/Interpretation

More information

CSE Lecture In Class Example Handout

CSE Lecture In Class Example Handout CSE 30321 Lecture 07-09 In Class Example Handout Part A: A Simple, MIPS-based Procedure: Swap Procedure Example: Let s write the MIPS code for the following statement (and function call): if (A[i] > A

More information

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont )

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont ) Chapter 2 Computer Abstractions and Technology Lesson 4: MIPS (cont ) Logical Operations Instructions for bitwise manipulation Operation C Java MIPS Shift left >>> srl Bitwise

More information

ECE 15B Computer Organization Spring 2010

ECE 15B Computer Organization Spring 2010 ECE 15B Computer Organization Spring 2010 Dmitri Strukov Lecture 7: Procedures I Partially adapted from Computer Organization and Design, 4 th edition, Patterson and Hennessy, and classes taught by and

More information

Computer Architecture

Computer Architecture Computer Architecture Chapter 2 Instructions: Language of the Computer Fall 2005 Department of Computer Science Kent State University Assembly Language Encodes machine instructions using symbols and numbers

More information

MIPS Functions and Instruction Formats

MIPS Functions and Instruction Formats MIPS Functions and Instruction Formats 1 The Contract: The MIPS Calling Convention You write functions, your compiler writes functions, other compilers write functions And all your functions call other

More information

Calling Conventions. Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University. See P&H 2.8 and 2.12

Calling Conventions. Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University. See P&H 2.8 and 2.12 Calling Conventions Hakim Weatherspoon CS 3410, Spring 2012 Computer Science Cornell University See P&H 2.8 and 2.12 Goals for Today Calling Convention for Procedure Calls Enable code to be reused by allowing

More information

Lecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook)

Lecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook) Lecture 2 Instructions: Language of the Computer (Chapter 2 of the textbook) Instructions: tell computers what to do Chapter 2 Instructions: Language of the Computer 2 Introduction Chapter 2.1 Chapter

More information

ECE 30 Introduction to Computer Engineering

ECE 30 Introduction to Computer Engineering ECE 30 Introduction to Computer Engineering Study Problems, Set #3 Spring 2015 Use the MIPS assembly instructions listed below to solve the following problems. arithmetic add add sub subtract addi add

More information

Lecture 7: Procedures

Lecture 7: Procedures Lecture 7: Procedures CSE 30: Computer Organization and Systems Programming Winter 2010 Rajesh Gupta / Ryan Kastner Dept. of Computer Science and Engineering University of California, San Diego Outline

More information

ECE 331 Hardware Organization and Design. Professor Jay Taneja UMass ECE - Discussion 3 2/8/2018

ECE 331 Hardware Organization and Design. Professor Jay Taneja UMass ECE - Discussion 3 2/8/2018 ECE 331 Hardware Organization and Design Professor Jay Taneja UMass ECE - jtaneja@umass.edu Discussion 3 2/8/2018 Study Jams Leader: Chris Bartoli Tuesday 5:30-6:45pm Elab 325 Wednesday 8:30-9:45pm Elab

More information

comp 180 Lecture 10 Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions

comp 180 Lecture 10 Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions Outline of Lecture Procedure calls Saving and restoring registers Summary of MIPS instructions Procedure Calls A procedure of a subroutine is like an agent which needs certain information to perform a

More information

ECE232: Hardware Organization and Design

ECE232: Hardware Organization and Design ECE232: Hardware Organization and Design Lecture 6: Procedures Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Overview Procedures have different names in different languages Java:

More information

CS61C : Machine Structures

CS61C : Machine Structures inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture 11 Introduction to MIPS Procedures I Lecturer PSOE Dan Garcia www.cs.berkeley.edu/~ddgarcia CS61C L11 Introduction to MIPS: Procedures I

More information

Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University. See P&H 2.8 and 2.12, and A.

Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University. See P&H 2.8 and 2.12, and A. Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University See P&H 2.8 and 2.12, and A.5 6 compute jump/branch targets memory PC +4 new pc Instruction Fetch

More information

MIPS Datapath. MIPS Registers (and the conventions associated with them) MIPS Instruction Types

MIPS Datapath. MIPS Registers (and the conventions associated with them) MIPS Instruction Types 1 Lecture 08 Introduction to the MIPS ISA + Procedure Calls in MIPS Longer instructions = more bits to address registers MIPS Datapath 6 bit opcodes... 2 MIPS Instructions are 32 bits More ways to address

More information

CS 110 Computer Architecture Lecture 6: More MIPS, MIPS Functions

CS 110 Computer Architecture Lecture 6: More MIPS, MIPS Functions CS 110 Computer Architecture Lecture 6: More MIPS, MIPS Functions Instructor: Sören Schwertfeger http://shtech.org/courses/ca/ School of Information Science and Technology SIST ShanghaiTech University

More information

Lectures 3-4: MIPS instructions

Lectures 3-4: MIPS instructions Lectures 3-4: MIPS instructions Motivation Learn how a processor s native language looks like Discover the most important software-hardware interface MIPS Microprocessor without Interlocked Pipeline Stages

More information

CS153: Compilers Lecture 8: Compiling Calls

CS153: Compilers Lecture 8: Compiling Calls CS153: Compilers Lecture 8: Compiling Calls Stephen Chong https://www.seas.harvard.edu/courses/cs153 Announcements Project 2 out Due Thu Oct 4 (7 days) Project 3 out Due Tuesday Oct 9 (12 days) Reminder:

More information

Code Generation. The Main Idea of Today s Lecture. We can emit stack-machine-style code for expressions via recursion. Lecture Outline.

Code Generation. The Main Idea of Today s Lecture. We can emit stack-machine-style code for expressions via recursion. Lecture Outline. The Main Idea of Today s Lecture Code Generation We can emit stack-machine-style code for expressions via recursion (We will use MIPS assembly as our target language) 2 Lecture Outline What are stack machines?

More information

We can emit stack-machine-style code for expressions via recursion

We can emit stack-machine-style code for expressions via recursion Code Generation The Main Idea of Today s Lecture We can emit stack-machine-style code for expressions via recursion (We will use MIPS assembly as our target language) 2 Lecture Outline What are stack machines?

More information

CS 61C: Great Ideas in Computer Architecture. MIPS Instruction Formats

CS 61C: Great Ideas in Computer Architecture. MIPS Instruction Formats CS 61C: Great Ideas in Computer Architecture MIPS Instruction Formats Instructor: Justin Hsia 6/27/2012 Summer 2012 Lecture #7 1 Review of Last Lecture New registers: $a0-$a3, $v0-$v1, $ra, $sp Also: $at,

More information

Functions in MIPS. Functions in MIPS 1

Functions in MIPS. Functions in MIPS 1 Functions in MIPS We ll talk about the 3 steps in handling function calls: 1. The program s flow of control must be changed. 2. Arguments and return values are passed back and forth. 3. Local variables

More information

Thomas Polzer Institut für Technische Informatik

Thomas Polzer Institut für Technische Informatik Thomas Polzer tpolzer@ecs.tuwien.ac.at Institut für Technische Informatik Branch to a labeled instruction if a condition is true Otherwise, continue sequentially beq rs, rt, L1 if (rs == rt) branch to

More information

Lectures 5. Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS

Lectures 5. Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS Lectures 5 Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS 1 OOPS - What does this C code do? int foo(char *s) { int L = 0; while (*s++) { ++L; } return L; } 2

More information

Review (1/2) IEEE 754 Floating Point Standard: Kahan pack as much in as could get away with. CS61C - Machine Structures

Review (1/2) IEEE 754 Floating Point Standard: Kahan pack as much in as could get away with. CS61C - Machine Structures Review (1/2) CS61C - Machine Structures Lecture 11 - Starting a Program October 4, 2000 David Patterson http://www-inst.eecs.berkeley.edu/~cs61c/ IEEE 754 Floating Point Standard: Kahan pack as much in

More information

CENG3420 Lecture 03 Review

CENG3420 Lecture 03 Review CENG3420 Lecture 03 Review Bei Yu byu@cse.cuhk.edu.hk 2017 Spring 1 / 38 CISC vs. RISC Complex Instruction Set Computer (CISC) Lots of instructions of variable size, very memory optimal, typically less

More information

CS 316: Procedure Calls/Pipelining

CS 316: Procedure Calls/Pipelining CS 316: Procedure Calls/Pipelining Kavita Bala Fall 2007 Computer Science Cornell University Announcements PA 3 IS out today Lectures on it this Fri and next Tue/Thu Due on the Friday after Fall break

More information

Function Calling Conventions 1 CS 64: Computer Organization and Design Logic Lecture #9

Function Calling Conventions 1 CS 64: Computer Organization and Design Logic Lecture #9 Function Calling Conventions 1 CS 64: Computer Organization and Design Logic Lecture #9 Ziad Matni Dept. of Computer Science, UCSB Lecture Outline More on MIPS Calling Convention Functions calling functions

More information

Lecture 4: MIPS Instruction Set

Lecture 4: MIPS Instruction Set Lecture 4: MIPS Instruction Set No class on Tuesday Today s topic: MIPS instructions Code examples 1 Instruction Set Understanding the language of the hardware is key to understanding the hardware/software

More information

Overview. Introduction to the MIPS ISA. MIPS ISA Overview. Overview (2)

Overview. Introduction to the MIPS ISA. MIPS ISA Overview. Overview (2) Introduction to the MIPS ISA Overview Remember that the machine only understands very basic instructions (machine instructions) It is the compiler s job to translate your high-level (e.g. C program) into

More information

Computer Architecture Instruction Set Architecture part 2. Mehran Rezaei

Computer Architecture Instruction Set Architecture part 2. Mehran Rezaei Computer Architecture Instruction Set Architecture part 2 Mehran Rezaei Review Execution Cycle Levels of Computer Languages Stored Program Computer/Instruction Execution Cycle SPIM, a MIPS Interpreter

More information

Implementing Procedure Calls

Implementing Procedure Calls 1 / 39 Implementing Procedure Calls February 18 22, 2013 2 / 39 Outline Intro to procedure calls Caller vs. callee Procedure call basics Calling conventions The stack Interacting with the stack Structure

More information

MIPS Assembly (Functions)

MIPS Assembly (Functions) ECPE 170 Jeff Shafer University of the Pacific MIPS Assembly (Functions) 2 Lab Schedule This Week Activities Lab work time MIPS functions MIPS Random Number Generator Lab 11 Assignments Due Due by Apr

More information

CS222: MIPS Instruction Set

CS222: MIPS Instruction Set CS222: MIPS Instruction Set Dr. A. Sahu Dept of Comp. Sc. & Engg. Indian Institute of Technology Guwahati 1 Outline Previous Introduction to MIPS Instruction Set MIPS Arithmetic's Register Vs Memory, Registers

More information

CS61C Machine Structures. Lecture 12 - MIPS Procedures II & Logical Ops. 2/13/2006 John Wawrzynek. www-inst.eecs.berkeley.

CS61C Machine Structures. Lecture 12 - MIPS Procedures II & Logical Ops. 2/13/2006 John Wawrzynek. www-inst.eecs.berkeley. CS61C Machine Structures Lecture 12 - MIPS Procedures II & Logical Ops 2/13/2006 John Wawrzynek (www.cs.berkeley.edu/~johnw) www-inst.eecs.berkeley.edu/~cs61c/ CS 61C L12 MIPS Procedures II / Logical (1)

More information

2) Using the same instruction set for the TinyProc2, convert the following hex values to assembly language: x0f

2) Using the same instruction set for the TinyProc2, convert the following hex values to assembly language: x0f CS2 Fall 28 Exam 2 Name: ) The Logisim TinyProc2 has four instructions, each using 8 bits. The instruction format is DR SR SR2 OpCode with OpCodes of for add, for subtract, and for multiply. Load Immediate

More information

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA MIPS ISA. In a CPU. (vonneumann) Processor Organization

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA MIPS ISA. In a CPU. (vonneumann) Processor Organization CISC 662 Graduate Computer Architecture Lecture 4 - ISA MIPS ISA Michela Taufer http://www.cis.udel.edu/~taufer/courses Powerpoint Lecture Notes from John Hennessy and David Patterson s: Computer Architecture,

More information

ELEC / Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2)

ELEC / Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2) ELEC 5200-001/6200-001 Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2) Victor P. Nelson, Professor & Asst. Chair Vishwani D. Agrawal, James J. Danaher Professor Department

More information

CS 61C: Great Ideas in Computer Architecture More RISC-V Instructions and How to Implement Functions

CS 61C: Great Ideas in Computer Architecture More RISC-V Instructions and How to Implement Functions CS 61C: Great Ideas in Computer Architecture More RISC-V Instructions and How to Implement Functions Instructors: Krste Asanović and Randy H. Katz http://inst.eecs.berkeley.edu/~cs61c/fa17 9/14/17 Fall

More information

MIPS Programming. A basic rule is: try to be mechanical (that is, don't be "tricky") when you translate high-level code into assembler code.

MIPS Programming. A basic rule is: try to be mechanical (that is, don't be tricky) when you translate high-level code into assembler code. MIPS Programming This is your crash course in assembler programming; you will teach yourself how to program in assembler for the MIPS processor. You will learn how to use the instruction set summary to

More information

2/16/2018. Procedures, the basic idea. MIPS Procedure convention. Example: compute multiplication. Re-write it as a MIPS procedure

2/16/2018. Procedures, the basic idea. MIPS Procedure convention. Example: compute multiplication. Re-write it as a MIPS procedure Procedures, the basic idea CSCI206 - Computer Organization & Programming Introduction to Procedures zybook: 81 (for next class) MIPS Procedure convention 1 Prepare parameters in $a0 through $a3 2 Return

More information

Instructions: Assembly Language

Instructions: Assembly Language Chapter 2 Instructions: Assembly Language Reading: The corresponding chapter in the 2nd edition is Chapter 3, in the 3rd edition it is Chapter 2 and Appendix A and in the 4th edition it is Chapter 2 and

More information

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA

CISC 662 Graduate Computer Architecture. Lecture 4 - ISA CISC 662 Graduate Computer Architecture Lecture 4 - ISA Michela Taufer http://www.cis.udel.edu/~taufer/courses Powerpoint Lecture Notes from John Hennessy and David Patterson s: Computer Architecture,

More information

Procedures and Stacks

Procedures and Stacks Procedures and Stacks Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T. March 15, 2018 L10-1 Announcements Schedule has shifted due to snow day Quiz 2 is now on Thu 4/12 (one week later)

More information

ECE260: Fundamentals of Computer Engineering

ECE260: Fundamentals of Computer Engineering Supporting Nested Procedures James Moscola Dept. of Engineering & Computer Science York College of Pennsylvania Based on Computer Organization and Design, 5th Edition by Patterson & Hennessy Memory Layout

More information

CS 110 Computer Architecture MIPS Instruction Formats

CS 110 Computer Architecture MIPS Instruction Formats CS 110 Computer Architecture MIPS Instruction Formats Instructor: Sören Schwertfeger http://shtech.org/courses/ca/ School of Information Science and Technology SIST ShanghaiTech University Slides based

More information

Chapter 2A Instructions: Language of the Computer

Chapter 2A Instructions: Language of the Computer Chapter 2A Instructions: Language of the Computer Copyright 2009 Elsevier, Inc. All rights reserved. Instruction Set The repertoire of instructions of a computer Different computers have different instruction

More information

SPIM Instruction Set

SPIM Instruction Set SPIM Instruction Set This document gives an overview of the more common instructions used in the SPIM simulator. Overview The SPIM simulator implements the full MIPS instruction set, as well as a large

More information

Rui Wang, Assistant professor Dept. of Information and Communication Tongji University.

Rui Wang, Assistant professor Dept. of Information and Communication Tongji University. Instructions: ti Language of the Computer Rui Wang, Assistant professor Dept. of Information and Communication Tongji University it Email: ruiwang@tongji.edu.cn Computer Hierarchy Levels Language understood

More information

Computer Organization MIPS ISA

Computer Organization MIPS ISA CPE 335 Computer Organization MIPS ISA Dr. Iyad Jafar Adapted from Dr. Gheith Abandah Slides http://www.abandah.com/gheith/courses/cpe335_s08/index.html CPE 232 MIPS ISA 1 (vonneumann) Processor Organization

More information

MIPS Assembly Language Programming

MIPS Assembly Language Programming MIPS Assembly Language Programming COE 308 Computer Architecture Prof. Muhamed Mudawar College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals Presentation Outline Assembly

More information

ECE 15B COMPUTER ORGANIZATION

ECE 15B COMPUTER ORGANIZATION ECE 15B COMPUTER ORGANIZATION Lecture 17 Executing Programs: Compiling, Assembling, Linking and Loading (Part II) Project #3 Due June 10, 5pm Announcements Submit via email Homework #4 Due June 5, 5pm

More information

Instruction Set Architecture

Instruction Set Architecture Computer Architecture Instruction Set Architecture Lynn Choi Korea University Machine Language Programming language High-level programming languages Procedural languages: C, PASCAL, FORTRAN Object-oriented

More information

CS64 Week 5 Lecture 1. Kyle Dewey

CS64 Week 5 Lecture 1. Kyle Dewey CS64 Week 5 Lecture 1 Kyle Dewey Overview More branches in MIPS Memory in MIPS MIPS Calling Convention More Branches in MIPS else_if.asm nested_if.asm nested_else_if.asm Memory in MIPS Accessing Memory

More information

MIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions

MIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions Representing Instructions Instructions are encoded in binary Called machine code MIPS instructions Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register

More information

Chapter 2: Instructions:

Chapter 2: Instructions: Chapter 2: Instructions: Language of the Computer Computer Architecture CS-3511-2 1 Instructions: To command a computer s hardware you must speak it s language The computer s language is called instruction

More information

Instruction Set Architectures (4)

Instruction Set Architectures (4) Computer Architecture Week 06 Instruction Set Architectures (4) College of Information Science and Engineering Ritsumeikan University subroutines functions, procedures remember the next instruction s address

More information

MIPS Assembly Language Programming

MIPS Assembly Language Programming MIPS Assembly Language Programming ICS 233 Computer Architecture and Assembly Language Dr. Aiman El-Maleh College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals [Adapted

More information

Computer Architecture. Chapter 2-2. Instructions: Language of the Computer

Computer Architecture. Chapter 2-2. Instructions: Language of the Computer Computer Architecture Chapter 2-2 Instructions: Language of the Computer 1 Procedures A major program structuring mechanism Calling & returning from a procedure requires a protocol. The protocol is a sequence

More information

ENCM 369 Winter 2013: Reference Material for Midterm #2 page 1 of 5

ENCM 369 Winter 2013: Reference Material for Midterm #2 page 1 of 5 ENCM 369 Winter 2013: Reference Material for Midterm #2 page 1 of 5 MIPS/SPIM General Purpose Registers Powers of Two 0 $zero all bits are zero 16 $s0 local variable 1 $at assembler temporary 17 $s1 local

More information

MIPS function continued

MIPS function continued MIPS function continued Review Functions Series of related instructions one after another in memory Called through the jal instruction Pointed to by a label like any other Returns by calling Stack Top

More information

CSE 378 Midterm Sample Solution 2/11/11

CSE 378 Midterm Sample Solution 2/11/11 Question 1. (9 points). Suppose we have the following MIPS instructions stored in memory starting at location 0x2400. 2400: add $v0,$t1,$t3 2404: loop: sll $t3,$a2,12 2408: or $s2,$t3,$a1 240c: bne $s2,$t8,loop

More information

Computer Science and Engineering 331. Midterm Examination #1. Fall Name: Solutions S.S.#:

Computer Science and Engineering 331. Midterm Examination #1. Fall Name: Solutions S.S.#: Computer Science and Engineering 331 Midterm Examination #1 Fall 2000 Name: Solutions S.S.#: 1 41 2 13 3 18 4 28 Total 100 Instructions: This exam contains 4 questions. It is closed book and notes. Calculators

More information

Lecture 5: Procedure Calls

Lecture 5: Procedure Calls Lecture 5: Procedure Calls Today s topics: Procedure calls and register saving conventions 1 Example Convert to assembly: while (save[i] == k) i += 1; i and k are in $s3 and $s5 and base of array save[]

More information

Compiling Code, Procedures and Stacks

Compiling Code, Procedures and Stacks Compiling Code, Procedures and Stacks L03-1 RISC-V Recap Computational Instructions executed by ALU Register-Register: op dest, src1, src2 Register-Immediate: op dest, src1, const Control flow instructions

More information

From Code to Program: CALL Con'nued (Linking, and Loading)

From Code to Program: CALL Con'nued (Linking, and Loading) ecture 13 Computer Science 61C Spring 2017 February 15th, 2017 From Code to Program: CALL Con'nued (Linking, and Loading) 1 Administrivia We know it still sucks but: Waitlist students: Please be patient.

More information

ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design

ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design Professor Sherief Reda http://scale.engin.brown.edu School of Engineering Brown University Spring 2014 Sources: Computer

More information

Lecture 5. Announcements: Today: Finish up functions in MIPS

Lecture 5. Announcements: Today: Finish up functions in MIPS Lecture 5 Announcements: Today: Finish up functions in MIPS 1 Control flow in C Invoking a function changes the control flow of a program twice. 1. Calling the function 2. Returning from the function In

More information

Programming the processor

Programming the processor CSC258 Week 9 Logistics This week: Lab 7 is the last Logisim DE2 lab. Next week: Lab 8 will be assembly. For assembly labs you can work individually or in pairs. No matter how you do it, the important

More information

Chapter 2. Instructions:

Chapter 2. Instructions: Chapter 2 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS Arithmetic Instructions We ll be working with

More information

CS 61c: Great Ideas in Computer Architecture

CS 61c: Great Ideas in Computer Architecture MIPS Instruction Formats July 2, 2014 Review New registers: $a0-$a3, $v0-$v1, $ra, $sp New instructions: slt, la, li, jal, jr Saved registers: $s0-$s7, $sp, $ra Volatile registers: $t0-$t9, $v0-$v1, $a0-$a3

More information

Instruction Set Architecture part 1 (Introduction) Mehran Rezaei

Instruction Set Architecture part 1 (Introduction) Mehran Rezaei Instruction Set Architecture part 1 (Introduction) Mehran Rezaei Overview Last Lecture s Review Execution Cycle Levels of Computer Languages Stored Program Computer/Instruction Execution Cycle SPIM, a

More information

We will study the MIPS assembly language as an exemplar of the concept.

We will study the MIPS assembly language as an exemplar of the concept. MIPS Assembly Language 1 We will study the MIPS assembly language as an exemplar of the concept. MIPS assembly instructions each consist of a single token specifying the command to be carried out, and

More information

MODULE 4 INSTRUCTIONS: LANGUAGE OF THE MACHINE

MODULE 4 INSTRUCTIONS: LANGUAGE OF THE MACHINE MODULE 4 INSTRUCTIONS: LANGUAGE OF THE MACHINE 1 ARCHITECTURE MODEL The basic instruction set of a computer is comprised of sequences of REGISTER TRANSFERS. Example: Add A, B, C Register B # A

More information

Today. Putting it all together

Today. Putting it all together Today! One complete example To put together the snippets of assembly code we have seen! Functions in MIPS Slides adapted from Josep Torrellas, Craig Zilles, and Howard Huang Putting it all together! Count

More information

MIPS Procedure Calls - Review

MIPS Procedure Calls - Review MIPS Stacks and Subroutine Calls Cptr280 Dr Curtis Nelson MIPS Procedure Calls - Review When making a procedure or function call, it is necessary to: Place parameters you wish to pass where they can be

More information

Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes

Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes Chapter 2 Instructions: Language of the Computer Adapted by Paulo Lopes Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects

More information