Computer Arithmetic Multiplication & Shift Chapter 3.4 EEC170 FQ 2005

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1 Computer Arithmetic Multiplication & Shift Chapter 3.4 EEC170 FQ 200 Multiply We will start with unsigned multiply and contrast how humans and computers multiply Layout 8-bit 8 Pipelined Multiplier 1 2 We first generate all partial product terms We first generate all partial product terms Partial Product Partial Product 3 4 We first generate all partial product terms We first generate all partial product terms 1 Partial Product 101 Partial Product 6

2 Then add column by column, right to left Then add column by column, right to left == 0 Product == 10 Product 7 8 Then add column by column, right to left Sometimes with one or more carry digits == 010 Product 1 == 0010 Product 9 10 Sometimes with one or more carry digits Sometimes with one or more carry digits 11 == Product 111 == 10 Product 11 12

3 Sometimes with one or more carry digits Sometimes with one or more carry digits 1111 == 010 Product 1111 == Product Sometimes with one or more carry digits 1111 == Product Human Method Not Best for Computers Each partial product must be stored extra hardware Columns vary in size complexity Multiple-digit carries complexity Need a simpler method for low-cost multipliers 1 16 Simplest computer multiply is to shift left one bit per iteration to generate partial product Each iteration if corresponding Multiplier bit is 1: Product = Product + NxN bit multiply takes N iterations (N clock cycles) Old Product New Product 17 18

4 Old Product New Product 1 Old Product New Product Old Product New Product Computer multiply also shifts multiplier right so current multiplier bit is at a fixed position, the least significant bit (LSB) Old Product New Product x 110 Old Product New Product 23 24

5 x 111 Old Product New Product x Old Product New Product 2 26 Software Multiple Very simple processors don t t have hardware, implement shift & add in software Multiply in C: int product = 0; for(int i = 0; i<32; i++) if( ( multiplier>> >>i i % 2 ) == 1) product = product + multiplicand<< <<i; MIPS Assembly Multiply # multiplicand is in $a0, need not save # multiplier is in $a1, need not save # move $v0,0 #$v0 is the product Loop: andi $t1,$a1,1 #get multiplier bit beq $t1,$0,next #test bit add $v0,$v0,$a0 #add partial product Next: sll $a0,$a0,1 #get next partial product slr $a1,$a1,1 #position multiplier bit bne $a1,$0,loop #got any bits left? Simple Hardware Multiply Like shift & add we have already seen Multiplier LSB is write enable for Product latch Simple Hardware Multiply Multiplier Multiplier bit ALU 8-bit ALU Product Product 29 30

6 Simple Hardware Multiply Simple Hardware Multiply Multiplier Multiplier bit ALU 8-bit ALU Product Product Simple Hardware Multiply 8-bit ALU Product 1010 Multiplier Refined Multiply Hardware Notice the following about the simple shift & add hardware: Only N significant bits are being summed each cycle, but we are using a 2N-bit adder, a waste Each cycle one new bit of the product is resolved, while one old bit of the multiplier is discarded Simple multiply shifts left and keeps Product stationary. It is equivalent to keep stationary and shift Product right (same relative motion) Refined Hardware Multiply ALU input is accept/not accept based on Start of 1 st Iteration Refined Hardware Multiply When =0, shift but no ALU input Start of 2 nd Iteration

7 Refined Hardware Multiply Refined Hardware Multiply Start of 3 rd Iteration Start of 4 th Iteration Refined Hardware Multiply Final : 10 x 13 = Product 39 Signed Multiplication Shift and Add only works for positive numbers To include negative numbers must: Save XOR of sign bits to get product sign bit Convert multiplier/multiplicand to positive Do shift and add algorithm Negate result if product sign bit is 1 handles positive /negative numbers uniformly Based on observation that = 100 = E.g., (14 10 ) = 1 2 (16 10 ) (2 10 ) = I.e. convert string of 1s into leading +1 and a trialing ten = ten =

8 1 ten = ten = = ten = ten = ten = ten = =

9 -1 ten = = -1-6 ten = ten = = -1-6 ten = ten = = -1-6 ten = ten = = -1-6 ten = = = -6 2 Booth Hardware Implementation Use ALU to ADD or SUB based on the trailing 1s, leading 1s from the Multiplier Booth Hardware Implementation Product shift is arithmetic shift, sign bit does not change Start of 1 st iteration Start of 2 nd iteration

10 Booth Hardware Implementation Booth Hardware Implementation Start of 3 rd iteration Start of 4 th iteration Booth Hardware Implementation Fast Multiply Final : -66 x 33 = 18 Shift & Add is slow: 32x slower than addition Fast processors have fast multiply hardware using more hardware than shift & add Basic example is a Wallace tree adder, which uses an array of full adder cells Wallace Tree Stage 0 Wallace Tree Reducers Partial products produced sequentially (slow) Multiplier Partial Products Partial products produced using array of AND gates (fast) Multiplier Partial Products Full adder cells used to reduce column segment of height 3 to row of width 2 sum and carry out Half adders used selectively for height-3 column that does not need full reduction Full Adder Half Adder 9 60

11 Wallace Tree Strategy In stages reduce column height from <=N to height 2, then use fast adder Wallace Tree Adder

12

13 6-Bit Adder 6-Bit Adder Wallace Tree Multiplier: 8x8 Example x x x x x x x x y y y y y y y y Wallace Tree Mult (cont.) Column height is reduced by about 2/3 during each level Stage 0 For NxN multiply, an estimate for number of levels: N x (2/3) x = 2 (2/3) x = 2/N Stage 3 Stage 4 x log 2 (2/3) = log 2 (2/N) x = log 2 (2/N) / log 2 (2/3) x = [log(2) -log(n)] / -0.6 x = -1.7 x [1 -log 2 (N)] 14-Bit Adder x = 1.7*log log 2 (N) Levels for N=4, 4 Levels for N = 8, 7 levels for N = Barrel Shifter Barrel Shifter Want shifter that is fast, not shift one bit position at a time Can be done in N-1=31 N shifts in log 2 N= stages using an array of N log 2 N= 160 multiplexers Shift Amount S2 S1 S Input Shifted Input Unshifted Input Shift Control

14 Barrel Shifter Barrel Shifter Shift Amount S2 S1 S Input Shift Amount S2 S1 S Input Barrel Shifter Barrel Shifter Shift Amount S2 S1 S Input Shift Amount S2 S1 S Input Barrel Shifter Barrel Shifter Shift Amount S2 S1 S Input Shift Amount S2 S1 S Input

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