Switch and Router Design. Packet Processing Examples. Packet Processing Examples. Packet Processing Rate 12/14/2011
|
|
- Elwin Johnston
- 5 years ago
- Views:
Transcription
1 // Bottlenecks Memory, memory, 88 - Switch and Router Design Dr. David Hay Ross 8b dhay@cs.huji.ac.il Source: Nick Mckeown, Isaac Keslassy Packet Processing Examples Address Lookup (IP/Ethernet) Where to send an incoming packet? Use output-port, to send packets to MAC address ::::89:ab Exact Match Use output-port, to send packets to destination network./ -(Longest Prefix Match) Packet Processing Examples Intrusion Detection Schemes Deep Packet inspection (DPI) Drop all packets that contains the string EvilWorm anywhere within the packet SNORT rule set Firewall, ACL Which packet to accept or deny? Drop all packets from evil source network./ on ports - Usually needs fields: source-address, dest-address, sourceport, dest-port, protocol Packet Processing Rate Memory Technology (-) Year Line Mb/s.Gb/s Gb/s Gb/s B packets (Mpkt/s).9.8. Technology Networking DRAM Single chip density $/chip ($/MByte) MB $-$ ($.-$.) SRAM MB $-$ ($-$8) TCAM MB $-$ ($-$) Access speed -8ns Watts/ chip.-w -8ns -W -8ns -W. Lookup mechanism must be simple and easy to implement. (Surprise?) Memory access time is the long-term bottleneck Note: Price, speed and power are manufacturer and market dependent. Numbers are a bit outdated but give the general idea
2 // Simplest Task: Exact Matching Solution : Binary Search Mostly in bridges Bridges works in layer (Ethernet) Bridges connects two Ethernet networks Wire-speed forwarding: Each time a packet arrives at a bridge, forward it according to the destination MAC address Store/update also the source MAC address (learning) Should be done at wire speed a b Bridge c d MAC addresses have values which can be sorted Thus, when keeping them sorted, one can perform a binary search on the array and find the right MAC address However, each iteration is a memory access log N memory accesses works fine (even using DRAM) for small speed, N (around Mb/s, 8K values) but doesn t scale for large N/higher speeds (not even for Mb/s, K values) Using faster hardware (SRAM) won t really solve the problem (and it is more expensive ) Scaling using Hashing Example (Gigaswitch, 99) Hashing is much faster than binary search on average, however much slower on the worst case (up to linear time ) However, one can choose (pre-compute) good hash functions, so the number of collision can be small and bounded Precomputation takes a lot of time, but addresses are not added in rapid rate Applying the hash functions is done on wire-speed More sophisticated data structure/hashing techniques can also be applied (e.g. to reduce memory) Bloom Filters, fingerprinting, etc. N = K; binary search takes memory accesses For each 8-bit address addr, we first apply h(addr), to get 8-bit value: LSB are the hash-table entry index (K entries) Each entry is a balanced binary tree of height at most, sorted by the remaining MSB The hash function should guarantee that no more than 8 addresses are in the same tree, and that we can disambiguate between addresses using the MSB Solve corner-cases separately (CAM); rehashing memory accesses IP longest prefix matching Destination = payload OK better even better Prefix Next Hop Interface.../... Output-port.../8...9 Output-port.../... Output-port Longest Prefix Match is Harder than Exact Match The destination address of an arriving packet does not carry with it the information to determine the length of the longest matching prefix Hence, one needs to search among the space of all prefix lengths; as well as the space of all prefixes of a given length best!..8./... IP Forwarding Table Output-port
3 // Current Practical Data Problem Definition Caching works poorly in backbone routers, concurrent flows Wire speed lookup needed for -byte packets % are TCP acks nsec/packet in Gbsand 8 nsec/packet in Gbs Lookup dominated by memory accesses speed is measured by memory accesses Prefix length 8- Today, prefixes with growth million prefixes Higher speeds need SRAM Worth minimizing memory 9../, R 9../../ 9../, R../, R 9../ LPM: Find the most specific route, or the longest matching prefix among all the prefixes matching the destination address of an incoming packet LPM in IPv Use exact match algorithms for LPM! Metrics for Lookup Algorithms Network Address We can start with prefix length 8 Exact match against prefixes of length Exact match against prefixes of length Exact match against prefixes of length Priority Encode and pick Port Speed (= number of memory accesses) Storage requirements (= amount of memory) Low update time Scalability With length of prefix: IPv unicast(b), Ethernet (8b), IPv multicast (b), IPv unicast(8b) With size of routing table: (sweetspotfor today s designs = million) Flexibility in implementation Low preprocessing time Our Toy Example Unibit(=Radix) Tries P = * P = * P = * = * = * = * = * = * = * P = * P = * P = * = * = * = * = * = * = * pointer prefix pointer Packet: ,,, Forward to
4 // Unibit Tries Compacting One-Way Branches (variant of PARTICIA tree) P = * P = * P = * = * = * = * = * = * = * P P P = * P = * P = * = * = * = * = * = * = * P P P P P = * P = * P = * = * = * = * = * = * = * P P P = * P = * P = * = * = * = * = * = * = * P P P P Input: Memory: null Input: Memory: P = * P = * P = * = * = * = * = * = * = * P P P = * P = * P = * = * = * = * = * = * = * P P P P Input: Memory: Input: Memory:
5 // Unibit Tries - Analysis W-bit prefixes, N -prefixes: O(W) lookup, O(NW) storage and O(W) update complexity Patricia: O(N) storage (why?) Still slow, high memory, but: Simple Extensible to wider fields Multi-bit Tries W W/k Binary trie Depth = W Degree = Stride = bit Multi-ary trie Depth = W/k Degree = k Stride = k bits Principle: Trade Memory for Speed Prefix Expansion with Multi-bit Tries Quadrary-Trie(k=) If stride = k bits, prefix lengths that are not a multiple of k need to be expanded E.g., k = : Prefix * *, * * * Expanded prefixes Maximum number of expanded prefixes corresponding to one non-expanded prefix = k- P = * P = * P = * = * = * = * = * = * = * a b a Pa Pb Pa a b Pb b Pa Pb Prefix Expansion Increases Storage Consumption Ternary Content-Addressable Memory (TCAM) Replication of next-hop ptr Greater number of unused (null) pointers in a node Time ~ W/k Storage ~ NW/k * k- Improvement: From Fixed-Stride Tries to Variable Stride Tries 8 9 TCAM Array Each entry is a word in {,, } W and represents a rule Encoder 8 9 Match lines Search Key
6 // Example TCAM Benefits and Disadvantages 8 9 Encoder Match lines Deterministic Search Throughput O() search Very flexible to other problems as well Next week: multi-field packet classifications However, relatively costly and energyconsuming $ for small (Mbit) TCAM Energy depends on the number of entries ~ million TCAM devices already deployed Typical Dimensions and Speed K-K rules - symbols per rule million searches per second for -bit keys Suitable even for Gb/s traffic IPv and IPv lookups are trivial with TCAM Extra symbolsare left in each entry, that can be used to optimize TCAM performance
Last Lecture: Network Layer
Last Lecture: Network Layer 1. Design goals and issues 2. Basic Routing Algorithms & Protocols 3. Addressing, Fragmentation and reassembly 4. Internet Routing Protocols and Inter-networking 5. Router design
More informationMessage Switch. Processor(s) 0* 1 100* 6 1* 2 Forwarding Table
Recent Results in Best Matching Prex George Varghese October 16, 2001 Router Model InputLink i 100100 B2 Message Switch B3 OutputLink 6 100100 Processor(s) B1 Prefix Output Link 0* 1 100* 6 1* 2 Forwarding
More informationData Structures for Packet Classification
Presenter: Patrick Nicholson Department of Computer Science CS840 Topics in Data Structures Outline 1 The Problem 2 Hardware Solutions 3 Data Structures: 1D 4 Trie-Based Solutions Packet Classification
More informationCS419: Computer Networks. Lecture 6: March 7, 2005 Fast Address Lookup:
: Computer Networks Lecture 6: March 7, 2005 Fast Address Lookup: Forwarding/Routing Revisited Best-match Longest-prefix forwarding table lookup We looked at the semantics of bestmatch longest-prefix address
More informationIP Forwarding. CSU CS557, Spring 2018 Instructor: Lorenzo De Carli
IP Forwarding CSU CS557, Spring 2018 Instructor: Lorenzo De Carli 1 Sources George Varghese, Network Algorithmics, Morgan Kauffmann, December 2004 L. De Carli, Y. Pan, A. Kumar, C. Estan, K. Sankaralingam,
More informationForwarding and Routers : Computer Networking. Original IP Route Lookup. Outline
Forwarding and Routers 15-744: Computer Networking L-9 Router Algorithms IP lookup Longest prefix matching Classification Flow monitoring Readings [EVF3] Bitmap Algorithms for Active Flows on High Speed
More informationMaster Course Computer Networks IN2097
Chair for Network Architectures and Services Prof. Carle Department for Computer Science TU München Chair for Network Architectures and Services Prof. Carle Department for Computer Science TU München Master
More informationMaster Course Computer Networks IN2097
Chair for Network Architectures and Services Prof. Carle Department for Computer Science TU München Master Course Computer Networks IN2097 Prof. Dr.-Ing. Georg Carle Christian Grothoff, Ph.D. Chair for
More informationScalable Name-Based Packet Forwarding: From Millions to Billions. Tian Song, Beijing Institute of Technology
Scalable Name-Based Packet Forwarding: From Millions to Billions Tian Song, songtian@bit.edu.cn, Beijing Institute of Technology Haowei Yuan, Patrick Crowley, Washington University Beichuan Zhang, The
More informationRouter Design: Table Lookups and Packet Scheduling EECS 122: Lecture 13
Router Design: Table Lookups and Packet Scheduling EECS 122: Lecture 13 Department of Electrical Engineering and Computer Sciences University of California Berkeley Review: Switch Architectures Input Queued
More informationDynamic Pipelining: Making IP- Lookup Truly Scalable
Dynamic Pipelining: Making IP- Lookup Truly Scalable Jahangir Hasan T. N. Vijaykumar School of Electrical and Computer Engineering, Purdue University SIGCOMM 05 Rung-Bo-Su 10/26/05 1 0.Abstract IP-lookup
More informationComputer Networks CS 552
Computer Networks CS 552 Routers Badri Nath Rutgers University badri@cs.rutgers.edu. High Speed Routers 2. Route lookups Cisco 26: 8 Gbps Cisco 246: 32 Gbps Cisco 286: 28 Gbps Power: 4.2 KW Cost: $5K Juniper
More informationHash-Based String Matching Algorithm For Network Intrusion Prevention systems (NIPS)
Hash-Based String Matching Algorithm For Network Intrusion Prevention systems (NIPS) VINOD. O & B. M. SAGAR ISE Department, R.V.College of Engineering, Bangalore-560059, INDIA Email Id :vinod.goutham@gmail.com,sagar.bm@gmail.com
More informationECE697AA Lecture 21. Packet Classification
ECE697AA Lecture 21 Routers: Flow Classification Algorithms Tilman Wolf Department of Electrical and Computer Engineering 11/20/08 Packet Classification What is packet classification? Categorization of
More informationLecture 11: Packet forwarding
Lecture 11: Packet forwarding Anirudh Sivaraman 2017/10/23 This week we ll talk about the data plane. Recall that the routing layer broadly consists of two parts: (1) the control plane that computes routes
More informationGrowth of the Internet Network capacity: A scarce resource Good Service
IP Route Lookups 1 Introduction Growth of the Internet Network capacity: A scarce resource Good Service Large-bandwidth links -> Readily handled (Fiber optic links) High router data throughput -> Readily
More informationEECS 122: Introduction to Computer Networks Switch and Router Architectures. Today s Lecture
EECS : Introduction to Computer Networks Switch and Router Architectures Computer Science Division Department of Electrical Engineering and Computer Sciences University of California, Berkeley Berkeley,
More informationA Hybrid Approach to CAM-Based Longest Prefix Matching for IP Route Lookup
A Hybrid Approach to CAM-Based Longest Prefix Matching for IP Route Lookup Yan Sun and Min Sik Kim School of Electrical Engineering and Computer Science Washington State University Pullman, Washington
More informationCS 268: Route Lookup and Packet Classification
Overview CS 268: Route Lookup and Packet Classification Packet Lookup Packet Classification Ion Stoica March 3, 24 istoica@cs.berkeley.edu 2 Lookup Problem Identify the output interface to forward an incoming
More informationGeneric Architecture. EECS 122: Introduction to Computer Networks Switch and Router Architectures. Shared Memory (1 st Generation) Today s Lecture
Generic Architecture EECS : Introduction to Computer Networks Switch and Router Architectures Computer Science Division Department of Electrical Engineering and Computer Sciences University of California,
More informationRouters: Forwarding EECS 122: Lecture 13
Routers: Forwarding EECS 122: Lecture 13 epartment of Electrical Engineering and Computer Sciences University of California Berkeley Router Architecture Overview Two key router functions: run routing algorithms/protocol
More informationRouters: Forwarding EECS 122: Lecture 13
Input Port Functions Routers: Forwarding EECS 22: Lecture 3 epartment of Electrical Engineering and Computer Sciences University of California Berkeley Physical layer: bit-level reception ata link layer:
More informationHomework 1 Solutions:
Homework 1 Solutions: If we expand the square in the statistic, we get three terms that have to be summed for each i: (ExpectedFrequency[i]), (2ObservedFrequency[i]) and (ObservedFrequency[i])2 / Expected
More informationLecture 5: Router Architecture. CS 598: Advanced Internetworking Matthew Caesar February 8, 2011
Lecture 5: Router Architecture CS 598: Advanced Internetworking Matthew Caesar February 8, 2011 1 IP Router... A router consists A set of input interfaces at which packets arrive A se of output interfaces
More informationMulti-gigabit Switching and Routing
Multi-gigabit Switching and Routing Gignet 97 Europe: June 12, 1997. Nick McKeown Assistant Professor of Electrical Engineering and Computer Science nickm@ee.stanford.edu http://ee.stanford.edu/~nickm
More informationITTC High-Performance Networking The University of Kansas EECS 881 Packet Switch I/O Processing
High-Performance Networking The University of Kansas EECS 881 Packet Switch I/O Processing James P.G. Sterbenz Department of Electrical Engineering & Computer Science Information Technology & Telecommunications
More informationECE697AA Lecture 20. Forwarding Tables
ECE697AA Lecture 20 Routers: Prefix Lookup Algorithms Tilman Wolf Department of Electrical and Computer Engineering 11/14/08 Forwarding Tables Routing protocols involve a lot of information Path choices,
More informationOverview. Implementing Gigabit Routers with NetFPGA. Basic Architectural Components of an IP Router. Per-packet processing in an IP Router
Overview Implementing Gigabit Routers with NetFPGA Prof. Sasu Tarkoma The NetFPGA is a low-cost platform for teaching networking hardware and router design, and a tool for networking researchers. The NetFPGA
More informationIntroduction. Introduction. Router Architectures. Introduction. Recent advances in routing architecture including
Router Architectures By the end of this lecture, you should be able to. Explain the different generations of router architectures Describe the route lookup process Explain the operation of PATRICIA algorithm
More informationScalable Enterprise Networks with Inexpensive Switches
Scalable Enterprise Networks with Inexpensive Switches Minlan Yu minlanyu@cs.princeton.edu Princeton University Joint work with Alex Fabrikant, Mike Freedman, Jennifer Rexford and Jia Wang 1 Enterprises
More informationIntroduction. Router Architectures. Introduction. Introduction. Recent advances in routing architecture including
Introduction Router Architectures Recent advances in routing architecture including specialized hardware switching fabrics efficient and faster lookup algorithms have created routers that are capable of
More informationLONGEST prefix matching (LPM) techniques have received
IEEE/ACM TRANSACTIONS ON NETWORKING, VOL. 14, NO. 2, APRIL 2006 397 Longest Prefix Matching Using Bloom Filters Sarang Dharmapurikar, Praveen Krishnamurthy, and David E. Taylor, Member, IEEE Abstract We
More informationNetwork Processors and their memory
Network Processors and their memory Network Processor Workshop, Madrid 2004 Nick McKeown Departments of Electrical Engineering and Computer Science, Stanford University nickm@stanford.edu http://www.stanford.edu/~nickm
More information15-744: Computer Networking. Routers
15-744: Computer Networking outers Forwarding and outers Forwarding IP lookup High-speed router architecture eadings [McK97] A Fast Switched Backplane for a Gigabit Switched outer Optional [D+97] Small
More informationPUSHING THE LIMITS, A PERSPECTIVE ON ROUTER ARCHITECTURE CHALLENGES
PUSHING THE LIMITS, A PERSPECTIVE ON ROUTER ARCHITECTURE CHALLENGES Greg Hankins APRICOT 2012 2012 Brocade Communications Systems, Inc. 2012/02/28 Lookup Capacity and Forwarding
More informationHardware Acceleration in Computer Networks. Jan Kořenek Conference IT4Innovations, Ostrava
Hardware Acceleration in Computer Networks Outline Motivation for hardware acceleration Longest prefix matching using FPGA Hardware acceleration of time critical operations Framework and applications Contracted
More informationNetwork Processors. Nevin Heintze Agere Systems
Network Processors Nevin Heintze Agere Systems Network Processors What are the packaging challenges for NPs? Caveat: I know very little about packaging. Network Processors What are the packaging challenges
More informationRecursive Flow Classification: An Algorithm for Packet Classification on Multiple Fields
5 CHAPTER 4 Recursive Flow Classification: An Algorithm for Packet Classification on Multiple Fields Introduction Chapters 2 and 3 described algorithms for routing lookups. In this chapter and the next
More informationDecision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA
Decision Forest: A Scalable Architecture for Flexible Flow Matching on FPGA Weirong Jiang, Viktor K. Prasanna University of Southern California Norio Yamagaki NEC Corporation September 1, 2010 Outline
More informationChapter 12 Digital Search Structures
Chapter Digital Search Structures Digital Search Trees Binary Tries and Patricia Multiway Tries C-C Tsai P. Digital Search Tree A digital search tree is a binary tree in which each node contains one element.
More informationMidterm Review. Congestion Mgt, CIDR addresses,tcp processing, TCP close. Routing. hierarchical networks. Routing with OSPF, IS-IS, BGP-4
Midterm Review Week 1 Congestion Mgt, CIDR addresses,tcp processing, TCP close Week 2 Routing. hierarchical networks Week 3 Routing with OSPF, IS-IS, BGP-4 Week 4 IBGP, Prefix lookup, Tries, Non-stop routers,
More informationHIGH-PERFORMANCE PACKET PROCESSING ENGINES USING SET-ASSOCIATIVE MEMORY ARCHITECTURES
HIGH-PERFORMANCE PACKET PROCESSING ENGINES USING SET-ASSOCIATIVE MEMORY ARCHITECTURES by Michel Hanna B.S., Cairo University at Fayoum, 1999 M.S., Cairo University, 2004 M.S., University of Pittsburgh,
More informationProfessor Yashar Ganjali Department of Computer Science University of Toronto.
Professor Yashar Ganjali Department of Computer Science University of Toronto yganjali@cs.toronto.edu http://www.cs.toronto.edu/~yganjali Today Outline What this course is about Logistics Course structure,
More informationProblem Statement. Algorithm MinDPQ (contd.) Algorithm MinDPQ. Summary of Algorithm MinDPQ. Algorithm MinDPQ: Experimental Results.
Algorithms for Routing Lookups and Packet Classification October 3, 2000 High Level Outline Part I. Routing Lookups - Two lookup algorithms Part II. Packet Classification - One classification algorithm
More informationScalable Lookup Algorithms for IPv6
Scalable Lookup Algorithms for IPv6 Aleksandra Smiljanić a*, Zoran Čiča a a School of Electrical Engineering, Belgrade University, Bul. Kralja Aleksandra 73, 11120 Belgrade, Serbia ABSTRACT IPv4 addresses
More informationDeep Packet Inspection of Next Generation Network Devices
Deep Packet Inspection of Next Generation Network Devices Prof. Anat Bremler-Barr IDC Herzliya, Israel www.deepness-lab.org This work was supported by European Research Council (ERC) Starting Grant no.
More informationHigh-Speed Network Processors. EZchip Presentation - 1
High-Speed Network Processors EZchip Presentation - 1 NP-1c Interfaces Switch Fabric 10GE / N x1ge or Switch Fabric or Lookup Tables Counters SDRAM/FCRAM 64 x166/175mhz SRAM DDR NBT CSIX c XGMII HiGig
More informationImplementation of Boundary Cutting Algorithm Using Packet Classification
Implementation of Boundary Cutting Algorithm Using Packet Classification Dasari Mallesh M.Tech Student Department of CSE Vignana Bharathi Institute of Technology, Hyderabad. ABSTRACT: Decision-tree-based
More informationIP Address Lookup and Packet Classification Algorithms
IP Address Lookup and Packet Classification Algorithms Zhen Xu, Jeff Nie, Xuehong Sun, and Yiqiang Q. Zhao School of Mathematics and Statistics, Carleton University Outline 1. Background 2. Two IP Address
More informationSSA: A Power and Memory Efficient Scheme to Multi-Match Packet Classification. Fang Yu, T.V. Lakshman, Martin Austin Motoyama, Randy H.
SSA: A Power and Memory Efficient Scheme to Multi-Match Packet Classification Fang Yu, T.V. Lakshman, Martin Austin Motoyama, Randy H. Katz Presented by: Discussion led by: Sailesh Kumar Packet Classification
More informationNovel Hardware Architecture for Fast Address Lookups
Novel Hardware Architecture for Fast Address Lookups Pronita Mehrotra Paul D. Franzon Department of Electrical and Computer Engineering North Carolina State University {pmehrot,paulf}@eos.ncsu.edu This
More informationCounter Braids: A novel counter architecture
Counter Braids: A novel counter architecture Balaji Prabhakar Balaji Prabhakar Stanford University Joint work with: Yi Lu, Andrea Montanari, Sarang Dharmapurikar and Abdul Kabbani Overview Counter Braids
More informationFrugal IP Lookup Based on a Parallel Search
Frugal IP Lookup Based on a Parallel Search Zoran Čiča and Aleksandra Smiljanić School of Electrical Engineering, Belgrade University, Serbia Email: cicasyl@etf.rs, aleksandra@etf.rs Abstract Lookup function
More informationIP packet forwarding, or simply, IP-lookup, is a classic
Scalable Tree-based Architectures for IPv4/v6 Lookup Using Prefix Partitioning Hoang Le, Student Member, IEEE, and Viktor K. Prasanna, Fellow, IEEE Abstract Memory efficiency and dynamically updateable
More informationCS 552 Computer Networks
CS 55 Computer Networks IP forwarding Fall 00 Rich Martin (Slides from D. Culler and N. McKeown) Position Paper Goals: Practice writing to convince others Research an interesting topic related to networking.
More informationReliably Scalable Name Prefix Lookup! Haowei Yuan and Patrick Crowley! Washington University in St. Louis!! ANCS 2015! 5/8/2015!
Reliably Scalable Name Prefix Lookup! Haowei Yuan and Patrick Crowley! Washington University in St. Louis!! ANCS 2015! 5/8/2015! ! My Topic for Today! Goal: a reliable longest name prefix lookup performance
More informationHigh-Performance Network Data-Packet Classification Using Embedded Content-Addressable Memory
High-Performance Network Data-Packet Classification Using Embedded Content-Addressable Memory Embedding a TCAM block along with the rest of the system in a single device should overcome the disadvantages
More informationTwo Level State Machine Architecture for Content Inspection Engines
Two Level State Machine Architecture for Content Inspection Engines Mohammadreza Yazdani Wojciech Fraczak Feliks Welfeld Ioannis Lambadaris Department of Systems and Computer Engineering Carleton University,
More informationEfficient IP-Address Lookup with a Shared Forwarding Table for Multiple Virtual Routers
Efficient IP-Address Lookup with a Shared Forwarding Table for Multiple Virtual Routers ABSTRACT Jing Fu KTH, Royal Institute of Technology Stockholm, Sweden jing@kth.se Virtual routers are a promising
More information100 GBE AND BEYOND. Diagram courtesy of the CFP MSA Brocade Communications Systems, Inc. v /11/21
100 GBE AND BEYOND 2011 Brocade Communications Systems, Inc. Diagram courtesy of the CFP MSA. v1.4 2011/11/21 Current State of the Industry 10 Electrical Fundamental 1 st generation technology constraints
More informationSoftware Defined Networking
Software Defined Networking Jennifer Rexford COS 461: Computer Networks Lectures: MW 10-10:50am in Architecture N101 http://www.cs.princeton.edu/courses/archive/spr12/cos461/ The Internet: A Remarkable
More informationThe iflow Address Processor Forwarding Table Lookups using Fast, Wide Embedded DRAM
Enabling the Future of the Internet The iflow Address Processor Forwarding Table Lookups using Fast, Wide Embedded DRAM Mike O Connor - Director, Advanced Architecture www.siliconaccess.com Hot Chips 12
More informationIP ROUTING LOOKUP: HARDWARE AND SOFTWARE APPROACH. A Thesis RAVIKUMAR V. CHAKARAVARTHY
IP ROUTING LOOKUP: HARDWARE AND SOFTWARE APPROACH A Thesis by RAVIKUMAR V. CHAKARAVARTHY Submitted to the Office of Graduate Studies of Texas A&M University in partial fulfillment of the requirements for
More informationCisco Nexus 9508 Switch Power and Performance
White Paper Cisco Nexus 9508 Switch Power and Performance The Cisco Nexus 9508 brings together data center switching power efficiency and forwarding performance in a high-density 40 Gigabit Ethernet form
More information1 Connectionless Routing
UCSD DEPARTMENT OF COMPUTER SCIENCE CS123a Computer Networking, IP Addressing and Neighbor Routing In these we quickly give an overview of IP addressing and Neighbor Routing. Routing consists of: IP addressing
More informationAn Efficient Parallel IP Lookup Technique for IPv6 Routers Using Multiple Hashing with Ternary marker storage
An Efficient Parallel IP Lookup Technique for IPv Routers Using Multiple Hashing with Ternary marker storage P. Kiran Sree Dr. Inampudi Ramesh Babu Mr. P.Kiran Sree,Associate Professor, Department of Computer
More informationInternet Routers Past, Present and Future
Internet Routers Past, Present and Future Nick McKeown Stanford University British Computer Society June 2006 Outline What is an Internet router? What limits performance: Memory access time The early days:
More informationA B C D E Total / 24 / 23 / 12 / 18 / 3 / 80
Carnegie Mellon Computer Science Department. 15-441 Spring 2010 Midterm Name: Andrew ID: INSTRUCTIONS: There are 10 pages (numbered at the bottom). Make sure you have all of them. Please write your name
More informationReview on Tries for IPv6 Lookups
Available online www.ejaet.com European Journal of Advances in Engineering and Technology, 2016, 3(7): 28-33 Review Article ISSN: 2394-658X Review on Tries for IPv6 Lookups Rohit G Bal Department of Computer
More informationDevoFlow: Scaling Flow Management for High Performance Networks
DevoFlow: Scaling Flow Management for High Performance Networks SDN Seminar David Sidler 08.04.2016 1 Smart, handles everything Controller Control plane Data plane Dump, forward based on rules Existing
More informationIP Address Lookup in Hardware for High-Speed Routing
IP Address Lookup in Hardware for High-Speed Routing Andreas Moestedt and Peter Sjödin am@sics.se, peter@sics.se Swedish Institute of Computer Science P.O. Box 1263, SE-164 29 KISTA, Sweden Abstract This
More informationScalable Packet Classification for IPv6 by Using Limited TCAMs
Scalable Packet Classification for IPv6 by Using Limited TCAMs Chia-Tai Chan 1, Pi-Chung Wang 1,Shuo-ChengHu 2, Chung-Liang Lee 1,and Rong-Chang Chen 3 1 Telecommunication Laboratories, Chunghwa Telecom
More informationTowards High-performance Flow-level level Packet Processing on Multi-core Network Processors
Towards High-performance Flow-level level Packet Processing on Multi-core Network Processors Yaxuan Qi (presenter), Bo Xu, Fei He, Baohua Yang, Jianming Yu and Jun Li ANCS 2007, Orlando, USA Outline Introduction
More informationL3 Addressing and data plane. Benjamin Baron
L3 Addressing and data plane Benjamin Baron benjamin.baron@lip6.fr L3 addressing IP Addressing Scalability Through Hierarchy Hierarchy through IP prefixes Routing between networks Allocation of address
More informationINF5050 Protocols and Routing in Internet (Friday ) Subject: IP-router architecture. Presented by Tor Skeie
INF5050 Protocols and Routing in Internet (Friday 9.2.2018) Subject: IP-router architecture Presented by Tor Skeie High Performance Switching and Routing Telecom Center Workshop: Sept 4, 1997. This presentation
More informationProject Proposal. ECE 526 Spring Modified Data Structure of Aho-Corasick. Benfano Soewito, Ed Flanigan and John Pangrazio
Project Proposal ECE 526 Spring 2006 Modified Data Structure of Aho-Corasick Benfano Soewito, Ed Flanigan and John Pangrazio 1. Introduction The internet becomes the most important tool in this decade
More informationCS244a: An Introduction to Computer Networks
CS244a: An Introduction to Computer Networks Handout 4: Layer 3 and the Internet Protocol (IP) Nick McKeown Professor of Electrical Engineering and Computer Science, Stanford University nickm@stanford.edu
More informationConfiguring TAP Aggregation and MPLS Stripping
This chapter describes how to configure TAP aggregation and MPLS stripping on Cisco NX-OS devices. This chapter contains the following sections: About TAP Aggregation, page 1 About MPLS Stripping, page
More informationSizing Router Buffers
Sizing Router Buffers Sachin Katti, CS244 Slides courtesy: Nick McKeown Routers need Packet Buffers It s well known that routers need packet buffers It s less clear why and how much Goal of this work is
More informationTree-Based Minimization of TCAM Entries for Packet Classification
Tree-Based Minimization of TCAM Entries for Packet Classification YanSunandMinSikKim School of Electrical Engineering and Computer Science Washington State University Pullman, Washington 99164-2752, U.S.A.
More informationTriBiCa: Trie Bitmap Content Analyzer for High-Speed Network Intrusion Detection
Dept. of Electrical and Computer Eng. : Trie Bitmap Content Analyzer for High-Speed Network Intrusion Detection N. Sertac Artan and Jonathan H. Chao 8 May 27 26th Annual IEEE Conference on Computer Communications
More informationHow to Choose the Best Router Switching Path for Your Network
How to Choose the Best Router Switching Path for Your Network Document ID: 13706 Contents Introduction Process Switching Interrupt Context Switching Fast Switching Optimum Switching Cisco Express Forwarding
More informationRouting architecture and forwarding
DD2490 p4 2011 Routing architecture and forwarding & Intro to Homework 4 Olof Hagsand KTH /CSC 1 Connecting devices Connecting devices Networking devices Internetworking devices Hub/ Hub/ Repeater Bridge/
More informationChapter 6 Memory 11/3/2015. Chapter 6 Objectives. 6.2 Types of Memory. 6.1 Introduction
Chapter 6 Objectives Chapter 6 Memory Master the concepts of hierarchical memory organization. Understand how each level of memory contributes to system performance, and how the performance is measured.
More informationConfiguring ACLs. ACL overview. ACL categories. ACL numbering and naming
Contents Configuring ACLs 1 ACL overview 1 ACL categories 1 ACL numbering and naming 1 Match order 2 ACL rule numbering 3 Implementing time-based ACL rules 3 IPv4 fragments filtering with ACLs 3 Flow templates
More informationFPX Architecture for a Dynamically Extensible Router
FPX Architecture for a Dynamically Extensible Router Alex Chandra, Yuhua Chen, John Lockwood, Sarang Dharmapurikar, Wenjing Tang, David Taylor, Jon Turner http://www.arl.wustl.edu/arl Dynamically Extensible
More informationFlow Caching for High Entropy Packet Fields
Flow Caching for High Entropy Packet Fields Nick Shelly Nick McKeown! Ethan Jackson Teemu Koponen Jarno Rajahalme Outline Current flow classification in OVS Problems with high entropy packets Proposed
More informationFPGA Implementation of Lookup Algorithms
2011 IEEE 12th International Conference on High Performance Switching and Routing FPGA Implementation of Lookup Algorithms Zoran Chicha, Luka Milinkovic, Aleksandra Smiljanic Department of Telecommunications
More informationCounter Braids: A novel counter architecture
Counter Braids: A novel counter architecture Balaji Prabhakar Balaji Prabhakar Stanford University Joint work with: Yi Lu, Andrea Montanari, Sarang Dharmapurikar and Abdul Kabbani Overview Counter Braids
More informationCSC Network Security
CSC 474 -- Security Topic 9. Firewalls CSC 474 Dr. Peng Ning 1 Outline Overview of Firewalls Filtering Firewalls Proxy Servers CSC 474 Dr. Peng Ning 2 Overview of Firewalls CSC 474 Dr. Peng Ning 3 1 Internet
More informationConfiguring TAP Aggregation and MPLS Stripping
This chapter describes how to configure TAP aggregation and MPLS stripping on Cisco NX-OS devices. This chapter contains the following sections: About TAP Aggregation, page 1 About MPLS Stripping, page
More informationCS 5114 Network Programming Languages Data Plane. Nate Foster Cornell University Spring 2013
CS 5114 Network Programming Languages Data Plane http://www.flickr.com/photos/rofi/2097239111/ Nate Foster Cornell University Spring 2013 Based on lecture notes by Jennifer Rexford and Michael Freedman
More informationThree Different Designs for Packet Classification
Three Different Designs for Packet Classification HATAM ABDOLI Computer Department Bu-Ali Sina University Shahid Fahmideh street, Hamadan IRAN abdoli@basu.ac.ir http://www.profs.basu.ac.ir/abdoli Abstract:
More informationRouter Architectures
Router Architectures Venkat Padmanabhan Microsoft Research 13 April 2001 Venkat Padmanabhan 1 Outline Router architecture overview 50 Gbps multi-gigabit router (Partridge et al.) Technology trends Venkat
More informationCHAPTER 6 Memory. CMPS375 Class Notes (Chap06) Page 1 / 20 Dr. Kuo-pao Yang
CHAPTER 6 Memory 6.1 Memory 341 6.2 Types of Memory 341 6.3 The Memory Hierarchy 343 6.3.1 Locality of Reference 346 6.4 Cache Memory 347 6.4.1 Cache Mapping Schemes 349 6.4.2 Replacement Policies 365
More informationDesign principles in parser design
Design principles in parser design Glen Gibb Dept. of Electrical Engineering Advisor: Prof. Nick McKeown Header parsing? 2 Header parsing? Identify headers & extract fields A???? B???? C?? Field Field
More informationOn using content addressable memory for packet classification
On using content addressable memory for packet classification David E. Taylor, Edward W. Spitznagel WUCSE-2005-9 3 March 2005 Applied Research Laboratory Department of Computer Science and Engineering
More informationReducing Hit Times. Critical Influence on cycle-time or CPI. small is always faster and can be put on chip
Reducing Hit Times Critical Influence on cycle-time or CPI Keep L1 small and simple small is always faster and can be put on chip interesting compromise is to keep the tags on chip and the block data off
More informationMultiway Range Trees: Scalable IP Lookup with Fast Updates
Washington University in St. Louis Washington University Open Scholarship All Computer Science and Engineering Research Computer Science and Engineering Report Number: WUCS-99-28 1999-01-01 Multiway Range
More informationSelective Boundary Cutting For Packet Classification SOUMYA. K 1, CHANDRA SEKHAR. M 2
ISSN 2319-8885 Vol.04,Issue.34, August-2015, Pages:6786-6790 www.ijsetr.com SOUMYA. K 1, CHANDRA SEKHAR. M 2 1 Navodaya Institute of Technology, Raichur, Karnataka, India, E-mail: Keerthisree1112@gmail.com.
More information