Compiler Construction I

Size: px
Start display at page:

Download "Compiler Construction I"

Transcription

1 TECHNISCHE UNIVERSITÄT MÜNCHEN FAKULTÄT FÜR INFORMATIK Compiler Construction I Dr. Michael Petter, Dr. Axel Simon SoSe / 104

2 Topic: Semantic Analysis 2 / 104

3 Topic: Code Synthesis 3 / 104

4 Generating Code: Overview We inductively generate instructions from the AST: there is a rule stating how to generate code for each non-terminal of the grammar the code is merely another attribute in the syntax tree code generation makes use of the already computed attributes 4 / 104

5 Generating Code: Overview We inductively generate instructions from the AST: there is a rule stating how to generate code for each non-terminal of the grammar the code is merely another attribute in the syntax tree code generation makes use of the already computed attributes In order to specify the code generation, we require a semantics of the language we are compiling (here: C standard) the semantic of the machine instructions 4 / 104

6 Generating Code: Overview We inductively generate instructions from the AST: there is a rule stating how to generate code for each non-terminal of the grammar the code is merely another attribute in the syntax tree code generation makes use of the already computed attributes In order to specify the code generation, we require a semantics of the language we are compiling (here: C standard) the semantic of the machine instructions we commence by specifying machine instruction semantics 4 / 104

7 Code Synthesis Chapter 1: The Register C-Machine 5 / 104

8 The Register C-Machine (RCMa) We generate Code for the Register C-Machine. The Register C-Machine is a virtual machine (VM). there exists no processor that can execute its instructions... but we can build an interpreter for it we provide a visualization environment for the R-CMa the R-CMa has no double, float, char, short or long types the R-CMa has no instructions to communicate with the operating system the R-CMa has an unlimited supply of registers 6 / 104

9 The Register C-Machine (RCMa) We generate Code for the Register C-Machine. The Register C-Machine is a virtual machine (VM). there exists no processor that can execute its instructions... but we can build an interpreter for it we provide a visualization environment for the R-CMa the R-CMa has no double, float, char, short or long types the R-CMa has no instructions to communicate with the operating system the R-CMa has an unlimited supply of registers The R-CMa is more realistic than it may seem: the mentioned restrictions can easily be lifted the Java virtual machine (JVM) is similar to the R-CMa but has no registers an interpreter of R-CMA can run on any platform 6 / 104

10 Virtual Machines A virtual machines has the following ingredients: any virtual machine provides a set of instructions instructions are executed on virtual hardware the virtual hardware is a collection of data structures that is accessed and modified by the VM instructions... and also by other components of the run-time system, namely functions that go beyond the instruction semantics the interpreter is part of the run-time system 7 / 104

11 Components of a Virtual Machine Consider Java as an example: C 0 1 PC S 0 SP A virtual machine such as the JVM has the following structure: S: the data store a memory region in which cells can be stored in LIFO order stack. SP: ( = stack pointer) pointer to the last used cell in S beyond S, the memory containing the heap follows 8 / 104

12 Components of a Virtual Machine Consider Java as an example: C 0 1 PC S 0 SP A virtual machine such as the JVM has the following structure: S: the data store a memory region in which cells can be stored in LIFO order stack. SP: ( = stack pointer) pointer to the last used cell in S beyond S, the memory containing the heap follows C is the memory storing code each cell of C holds exactly one virtual instruction C can only be read PC ( = program counter) address of the instruction that is to be executed next PC contains 0 initially 8 / 104

13 Executing a Program the machine loads an instruction form C[PC] into an instruction register IR in order to execute it before evaluating the instruction, the PC is incremented by one while (true) { IR = C[PC]; PC++; execute (IR); } node: the PC must be incremented before the execution, since an instruction may modify the PC the loop is exited by evaluating a halt instruction that returns directly to the operating system 9 / 104

14 Code Synthesis Chapter 2: Evaluation of Expressions 10 / 104

15 Simple Expressions and Assignments Task: evaluate the expression (1 + 7) 3 that is, generate an instruction sequence that computes the value of the expression and stores it on top of the stack 11 / 104

16 Simple Expressions and Assignments Task: evaluate the expression (1 + 7) 3 that is, generate an instruction sequence that Idea: computes the value of the expression and stores it on top of the stack first compute the value of the sub-expressions store the intermediate result on top of the stack apply the operator 11 / 104

17 General Principle Evaluating an operation op(a 1,... a n ) the arguments a 1,... a n must be on top of the stack the execution of the operation op consumes its arguments any resulting values are stored on top of the stack iconst q q SP++; S[SP] = q; the instruction iconst q puts the int-constant q onto the stack 12 / 104

18 Binary Operators Operators with two arguments run as follows: 3 8 imul 24 SP--; S[SP] = S[SP] S[SP+1]; 13 / 104

19 Binary Operators Operators with two arguments run as follows: 3 8 imul 24 SP--; S[SP] = S[SP] S[SP+1]; imul expects two arguments on top of the stack, consumes them and puts the result on top of the stack 13 / 104

20 Binary Operators Operators with two arguments run as follows: 3 8 imul 24 SP--; S[SP] = S[SP] S[SP+1]; imul expects two arguments on top of the stack, consumes them and puts the result on top of the stack other arithmetic and logical operations iadd, isub, idiv, imod, etc. work analogously 13 / 104

21 Composition of Instructions Example: generate code for 1 + 7: iconst 1 iconst 7 iadd Execution of this instruction sequence: 7 iconst 1 1 iconst 7 1 iadd 8 14 / 104

22 Expressions with Variables Variables occupy a memory cell in S: z: y: x: 15 / 104

23 Expressions with Variables Variables occupy a memory cell in S: z: y: x: Associating addresses with variables can be done while creating the symbol table. The address is stored in any case at the node of the declaration of a variable. 15 / 104

24 Expressions with Variables Variables occupy a memory cell in S: z: y: x: Associating addresses with variables can be done while creating the symbol table. The address is stored in any case at the node of the declaration of a variable. For each use of a variable, the address has to be looked up by inspecting its declaration node. 15 / 104

25 Expressions with Variables Variables occupy a memory cell in S: z: y: x: Associating addresses with variables can be done while creating the symbol table. The address is stored in any case at the node of the declaration of a variable. For each use of a variable, the address has to be looked up by inspecting its declaration node. in the sequel, we use a mathematical map ρ, that contains mappings form a variable x to the (relative) address of x; the map ρ is called address environment (or simply environment). 15 / 104

26 Reading from a Variable The instruction iload k loads the value at address k, where k is relative to the top of the stack 13 iload k S[SP+1] = S[SP-k]; SP = SP+1; Example: Compute x + 2 where ρ = {x 1}: 16 / 104

27 Reading from a Variable The instruction iload k loads the value at address k, where k is relative to the top of the stack 13 iload k S[SP+1] = S[SP-k]; SP = SP+1; Example: Compute x + 2 where ρ = {x 1}: iload 1 iconst 2 iadd 16 / 104

28 Code Synthesis Chapter 3: Generating Code for the Register C-Machine 17 / 104

29 Motivation for the Register C-Machine A modern RISC processor features a fixed number of universal registers. 18 / 104

30 Motivation for the Register C-Machine A modern RISC processor features a fixed number of universal registers. arithmetic operations can only use these registers as arguments access to memory are done via instructions to load and store to and from registers unlike the stack, registers have to be explicitly saved before a function is called 18 / 104

31 Motivation for the Register C-Machine A modern RISC processor features a fixed number of universal registers. arithmetic operations can only use these registers as arguments access to memory are done via instructions to load and store to and from registers unlike the stack, registers have to be explicitly saved before a function is called A translation for a RISC processor must therefore: 18 / 104

32 Motivation for the Register C-Machine A modern RISC processor features a fixed number of universal registers. arithmetic operations can only use these registers as arguments access to memory are done via instructions to load and store to and from registers unlike the stack, registers have to be explicitly saved before a function is called A translation for a RISC processor must therefore: 1 store variables and function arguments in registers 2 save the content of registers onto the stack before calling a function 3 express any arbitrary computation using finitely many registers 18 / 104

33 Motivation for the Register C-Machine A modern RISC processor features a fixed number of universal registers. arithmetic operations can only use these registers as arguments access to memory are done via instructions to load and store to and from registers unlike the stack, registers have to be explicitly saved before a function is called A translation for a RISC processor must therefore: 1 store variables and function arguments in registers 2 save the content of registers onto the stack before calling a function 3 express any arbitrary computation using finitely many registers only consider the first two problems (and deal with the other two later) 18 / 104

34 Principle of the Register C-Machine The R-CMa is composed of a stack, heap and a code segment, just like the JVM; it additionally has register sets: local registers are R 1, R 2,... R i,... global register are R 0, R 1,... R j,... C 0 1 PC S 0 SP R loc R 1 R 6 R glob R 0 R 4 19 / 104

35 The Register Sets of the R-CMa The two register sets have the following purpose: 1 the local registers R i save temporary results store the contents of local variables of a function can efficiently be stored and restored from the stack 20 / 104

36 The Register Sets of the R-CMa The two register sets have the following purpose: 1 the local registers R i save temporary results store the contents of local variables of a function can efficiently be stored and restored from the stack 2 the global registers R i save the parameters of a function store the result of a function 20 / 104

37 The Register Sets of the R-CMa The two register sets have the following purpose: 1 the local registers R i save temporary results store the contents of local variables of a function can efficiently be stored and restored from the stack 2 the global registers R i save the parameters of a function store the result of a function Note: for now, we only use registers to store temporary computations 20 / 104

38 The Register Sets of the R-CMa The two register sets have the following purpose: 1 the local registers R i save temporary results store the contents of local variables of a function can efficiently be stored and restored from the stack 2 the global registers R i save the parameters of a function store the result of a function Note: for now, we only use registers to store temporary computations Idea for the translation: use a register counter i: registers R j with j < i are in use registers R j with j i are available 20 / 104

39 Translation of Simple Expressions Using variables stored in registers; loading constants: instruction semantics intuition loadc R i c R i = c load constant move R i R j R i = R j copy R j to R i 21 / 104

40 Translation of Simple Expressions Using variables stored in registers; loading constants: instruction semantics intuition loadc R i c R i = c load constant move R i R j R i = R j copy R j to R i We define the following translation schema (with ρ x = a): code i R c ρ = loadc R i c code i R x ρ = move R i R a code i R x = e ρ = code i R e ρ move R a R i 21 / 104

41 Translation of Simple Expressions Using variables stored in registers; loading constants: instruction semantics intuition loadc R i c R i = c load constant move R i R j R i = R j copy R j to R i We define the following translation schema (with ρ x = a): code i R c ρ = loadc R i c code i R x ρ = move R i R a code i R x = e ρ = code i R e ρ move R a R i Note: all instructions use the Intel convention (in contrast to the AT&T convention): op dst src 1... src n. 21 / 104

42 Translation of Expressions Let op = {add, sub, div, mul, mod, le, gr, eq, leq, geq, and, or}. The R-CMa provides an instruction for each operator op. op R i R j R k where R i is the target register, R j the first and R k the second argument. Correspondingly, we generate code as follows: code i R e 1 op e 2 ρ = code i R e 1 ρ coder i+1 e 2 ρ op R i R i R i+1 22 / 104

43 Translation of Expressions Let op = {add, sub, div, mul, mod, le, gr, eq, leq, geq, and, or}. The R-CMa provides an instruction for each operator op. op R i R j R k where R i is the target register, R j the first and R k the second argument. Correspondingly, we generate code as follows: code i R e 1 op e 2 ρ = code i R e 1 ρ coder i+1 e 2 ρ op R i R i R i+1 Example: Translate 3*4 with i = 4: code 4 R 3 *4 ρ = code 4 R 3 ρ code 5 R 4 ρ mul R 4 R 4 R 5 22 / 104

44 Translation of Expressions Let op = {add, sub, div, mul, mod, le, gr, eq, leq, geq, and, or}. The R-CMa provides an instruction for each operator op. op R i R j R k where R i is the target register, R j the first and R k the second argument. Correspondingly, we generate code as follows: code i R e 1 op e 2 ρ = code i R e 1 ρ coder i+1 e 2 ρ op R i R i R i+1 Example: Translate 3*4 with i = 4: code 4 R 3 *4 ρ = loadc R 4 3 loadc R 5 4 mul R 4 R 4 R 5 22 / 104

45 Managing Temporary Registers Observe that temporary registers are re-used: translate 3*4+3*4 with t = 4: where we obtain code 4 R 3 *4+3*4 ρ = code 4 R 3 *4 ρ code 5 R 3 *4 ρ add R 4 R 4 R 5 code i R 3 *4 ρ = loadc R i 3 loadc R i+1 4 mul R i R i R i+1 code 4 R 3 *4+3*4 ρ = 23 / 104

46 Managing Temporary Registers Observe that temporary registers are re-used: translate 3*4+3*4 with t = 4: where we obtain code 4 R 3 *4+3*4 ρ = code 4 R 3 *4 ρ code 5 R 3 *4 ρ add R 4 R 4 R 5 code i R 3 *4 ρ = loadc R i 3 loadc R i+1 4 mul R i R i R i+1 code 4 R 3 *4+3*4 ρ = loadc R 4 3 loadc R 5 4 mul R 4 R 4 R 5 loadc R 5 3 loadc R 6 4 mul R 5 R 5 R 6 add R 4 R 4 R 5 23 / 104

47 Semantics of Operators The operators have the following semantics: add R i R j R k sub R i R j R k div R i R j R k mul R i R j R k mod R i R j R k R i = R j + R k R i = R j R k R i = R j /R k R i = R j R k R i = sgn(r k )k wobei R j = n R k + k n 0, 0 k < R k le R i R j R k R i = if R j < R k then 1 else 0 gr R i R j R k R i = if R j > R k then 1 else 0 eq R i R j R k R i = if R j = R k then 1 else 0 leq R i R j R k R i = if R j R k then 1 else 0 geq R i R j R k R i = if R j R k then 1 else 0 and R i R j R k R i = R j & R k // bit-wise and or R i R j R k R i = R j R k // bit-wise or 24 / 104

48 Semantics of Operators The operators have the following semantics: add R i R j R k sub R i R j R k div R i R j R k mul R i R j R k mod R i R j R k R i = R j + R k R i = R j R k R i = R j /R k R i = R j R k R i = sgn(r k )k wobei R j = n R k + k n 0, 0 k < R k le R i R j R k R i = if R j < R k then 1 else 0 gr R i R j R k R i = if R j > R k then 1 else 0 eq R i R j R k R i = if R j = R k then 1 else 0 leq R i R j R k R i = if R j R k then 1 else 0 geq R i R j R k R i = if R j R k then 1 else 0 and R i R j R k R i = R j & R k // bit-wise and or R i R j R k R i = R j R k // bit-wise or Note: all registers and memory cells contain operands in Z 24 / 104

49 Translation of Unary Operators Unary operators op = {neg, not} take only two registers: code i R op e ρ = codei R e ρ op R i R i 25 / 104

50 Translation of Unary Operators Unary operators op = {neg, not} take only two registers: code i R op e ρ = codei R e ρ op R i R i Note: We use the same register. 25 / 104

51 Translation of Unary Operators Unary operators op = {neg, not} take only two registers: code i R op e ρ = codei R e ρ op R i R i Note: We use the same register. Example: Translate -4 into R 5 : code 5 R -4 ρ = code5 R 4 ρ neg R 5 R 5 25 / 104

52 Translation of Unary Operators Unary operators op = {neg, not} take only two registers: code i R op e ρ = codei R e ρ op R i R i Note: We use the same register. Example: Translate -4 into R 5 : code 5 R -4 ρ = loadc R 5 4 neg R 5 R 5 25 / 104

53 Translation of Unary Operators Unary operators op = {neg, not} take only two registers: code i R op e ρ = codei R e ρ op R i R i Note: We use the same register. Example: Translate -4 into R 5 : code 5 R -4 ρ = loadc R 5 4 neg R 5 R 5 The operators have the following semantics: not R i R j R i if R j = 0 then 1 else 0 neg R i R j R i R j 25 / 104

54 Applying Translation Schema for Expressions Suppose the following function void f(void) { is given: int x,y,z; x = y+z*3; } Let ρ = {x 1, y 2, z 3} be the address environment. Let R 4 be the first free register, that is, i = 4. code 4 x=y+z*3 ρ = code 4 R y+z *3 ρ move R 1 R 4 26 / 104

55 Applying Translation Schema for Expressions Suppose the following function void f(void) { is given: int x,y,z; x = y+z*3; } Let ρ = {x 1, y 2, z 3} be the address environment. Let R 4 be the first free register, that is, i = 4. code 4 x=y+z*3 ρ = code 4 R y+z *3 ρ move R 1 R 4 code 4 R y+z*3 ρ = move R 4 R 2 code 5 R z *3 ρ add R 4 R 4 R 5 26 / 104

56 Applying Translation Schema for Expressions Suppose the following function void f(void) { is given: int x,y,z; x = y+z*3; } Let ρ = {x 1, y 2, z 3} be the address environment. Let R 4 be the first free register, that is, i = 4. code 4 x=y+z*3 ρ = code 4 R y+z *3 ρ move R 1 R 4 code 4 R y+z*3 ρ = move R 4 R 2 code 5 R z *3 ρ add R 4 R 4 R 5 code 5 R z*3 ρ = move R 5 R 3 code 6 R 3 ρ mul R 5 R 5 R 6 26 / 104

57 Applying Translation Schema for Expressions Suppose the following function void f(void) { is given: int x,y,z; x = y+z*3; } Let ρ = {x 1, y 2, z 3} be the address environment. Let R 4 be the first free register, that is, i = 4. code 4 x=y+z*3 ρ = code 4 R y+z *3 ρ move R 1 R 4 code 4 R y+z*3 ρ = move R 4 R 2 code 5 R z *3 ρ add R 4 R 4 R 5 code 5 R z*3 ρ = move R 5 R 3 code 6 R 3 ρ mul R 5 R 5 R 6 code 6 R 3 ρ = loadc R / 104

58 Applying Translation Schema for Expressions Suppose the following function void f(void) { is given: int x,y,z; x = y+z*3; } Let ρ = {x 1, y 2, z 3} be the address environment. Let R 4 be the first free register, that is, i = 4. code 4 x=y+z*3 ρ = code 4 R y+z *3 ρ move R 1 R 4 code 4 R y+z*3 ρ = move R 4 R 2 code 5 R z *3 ρ add R 4 R 4 R 5 code 5 R z*3 ρ = move R 5 R 3 code 6 R 3 ρ mul R 5 R 5 R 6 code 6 R 3 ρ = loadc R 6 3 the assignment x=y+z*3 is translated as move R 4 R 2 ; move R 5 R 3 ; loadc R 6 3; mul R 5 R 5 R 6 ; add R 4 R 4 R 5 ; move R 1 R 4 26 / 104

59 Code Synthesis Chapter 4: Statements and Control Structures 27 / 104

60 About Statements and Expressions General idea for translation: code i s ρ : generate code for statement s code i R e ρ : generate code for expression e into R i Throughout: i, i + 1,... are free (unused) registers 28 / 104

61 About Statements and Expressions General idea for translation: code i s ρ : generate code for statement s code i R e ρ : generate code for expression e into R i Throughout: i, i + 1,... are free (unused) registers For an expression x = e with ρ x = a we defined: code i R x = e ρ = code i R e ρ However, x = e is also a statement: move R a R i 28 / 104

62 About Statements and Expressions General idea for translation: code i s ρ : generate code for statement s code i R e ρ : generate code for expression e into R i Throughout: i, i + 1,... are free (unused) registers For an expression x = e with ρ x = a we defined: code i R x = e ρ = code i R e ρ However, x = e is also a statement: Define: move R a R i code i e 1 = e 2 ρ = code i R e 1 = e 2 ρ The temporary register R i is ignored here. More general: code i e ρ = code i R e ρ 28 / 104

63 About Statements and Expressions General idea for translation: code i s ρ : generate code for statement s code i R e ρ : generate code for expression e into R i Throughout: i, i + 1,... are free (unused) registers For an expression x = e with ρ x = a we defined: code i R x = e ρ = code i R e ρ However, x = e is also a statement: Define: move R a R i code i e 1 = e 2 ρ = code i R e 1 = e 2 ρ The temporary register R i is ignored here. More general: code i e ρ = code i R e ρ Observation: the assignment to e 1 is a side effect of the evaluating the expression e 1 = e / 104

64 Translation of Statement Sequences The code for a sequence of statements is the concatenation of the instructions for each statement in that sequence: code i (s ss) ρ = code i s ρ code i ss ρ code i ε ρ = // empty sequence of instructions Note here: s is a statement, ss is a sequence of statements 29 / 104

65 Jumps In order to diverge from the linear sequence of execution, we need jumps: jump A A PC PC PC = A; 30 / 104

66 Conditional Jumps A conditional jump branches depending on the value in R i :!0 Ri jumpz Ri A!0 Ri PC PC 0 Ri PC jumpz Ri A if (R i == 0) PC = A; 0 Ri A PC 31 / 104

67 Management of Control Flow In order to translate statements with control flow, we need to emit jump instructions. during the translation of an if (c) construct, it is not yet clear where to jump to in case that c is false 32 / 104

68 Management of Control Flow In order to translate statements with control flow, we need to emit jump instructions. during the translation of an if (c) construct, it is not yet clear where to jump to in case that c is false instruction sequences may be arranged in a different order minimize the number of unconditional jumps minimize in a way so that fewer jumps are executed inside loops replace far jumps through near jumps (if applicable) 32 / 104

69 Management of Control Flow In order to translate statements with control flow, we need to emit jump instructions. during the translation of an if (c) construct, it is not yet clear where to jump to in case that c is false instruction sequences may be arranged in a different order minimize the number of unconditional jumps minimize in a way so that fewer jumps are executed inside loops replace far jumps through near jumps (if applicable) organize instruction sequence into blocks without jumps 32 / 104

70 Management of Control Flow In order to translate statements with control flow, we need to emit jump instructions. during the translation of an if (c) construct, it is not yet clear where to jump to in case that c is false instruction sequences may be arranged in a different order minimize the number of unconditional jumps minimize in a way so that fewer jumps are executed inside loops replace far jumps through near jumps (if applicable) organize instruction sequence into blocks without jumps To this end, we define: Definition A basic block consists of a sequence of statements ss that does not contain a jump a set of outgoing edges to other basic blocks where each edge may be labelled with a condition 32 / 104

71 Basic Blocks and the Register C-Machine The R-CMa features only a single conditional jump, namely jumpz. code ss c Outgoing edges must have the following form: 33 / 104

72 Basic Blocks and the Register C-Machine The R-CMa features only a single conditional jump, namely jumpz. code ss c Outgoing edges must have the following form: 1 a single edge (unconditional jump), translated with jump 33 / 104

73 Basic Blocks and the Register C-Machine The R-CMa features only a single conditional jump, namely jumpz. code ss c Outgoing edges must have the following form: 1 a single edge (unconditional jump), translated with jump 2 two edges, one with c = 0 as condition and one without condition, translated with jumpz and jump, respectively 33 / 104

74 Basic Blocks and the Register C-Machine The R-CMa features only a single conditional jump, namely jumpz. code ss c Outgoing edges must have the following form: 1 a single edge (unconditional jump), translated with jump 2 two edges, one with c = 0 as condition and one without condition, translated with jumpz and jump, respectively 3 a set of edges and one default edge, used for switch statement, translated with jumpi and jump (to be discussed later) 33 / 104

75 Formalizing the Translation Involving Control Flow For simplicity of defining translations of instructions involving control flow, we use symbolic jump targets. This translation can be used in practice, but a second run through the emitted instructions is necessary to resolve the symbolic addresses to actual addresses. 34 / 104

76 Formalizing the Translation Involving Control Flow For simplicity of defining translations of instructions involving control flow, we use symbolic jump targets. This translation can be used in practice, but a second run through the emitted instructions is necessary to resolve the symbolic addresses to actual addresses. Alternatively, we can emit relative jumps without a second pass: relative jumps have targets that are offsets to the current PC sometime relative jumps only possible for small offsets ( near jumps) if all jumps are relative: the code becomes position independent (PIC), that is, it can be moved to a different address the generated code can be loaded without relocating absolute jumps 34 / 104

77 Formalizing the Translation Involving Control Flow For simplicity of defining translations of instructions involving control flow, we use symbolic jump targets. This translation can be used in practice, but a second run through the emitted instructions is necessary to resolve the symbolic addresses to actual addresses. Alternatively, we can emit relative jumps without a second pass: relative jumps have targets that are offsets to the current PC sometime relative jumps only possible for small offsets ( near jumps) if all jumps are relative: the code becomes position independent (PIC), that is, it can be moved to a different address the generated code can be loaded without relocating absolute jumps generating a graph of basic blocks is useful for program optimization where the statements inside basic blocks are simplified 34 / 104

78 Simple Conditional We first consider s if ( c ) ss....and present a translation without basic blocks. Idea: emit the code of c and ss in sequence insert a jump instruction in-between, so that correct control flow is ensured code i s ρ = code i R c ρ jumpz R i A code i ss ρ A :... code R jumpz code for ss for c 35 / 104

79 General Conditional code c code tt code ee Translation of if ( c ) tt else ee. code i if(c) tt else ee ρ = A : B : code i R c ρ jumpz R i A code i tt ρ jump B code i ee ρ code R for c jumpz code for tt jump code for ee 36 / 104

80 Example for if-statement Let ρ = {x 4, y 7} and let s be the statement if (x>y) { /* (i) */ x = x - y; /* (ii) */ } else { y = y - x; /* (iii) */ } Then code i s ρ yields: 37 / 104

81 Example for if-statement Let ρ = {x 4, y 7} and let s be the statement if (x>y) { /* (i) */ x = x - y; /* (ii) */ } else { y = y - x; /* (iii) */ } Then code i s ρ yields: (i) (ii) (iii) move R i R 4 move R i+1 R 7 move R i R 4 move R i+1 R 7 A : move R i R 7 move R i+1 R 4 gr R i R i R i+1 jumpz R i A sub R i R i R i+1 move R 4 R i jump B B : sub R i R i R i+1 move R 7 R i 37 / 104

82 Iterating Statements We only consider the loop s while (e) s. For this statement we define: code i while(e) s ρ = A : code i R e ρ jumpz R i B code i s ρ jump A B : code R for e jumpz code for s jump 38 / 104

83 Example: Translation of Loops Let ρ = {a 7, b 8, c 9} and let s be the statement: while (a>0) { /* (i) */ c = c + 1; /* (ii) */ a = a - b; /* (iii) */ } Then code i s ρ evaluates to: 39 / 104

84 Example: Translation of Loops Let ρ = {a 7, b 8, c 9} and let s be the statement: while (a>0) { /* (i) */ c = c + 1; /* (ii) */ a = a - b; /* (iii) */ } Then code i s ρ evaluates to: (i) (ii) (iii) A : move R i R 7 loadc R i+1 0 gr R i R i R i+1 jumpz R i B move R i R 9 loadc R i+1 1 add R i R i R i+1 move R 9 R i B : move R i R 7 move R i+1 R 8 sub R i R i R i+1 move R 7 R i jump A 39 / 104

85 for-loops The for-loop s for (e 1 ; e 2 ; e 3 ) s is equivalent to the statement sequence e 1 ; while (e 2 ) {s e 3 ; } as long as s does not contain a continue statement. Thus, we translate: code i for(e 1 ; e 2 ; e 3 ) s ρ = code i R e 1 ρ A : B : code i R e 2 ρ jumpz R i B code i s ρ code i R e 3 ρ jump A 40 / 104

86 The switch-statement Idea: Suppose choosing from multiple options in constant time if possible use a jump table that, at the ith position, holds a jump to the ith alternative in order to realize this idea, we need an indirect jump instruction 41 / 104

87 The switch-statement Idea: Suppose choosing from multiple options in constant time if possible use a jump table that, at the ith position, holds a jump to the ith alternative in order to realize this idea, we need an indirect jump instruction q Ri B PC jumpi Ri A PC = A + R i ; q Ri A+q PC 41 / 104

88 Consecutive Alternatives Let switch s be given with k consecutive case alternatives: switch (e) { case c 0 : s 0 ; break;. case c k 1 : s k 1 ; break; default: s; break; } that is, c i + 1 = c i+1 for i = [0, k 1]. 42 / 104

89 Consecutive Alternatives Let switch s be given with k consecutive case alternatives: switch (e) { case c 0 : s 0 ; break;. case c k 1 : s k 1 ; break; default: s; break; } that is, c i + 1 = c i+1 for i = [0, k 1]. Define code i s ρ as follows: code i s ρ = code i R e ρ A 0 :. A k 1 : check i c 0 c k 1 B code i s 0 ρ jump D. code i s k 1 ρ jump D B : jump A 0.. jump A k 1 C : 42 / 104

90 Consecutive Alternatives Let switch s be given with k consecutive case alternatives: switch (e) { case c 0 : s 0 ; break;. case c k 1 : s k 1 ; break; default: s; break; } that is, c i + 1 = c i+1 for i = [0, k 1]. Define code i s ρ as follows: code i s ρ = code i R e ρ A 0 :. A k 1 : check i c 0 c k 1 B code i s 0 ρ jump D. code i s k 1 ρ B : jump A 0 jump D check i l u B checks if l R i < u holds and jumps accordingly.. C :. jump A k 1 42 / 104

91 Translation of the check i Macro The macro check i l u B checks if l R i < u. Let k = u l. if l R i < u it jumps to B + R i l if R i < l or R i u it jumps to C B : jump A 0. C :. jump A k 1 43 / 104

92 Translation of the check i Macro The macro check i l u B checks if l R i < u. Let k = u l. if l R i < u it jumps to B + R i l if R i < l or R i u it jumps to C we define: check i l u B = loadc R i+1 l geq R i+2 R i R i+1 jumpz R i+2 E sub R i R i R i+1 loadc R i+1 k geq R i+2 R i R i+1 jumpz R i+2 D E : loadc R i k D : jumpi R i B B : jump A 0.. jump A k 1 C : 43 / 104

93 Translation of the check i Macro The macro check i l u B checks if l R i < u. Let k = u l. if l R i < u it jumps to B + R i l if R i < l or R i u it jumps to C we define: check i l u B = loadc R i+1 l geq R i+2 R i R i+1 jumpz R i+2 E sub R i R i R i+1 loadc R i+1 k geq R i+2 R i R i+1 jumpz R i+2 D E : loadc R i k D : jumpi R i B B : jump A 0.. jump A k 1 C : Note: a jump jumpi R i B with R i = k winds up at C. 43 / 104

94 Improvements for Jump Tables This translation is only suitable for certain switch-statement. In case the table starts with 0 instead of u we don t need to subtract it from e before we use it as index if the value of e is guaranteed to be in the interval [l, u], we can omit check can we implement the switch-statement using an L-attributed system without symbolic labels? 44 / 104

95 Improvements for Jump Tables This translation is only suitable for certain switch-statement. In case the table starts with 0 instead of u we don t need to subtract it from e before we use it as index if the value of e is guaranteed to be in the interval [l, u], we can omit check can we implement the switch-statement using an L-attributed system without symbolic labels? difficult since B is unknown when check i is translated use symbolic labels or basic blocks 44 / 104

96 General translation of switch-statements In general, the values of the various cases may be far apart: generate an if-ladder, that is, a sequence of if-statements 45 / 104

97 General translation of switch-statements In general, the values of the various cases may be far apart: generate an if-ladder, that is, a sequence of if-statements for n cases, an if-cascade (tree of conditionals) can be generated O(log n) tests 45 / 104

98 General translation of switch-statements In general, the values of the various cases may be far apart: generate an if-ladder, that is, a sequence of if-statements for n cases, an if-cascade (tree of conditionals) can be generated O(log n) tests if the sequence of numbers has small gaps ( 3), a jump table may be smaller and faster 45 / 104

99 General translation of switch-statements In general, the values of the various cases may be far apart: generate an if-ladder, that is, a sequence of if-statements for n cases, an if-cascade (tree of conditionals) can be generated O(log n) tests if the sequence of numbers has small gaps ( 3), a jump table may be smaller and faster one could generate several jump tables, one for each sets of consecutive cases 45 / 104

100 General translation of switch-statements In general, the values of the various cases may be far apart: generate an if-ladder, that is, a sequence of if-statements for n cases, an if-cascade (tree of conditionals) can be generated O(log n) tests if the sequence of numbers has small gaps ( 3), a jump table may be smaller and faster one could generate several jump tables, one for each sets of consecutive cases an if cascade can be re-arranged by using information from profiling, so that paths executed more frequently require fewer tests 45 / 104

101 Translation into Basic Blocks Problem: How do we connect the different basic blocks? Idea: translation of a function: create an empty block and store a pointer to it in the node of the function declaration 46 / 104

102 Translation into Basic Blocks Problem: How do we connect the different basic blocks? Idea: translation of a function: create an empty block and store a pointer to it in the node of the function declaration pass this block down to the translation of statements 46 / 104

103 Translation into Basic Blocks Problem: How do we connect the different basic blocks? Idea: translation of a function: create an empty block and store a pointer to it in the node of the function declaration pass this block down to the translation of statements each new statement is appended to this basic block 46 / 104

104 Translation into Basic Blocks Problem: How do we connect the different basic blocks? Idea: translation of a function: create an empty block and store a pointer to it in the node of the function declaration pass this block down to the translation of statements each new statement is appended to this basic block a two-way if-statement creates three new blocks: 1 one for the then-branch, connected with the current block by a jumpz-edge 2 one for the else-branch, connected with the current block by a jump-edge 3 one for the following statements, connect to the then- and else-branch by a jump edge 46 / 104

105 Translation into Basic Blocks Problem: How do we connect the different basic blocks? Idea: translation of a function: create an empty block and store a pointer to it in the node of the function declaration pass this block down to the translation of statements each new statement is appended to this basic block a two-way if-statement creates three new blocks: 1 one for the then-branch, connected with the current block by a jumpz-edge 2 one for the else-branch, connected with the current block by a jump-edge 3 one for the following statements, connect to the then- and else-branch by a jump edge similar for other constructs 46 / 104

106 Translation into Basic Blocks Problem: How do we connect the different basic blocks? Idea: translation of a function: create an empty block and store a pointer to it in the node of the function declaration pass this block down to the translation of statements each new statement is appended to this basic block a two-way if-statement creates three new blocks: 1 one for the then-branch, connected with the current block by a jumpz-edge 2 one for the else-branch, connected with the current block by a jump-edge 3 one for the following statements, connect to the then- and else-branch by a jump edge similar for other constructs For better navigation in later stages, it can be necessary to also add backward edges. 46 / 104

107 Code Synthesis Chapter 5: Functions 47 / 104

108 Ingredients of a Function The definition of a function consists of a name with which it can be called; a specification of its formal parameters; possibly a result type; a sequence of statements. In C we have: Observe: code i R f ρ = loadc _f with _f starting address of f function names must have an address assigned to them since the size of functions is unknown before they are translated, the addresses of forward-declared functions must be inserted later 48 / 104

109 Memory Management in Functions int fac(int x) { if (x<=0) return 1; else return x*fac(x-1); } int main(void) { int n; n = fac(2) + fac(1); printf("%d", n); } At run-time several instance may be active, that is, the function has been called but has not yet returned. The recursion tree in the example: main fac fac fac fac fac printf 49 / 104

110 Memory Management in Function Variables The formal parameters and the local variables of the various (instances) of a function must be kept separate Idea for implementing functions: 50 / 104

111 Memory Management in Function Variables The formal parameters and the local variables of the various (instances) of a function must be kept separate Idea for implementing functions: set up a region of memory each time it is called 50 / 104

112 Memory Management in Function Variables The formal parameters and the local variables of the various (instances) of a function must be kept separate Idea for implementing functions: set up a region of memory each time it is called in sequential programs this memory region can be allocate on the stack 50 / 104

113 Memory Management in Function Variables The formal parameters and the local variables of the various (instances) of a function must be kept separate Idea for implementing functions: set up a region of memory each time it is called in sequential programs this memory region can be allocate on the stack thus, each instance of a function has its own region on the stack 50 / 104

114 Memory Management in Function Variables The formal parameters and the local variables of the various (instances) of a function must be kept separate Idea for implementing functions: set up a region of memory each time it is called in sequential programs this memory region can be allocate on the stack thus, each instance of a function has its own region on the stack these regions are called stack frames) 50 / 104

115 Organization of a Stack Frame stack representation: grows upwards SP points to the last used stack cell SP FP PCold FPold EPold local memory callee organizational cells local memory caller 51 / 104

116 Organization of a Stack Frame stack representation: grows upwards SP points to the last used stack cell SP FP PCold FPold EPold local memory callee organizational cells local memory caller FP = frame pointer: points to the last organizational cell use to recover the previously active stack frame 51 / 104

117 Organization of a Stack Frame stack representation: grows upwards SP points to the last used stack cell SP FP PCold FPold EPold local memory callee organizational cells local memory caller FP = frame pointer: points to the last organizational cell use to recover the previously active stack frame EP has to do with the heap, will come to that later 51 / 104

118 Split of Obligations Definition Let f be the current function that calls a function g. f is dubbed caller g is dubbed callee The code for managing function calls has to be split between caller and callee. This split cannot be done arbitrarily since some information is only known in that caller or only in the callee. Observation: The space requirement for parameters is only know by the caller: Example: printf 52 / 104

119 Principle of Function Call and Return actions taken on entering g: 1. compute the start address of g 2. compute actual parameters 3. backup of caller-save registers 4. backup of FP, EP 5. set the new FP 6. back up of PC and jump to the beginning of g 7. setup new EP 8. allocate space for local variables actions taken on leaving g: 1. compute the result 2. restore FP, EP, SP 3. return to the call site in f, that is, restore PC 4. restore the caller-save registers 5. clean up stack } } saveloc mark are in f call } } } enter are in g alloc return are in g } } } restoreloc are in f pop k 53 / 104

120 Managing Registers during Function Calls The two register sets (global and local) are used as follows: automatic variables live in local registers R i intermediate results also live in local registers R i parameters global registers R i (with i 0) global variables: 54 / 104

121 Managing Registers during Function Calls The two register sets (global and local) are used as follows: automatic variables live in local registers R i intermediate results also live in local registers R i parameters global registers R i (with i 0) global variables: let s suppose there are none convention: 54 / 104

122 Managing Registers during Function Calls The two register sets (global and local) are used as follows: automatic variables live in local registers R i intermediate results also live in local registers R i parameters global registers R i (with i 0) global variables: let s suppose there are none convention: the i th argument of a function is passed in register R i 54 / 104

123 Managing Registers during Function Calls The two register sets (global and local) are used as follows: automatic variables live in local registers R i intermediate results also live in local registers R i parameters global registers R i (with i 0) global variables: let s suppose there are none convention: the i th argument of a function is passed in register R i the result of a function is stored in R 0 54 / 104

124 Managing Registers during Function Calls The two register sets (global and local) are used as follows: automatic variables live in local registers R i intermediate results also live in local registers R i parameters global registers R i (with i 0) global variables: let s suppose there are none convention: the i th argument of a function is passed in register R i the result of a function is stored in R 0 local registers are saved before calling a function 54 / 104

125 Managing Registers during Function Calls The two register sets (global and local) are used as follows: automatic variables live in local registers R i intermediate results also live in local registers R i parameters global registers R i (with i 0) global variables: let s suppose there are none convention: the i th argument of a function is passed in register R i the result of a function is stored in R 0 local registers are saved before calling a function Definition Let f be a function that calls g. A register R i is called caller-saved if f backs up R i and g may overwrite it callee-saved if f R i does not back up g must restore it before it returns 54 / 104

126 Translation of Function Calls A function call g(e 1,... e n ) is translated as follows: code i R g(e 1,... e n ) ρ = code i R g ρ code i+1 R e 1 ρ. code i+n R e n ρ move R 1 R i+1. move R n R i+n saveloc R 1 R i 1 mark call R i restoreloc R 1 R i 1 move R i R 0 55 / 104

127 Translation of Function Calls A function call g(e 1,... e n ) is translated as follows: code i R g(e 1,... e n ) ρ = code i R g ρ code i+1 R e 1 ρ. code i+n R e n ρ move R 1 R i+1. move R n R i+n saveloc R 1 R i 1 mark call R i restoreloc R 1 R i 1 move R i R 0 New instructions: saveloc R i R j pushes the registers R i, R i+1... R j onto the stack mark backs up the organizational cells call R i calls the function at the address in R i restoreloc R i R j pops R j, R j 1,... R i off the stack 55 / 104

128 Translation of Function Calls A function call g(e 1,... e n ) is translated as follows: code i R g(e 1,... e n ) ρ = code i R g ρ code i+1 R e 1 ρ. code i+n R e n ρ move R 1 R i+1. move R n R i+n saveloc R 1 R i 1 mark call R i restoreloc R 1 R i 1? = code i R e 1 ρ move R 1 R i. code i R e n ρ move R n R i code i R g ρ saveloc R 1 R i 1 mark call R i restoreloc R 1 R i 1 move R i R 0 move R i R 0 New instructions: saveloc R i R j pushes the registers R i, R i+1... R j onto the stack mark backs up the organizational cells call R i calls the function at the address in R i restoreloc R i R j pops R j, R j 1,... R i off the stack 55 / 104

129 Rescuing EP and FP The instruction mark allocates stack space for the return value and the organizational cells and backs up FP and EP. FP EP e FP EP e e mark S[SP+1] = EP; S[SP+2] = FP; SP = SP + 2; 56 / 104

130 Calling a Function The instruction call rescues the value of PC+1 onto the stack and sets FP and PC. FP q p q Ri call Ri Ri PC p PC q SP = SP+1; S[SP] = PC; FP = SP; PC = Ri; 57 / 104

131 Result of a Function The global register set is also used to communicate the result value of a function: code i return e ρ = code i R e ρ move R 0 R i return 58 / 104

132 Result of a Function The global register set is also used to communicate the result value of a function: alternative without result value: code i return e ρ = code i R e ρ move R 0 R i return code i return ρ = return 58 / 104

133 Result of a Function The global register set is also used to communicate the result value of a function: alternative without result value: code i return e ρ = code i R e ρ move R 0 R i return code i return ρ = return global registers are otherwise not used inside a function body: advantage: at any point in the body another function can be called without backing up global registers disadvantage: on entering a function, all global registers must be saved 58 / 104

134 Return from a Function The instruction return relinquishes control of the current stack frame, that is, it restores PC, EP and FP. PC FP EP p e return PC FP EP p e PC = S[FP]; EP = S[FP-2]; SP = FP-3; FP = S[SP+2]; 59 / 104

135 Translation of Functions The translation of a function is thus defined as follows: code 1 t r f(args){decls ss} ρ = enter q move R l+1 R 1.. move R l+n R n code l+n+1 ss ρ Assumptions: return 60 / 104

136 Translation of Functions The translation of a function is thus defined as follows: code 1 t r f(args){decls ss} ρ = enter q move R l+1 R 1.. move R l+n R n code l+n+1 ss ρ Assumptions: the function has n parameters return 60 / 104

137 Translation of Functions The translation of a function is thus defined as follows: code 1 t r f(args){decls ss} ρ = enter q move R l+1 R 1.. move R l+n R n code l+n+1 ss ρ Assumptions: the function has n parameters return the local variables are stored in registers R 1,... R l 60 / 104

138 Translation of Functions The translation of a function is thus defined as follows: code 1 t r f(args){decls ss} ρ = enter q move R l+1 R 1.. move R l+n R n code l+n+1 ss ρ Assumptions: the function has n parameters return the local variables are stored in registers R 1,... R l the parameters of the function are in R 1,... R n 60 / 104

139 Translation of Functions The translation of a function is thus defined as follows: code 1 t r f(args){decls ss} ρ = enter q move R l+1 R 1.. move R l+n R n code l+n+1 ss ρ Assumptions: the function has n parameters return the local variables are stored in registers R 1,... R l the parameters of the function are in R 1,... R n ρ is obtained by extending ρ with the bindings in decls and the function parameters args 60 / 104

140 Translation of Functions The translation of a function is thus defined as follows: code 1 t r f(args){decls ss} ρ = enter q move R l+1 R 1.. move R l+n R n code l+n+1 ss ρ Assumptions: the function has n parameters return the local variables are stored in registers R 1,... R l the parameters of the function are in R 1,... R n ρ is obtained by extending ρ with the bindings in decls and the function parameters args return is not always necessary 60 / 104

141 Translation of Functions The translation of a function is thus defined as follows: code 1 t r f(args){decls ss} ρ = enter q move R l+1 R 1.. move R l+n R n code l+n+1 ss ρ Assumptions: the function has n parameters return the local variables are stored in registers R 1,... R l the parameters of the function are in R 1,... R n ρ is obtained by extending ρ with the bindings in decls and the function parameters args return is not always necessary Are the move instructions always necessary? 60 / 104

142 Translation of Whole Programs A program P = F 1 ;... F n must have a single main function. code 1 P ρ = loadc R 1 _main mark call R 1 halt _f 1 : code 1 F 1 ρ ρ f1.. _f n : code 1 F n ρ ρ fn 61 / 104

143 Translation of Whole Programs A program P = F 1 ;... F n must have a single main function. code 1 P ρ = loadc R 1 _main mark call R 1 halt _f 1 : code 1 F 1 ρ ρ f1.. _f n : code 1 F n ρ ρ fn Assumptions: ρ = assuming that we have no global variables ρ fi contain the addresses the local variables { ρ2 (x) if x dom(ρ ρ 1 ρ 2 = λx. 2 ) ρ 1 (x) otherwise 61 / 104

144 Translation of the fac-function Consider: int fac(int x) { if (x<=0) then return 1; else return x*fac(x-1); } _fac: enter 5 3 mark+call move R 1 R 1 save param. i = 2 move R 2 R 1 if (x<=0) loadc R 3 0 leq R 2 R 2 R 3 jumpz R 2 _A to else loadc R 2 1 return 1 move R 0 R 2 return jump _B code is dead _A: move R 2 R 1 x*fac(x-1) i = 3 move R 3 R 1 x-1 i = 4 loadc R 4 1 sub R 3 R 3 R 4 i = 3 move R 1 R 3 fac(x-1) loadc R 3 _fac saveloc R 1 R 2 _B: mark call R 3 restoreloc R 1 R 2 move R 3 R 0 mul R 2 R 2 R 3 move R 0 R 2 return return return x* / 104

145 Topic: Variables in Memory 63 / 104

146 Register versus Memory so far: all variables are stored in registers all function parameters and the return value are stored in registers 64 / 104

Compiler Construction I

Compiler Construction I TECHNISCHE UNIVERSITÄT MÜNCHEN FAKULTÄT FÜR INFORMATIK Compiler Construction I Dr. Michael Petter, Dr. Axel Simon SoSe 2013 1 / 108 Organizing Master or Bachelor in the 6th Semester with 5 ECTS Prerequisites

More information

Code generation scheme for RCMA

Code generation scheme for RCMA Code generation scheme for RCMA Axel Simon July 5th, 2010 1 Revised Specification of the R-CMa We detail what constitutes the Register C-Machine (R-CMa ) and its operations in turn We then detail how the

More information

CMa simple C Abstract Machine

CMa simple C Abstract Machine CMa simple C Abstract Machine CMa architecture An abstract machine has set of instructions which can be executed in an abstract hardware. The abstract hardware may be seen as a collection of certain data

More information

Helmut Seidl. Virtual Machines. München. Summer 2014

Helmut Seidl. Virtual Machines. München. Summer 2014 Helmut Seidl Virtual Machines München Summer 2014 1 0 Introduction Principle of Interpretation: Program + Input Interpreter Output Advantage: No precomputation on the program text == no/short startup-time

More information

Course Administration

Course Administration Fall 2018 EE 3613: Computer Organization Chapter 2: Instruction Set Architecture Introduction 4/4 Avinash Karanth Department of Electrical Engineering & Computer Science Ohio University, Athens, Ohio 45701

More information

Module 27 Switch-case statements and Run-time storage management

Module 27 Switch-case statements and Run-time storage management Module 27 Switch-case statements and Run-time storage management In this module we will discuss the pending constructs in generating three-address code namely switch-case statements. We will also discuss

More information

SOURCE LANGUAGE DESCRIPTION

SOURCE LANGUAGE DESCRIPTION 1. Simple Integer Language (SIL) SOURCE LANGUAGE DESCRIPTION The language specification given here is informal and gives a lot of flexibility for the designer to write the grammatical specifications to

More information

Project 3 Due October 21, 2015, 11:59:59pm

Project 3 Due October 21, 2015, 11:59:59pm Project 3 Due October 21, 2015, 11:59:59pm 1 Introduction In this project, you will implement RubeVM, a virtual machine for a simple bytecode language. Later in the semester, you will compile Rube (a simplified

More information

Compilers and computer architecture: A realistic compiler to MIPS

Compilers and computer architecture: A realistic compiler to MIPS 1 / 1 Compilers and computer architecture: A realistic compiler to MIPS Martin Berger November 2017 Recall the function of compilers 2 / 1 3 / 1 Recall the structure of compilers Source program Lexical

More information

Code Generation. The Main Idea of Today s Lecture. We can emit stack-machine-style code for expressions via recursion. Lecture Outline.

Code Generation. The Main Idea of Today s Lecture. We can emit stack-machine-style code for expressions via recursion. Lecture Outline. The Main Idea of Today s Lecture Code Generation We can emit stack-machine-style code for expressions via recursion (We will use MIPS assembly as our target language) 2 Lecture Outline What are stack machines?

More information

We can emit stack-machine-style code for expressions via recursion

We can emit stack-machine-style code for expressions via recursion Code Generation The Main Idea of Today s Lecture We can emit stack-machine-style code for expressions via recursion (We will use MIPS assembly as our target language) 2 Lecture Outline What are stack machines?

More information

Chapter 2A Instructions: Language of the Computer

Chapter 2A Instructions: Language of the Computer Chapter 2A Instructions: Language of the Computer Copyright 2009 Elsevier, Inc. All rights reserved. Instruction Set The repertoire of instructions of a computer Different computers have different instruction

More information

COMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture

COMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture COMP 303 Computer Architecture Lecture 3 Comp 303 Computer Architecture 1 Supporting procedures in computer hardware The execution of a procedure Place parameters in a place where the procedure can access

More information

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine Machine Language Instructions Introduction Instructions Words of a language understood by machine Instruction set Vocabulary of the machine Current goal: to relate a high level language to instruction

More information

Intermediate Code Generation

Intermediate Code Generation Intermediate Code Generation In the analysis-synthesis model of a compiler, the front end analyzes a source program and creates an intermediate representation, from which the back end generates target

More information

Topic 7: Activation Records

Topic 7: Activation Records Topic 7: Activation Records Compiler Design Prof. Hanjun Kim CoreLab (Compiler Research Lab) POSTECH 1 Storage Organization Stack Free Memory Heap Static Code 2 ELF file format example Executable Object

More information

Branch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015

Branch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015 Branch Addressing Branch instructions specify Opcode, two registers, target address Most branch targets are near branch Forward or backward op rs rt constant or address 6 bits 5 bits 5 bits 16 bits PC-relative

More information

Thomas Polzer Institut für Technische Informatik

Thomas Polzer Institut für Technische Informatik Thomas Polzer tpolzer@ecs.tuwien.ac.at Institut für Technische Informatik Branch to a labeled instruction if a condition is true Otherwise, continue sequentially beq rs, rt, L1 if (rs == rt) branch to

More information

CS 2210 Programming Project (Part IV)

CS 2210 Programming Project (Part IV) CS 2210 Programming Project (Part IV) April 25, 2018 Code Generation This project is intended to give you experience in writing a code generator as well as bring together the various issues of code generation

More information

MaMa a simple abstract machine for functional languages

MaMa a simple abstract machine for functional languages MaMa a simple abstract machine for functional languages Functional Language PuF We will consider a mini-laguage of "Pure Functions" PuF. Programs are expressions e in form: e ::= b j x j ( 1 e) j (e 1

More information

CSE 504. Expression evaluation. Expression Evaluation, Runtime Environments. One possible semantics: Problem:

CSE 504. Expression evaluation. Expression Evaluation, Runtime Environments. One possible semantics: Problem: Expression evaluation CSE 504 Order of evaluation For the abstract syntax tree + + 5 Expression Evaluation, Runtime Environments + + x 3 2 4 the equivalent expression is (x + 3) + (2 + 4) + 5 1 2 (. Contd

More information

CODE GENERATION Monday, May 31, 2010

CODE GENERATION Monday, May 31, 2010 CODE GENERATION memory management returned value actual parameters commonly placed in registers (when possible) optional control link optional access link saved machine status local data temporaries A.R.

More information

CS558 Programming Languages

CS558 Programming Languages CS558 Programming Languages Fall 2016 Lecture 4a Andrew Tolmach Portland State University 1994-2016 Pragmatics of Large Values Real machines are very efficient at handling word-size chunks of data (e.g.

More information

Compiling Code, Procedures and Stacks

Compiling Code, Procedures and Stacks Compiling Code, Procedures and Stacks L03-1 RISC-V Recap Computational Instructions executed by ALU Register-Register: op dest, src1, src2 Register-Immediate: op dest, src1, const Control flow instructions

More information

CSc 453 Interpreters & Interpretation

CSc 453 Interpreters & Interpretation CSc 453 Interpreters & Interpretation Saumya Debray The University of Arizona Tucson Interpreters An interpreter is a program that executes another program. An interpreter implements a virtual machine,

More information

Translating JVM Code to MIPS Code 1 / 43

Translating JVM Code to MIPS Code 1 / 43 Translating JVM Code to MIPS Code 1 / 43 Outline 1 Introduction 2 SPIM and the MIPS Architecture 3 Our Translator 2 / 43 Introduction Compilation is not necessarily done after the class file is constructed

More information

CA Compiler Construction

CA Compiler Construction CA4003 - Compiler Construction David Sinclair When procedure A calls procedure B, we name procedure A the caller and procedure B the callee. A Runtime Environment, also called an Activation Record, is

More information

Compiling Techniques

Compiling Techniques Lecture 10: Introduction to 10 November 2015 Coursework: Block and Procedure Table of contents Introduction 1 Introduction Overview Java Virtual Machine Frames and Function Call 2 JVM Types and Mnemonics

More information

Winter Compiler Construction T11 Activation records + Introduction to x86 assembly. Today. Tips for PA4. Today:

Winter Compiler Construction T11 Activation records + Introduction to x86 assembly. Today. Tips for PA4. Today: Winter 2006-2007 Compiler Construction T11 Activation records + Introduction to x86 assembly Mooly Sagiv and Roman Manevich School of Computer Science Tel-Aviv University Today ic IC Language Lexical Analysis

More information

Computer Architecture

Computer Architecture Computer Architecture Chapter 2 Instructions: Language of the Computer Fall 2005 Department of Computer Science Kent State University Assembly Language Encodes machine instructions using symbols and numbers

More information

1 Lexical Considerations

1 Lexical Considerations Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6.035, Spring 2013 Handout Decaf Language Thursday, Feb 7 The project for the course is to write a compiler

More information

Lecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook)

Lecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook) Lecture 2 Instructions: Language of the Computer (Chapter 2 of the textbook) Instructions: tell computers what to do Chapter 2 Instructions: Language of the Computer 2 Introduction Chapter 2.1 Chapter

More information

Rui Wang, Assistant professor Dept. of Information and Communication Tongji University.

Rui Wang, Assistant professor Dept. of Information and Communication Tongji University. Instructions: ti Language of the Computer Rui Wang, Assistant professor Dept. of Information and Communication Tongji University it Email: ruiwang@tongji.edu.cn Computer Hierarchy Levels Language understood

More information

Virtual Machine Tutorial

Virtual Machine Tutorial Virtual Machine Tutorial CSA2201 Compiler Techniques Gordon Mangion Virtual Machine A software implementation of a computing environment in which an operating system or program can be installed and run.

More information

Chapter 2 A Quick Tour

Chapter 2 A Quick Tour Chapter 2 A Quick Tour 2.1 The Compiler Toolchain A compiler is one component in a toolchain of programs used to create executables from source code. Typically, when you invoke a single command to compile

More information

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero Do-While Example In C++ do { z--; while (a == b); z = b; In assembly language loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero 25 Comparisons Set on less than (slt) compares its source registers

More information

CS558 Programming Languages Winter 2018 Lecture 4a. Andrew Tolmach Portland State University

CS558 Programming Languages Winter 2018 Lecture 4a. Andrew Tolmach Portland State University CS558 Programming Languages Winter 2018 Lecture 4a Andrew Tolmach Portland State University 1994-2018 Pragmatics of Large Values Real machines are very efficient at handling word-size chunks of data (e.g.

More information

G Programming Languages - Fall 2012

G Programming Languages - Fall 2012 G22.2110-003 Programming Languages - Fall 2012 Lecture 4 Thomas Wies New York University Review Last week Control Structures Selection Loops Adding Invariants Outline Subprograms Calling Sequences Parameter

More information

ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design

ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design Professor Sherief Reda http://scale.engin.brown.edu School of Engineering Brown University Spring 2014 Sources: Computer

More information

Today s topics. MIPS operations and operands. MIPS arithmetic. CS/COE1541: Introduction to Computer Architecture. A Review of MIPS ISA.

Today s topics. MIPS operations and operands. MIPS arithmetic. CS/COE1541: Introduction to Computer Architecture. A Review of MIPS ISA. Today s topics CS/COE1541: Introduction to Computer Architecture MIPS operations and operands MIPS registers Memory view Instruction encoding A Review of MIPS ISA Sangyeun Cho Arithmetic operations Logic

More information

EE 361 University of Hawaii Fall

EE 361 University of Hawaii Fall C functions Road Map Computation flow Implementation using MIPS instructions Useful new instructions Addressing modes Stack data structure 1 EE 361 University of Hawaii Implementation of C functions and

More information

Lexical Considerations

Lexical Considerations Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6.035, Fall 2005 Handout 6 Decaf Language Wednesday, September 7 The project for the course is to write a

More information

The TinyJ Compiler's Static and Stack-Dynamic Memory Allocation Rules Static Memory Allocation for Static Variables in TinyJ:

The TinyJ Compiler's Static and Stack-Dynamic Memory Allocation Rules Static Memory Allocation for Static Variables in TinyJ: The TinyJ Compiler's Static and Stack-Dynamic Memory Allocation Rules Static Memory Allocation for Static Variables in TinyJ: The n th static int or array reference variable in a TinyJ source file is given

More information

CS356: Discussion #6 Assembly Procedures and Arrays. Marco Paolieri

CS356: Discussion #6 Assembly Procedures and Arrays. Marco Paolieri CS356: Discussion #6 Assembly Procedures and Arrays Marco Paolieri (paolieri@usc.edu) Procedures Functions are a key abstraction in software They break down a problem into subproblems. Reusable functionality:

More information

Intermediate Representations

Intermediate Representations Intermediate Representations A variety of intermediate representations are used in compilers Most common intermediate representations are: Abstract Syntax Tree Directed Acyclic Graph (DAG) Three-Address

More information

Summary: Direct Code Generation

Summary: Direct Code Generation Summary: Direct Code Generation 1 Direct Code Generation Code generation involves the generation of the target representation (object code) from the annotated parse tree (or Abstract Syntactic Tree, AST)

More information

Lecture 5. Announcements: Today: Finish up functions in MIPS

Lecture 5. Announcements: Today: Finish up functions in MIPS Lecture 5 Announcements: Today: Finish up functions in MIPS 1 Control flow in C Invoking a function changes the control flow of a program twice. 1. Calling the function 2. Returning from the function In

More information

Chapter 9 :: Subroutines and Control Abstraction

Chapter 9 :: Subroutines and Control Abstraction Chapter 9 :: Subroutines and Control Abstraction Programming Language Pragmatics, Fourth Edition Michael L. Scott Copyright 2016 Elsevier 1 Chapter09_Subroutines_and_Control_Abstraction_4e - Tue November

More information

Control Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary

Control Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary Control Instructions Computer Organization Architectures for Embedded Computing Thursday, 26 September 2013 Many slides adapted from: Computer Organization and Design, Patterson & Hennessy 4th Edition,

More information

Control Instructions

Control Instructions Control Instructions Tuesday 22 September 15 Many slides adapted from: and Design, Patterson & Hennessy 5th Edition, 2014, MK and from Prof. Mary Jane Irwin, PSU Summary Previous Class Instruction Set

More information

Q1: /20 Q2: /30 Q3: /24 Q4: /26. Total: /100

Q1: /20 Q2: /30 Q3: /24 Q4: /26. Total: /100 ECE 2035(B) Programming for Hardware/Software Systems Fall 2013 Exam Two October 22 nd 2013 Name: Q1: /20 Q2: /30 Q3: /24 Q4: /26 Total: /100 1/6 For functional call related questions, let s assume the

More information

Computer Architecture. Chapter 2-2. Instructions: Language of the Computer

Computer Architecture. Chapter 2-2. Instructions: Language of the Computer Computer Architecture Chapter 2-2 Instructions: Language of the Computer 1 Procedures A major program structuring mechanism Calling & returning from a procedure requires a protocol. The protocol is a sequence

More information

CIT Week13 Lecture

CIT Week13 Lecture CIT 3136 - Week13 Lecture Runtime Environments During execution, allocation must be maintained by the generated code that is compatible with the scope and lifetime rules of the language. Typically there

More information

Typical Runtime Layout. Tiger Runtime Environments. Example: Nested Functions. Activation Trees. code. Memory Layout

Typical Runtime Layout. Tiger Runtime Environments. Example: Nested Functions. Activation Trees. code. Memory Layout Tiger Runtime Environments Compile-time environments are just symbol tables; they are used to assist static semantic analysis, code generation and code optimization. Run-time environments are about how

More information

Chapter 10 Memory Model for Program Execution. Problem

Chapter 10 Memory Model for Program Execution. Problem Chapter 10 Memory Model for Program Execution Original slides by Chris Wilcox, Colorado State University Problem How do we allocate memory during the execution of a program written in C?! Programs need

More information

CS 432 Fall Mike Lam, Professor. Code Generation

CS 432 Fall Mike Lam, Professor. Code Generation CS 432 Fall 2015 Mike Lam, Professor Code Generation Compilers "Back end" Source code Tokens Syntax tree Machine code char data[20]; int main() { float x = 42.0; return 7; } 7f 45 4c 46 01 01 01 00 00

More information

Systems I. Machine-Level Programming V: Procedures

Systems I. Machine-Level Programming V: Procedures Systems I Machine-Level Programming V: Procedures Topics abstraction and implementation IA32 stack discipline Procedural Memory Usage void swap(int *xp, int *yp) int t0 = *xp; int t1 = *yp; *xp = t1; *yp

More information

COMPUTER ORGANIZATION AND DESIGN

COMPUTER ORGANIZATION AND DESIGN COMPUTER ORGANIZATION AND DESIGN 5 th The Hardware/Software Interface Edition Chapter 2 Instructions: Language of the Computer 2.1 Introduction Instruction Set The repertoire of instructions of a computer

More information

Functions in MIPS. Functions in MIPS 1

Functions in MIPS. Functions in MIPS 1 Functions in MIPS We ll talk about the 3 steps in handling function calls: 1. The program s flow of control must be changed. 2. Arguments and return values are passed back and forth. 3. Local variables

More information

x86 assembly CS449 Fall 2017

x86 assembly CS449 Fall 2017 x86 assembly CS449 Fall 2017 x86 is a CISC CISC (Complex Instruction Set Computer) e.g. x86 Hundreds of (complex) instructions Only a handful of registers RISC (Reduced Instruction Set Computer) e.g. MIPS

More information

Compiler Construction I

Compiler Construction I TECHNISCHE UNIVERSITÄT MÜNCHEN FAKULTÄT FÜR INFORMATIK Compiler Construction I Dr. Michael Petter, Dr. Axel Simon SoSe 2014 1 / 30 Topic: Semantic Analysis 2 / 30 Semantic Analysis Chapter 1: Type Checking

More information

Motivation. Compiler. Our ultimate goal: Hack code. Jack code (example) Translate high-level programs into executable code. return; } } return

Motivation. Compiler. Our ultimate goal: Hack code. Jack code (example) Translate high-level programs into executable code. return; } } return Motivation Jack code (example) class class Main Main { { static static int int x; x; function function void void main() main() { { Inputs Inputs and and multiplies multiplies two two numbers numbers var

More information

Compilers and Code Optimization EDOARDO FUSELLA

Compilers and Code Optimization EDOARDO FUSELLA Compilers and Code Optimization EDOARDO FUSELLA Contents Data memory layout Instruction selection Register allocation Data memory layout Memory Hierarchy Capacity vs access speed Main memory Classes of

More information

Lectures 5. Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS

Lectures 5. Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS Lectures 5 Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS 1 OOPS - What does this C code do? int foo(char *s) { int L = 0; while (*s++) { ++L; } return L; } 2

More information

Lexical Considerations

Lexical Considerations Massachusetts Institute of Technology Department of Electrical Engineering and Computer Science 6.035, Spring 2010 Handout Decaf Language Tuesday, Feb 2 The project for the course is to write a compiler

More information

Computer Organization MIPS ISA

Computer Organization MIPS ISA CPE 335 Computer Organization MIPS ISA Dr. Iyad Jafar Adapted from Dr. Gheith Abandah Slides http://www.abandah.com/gheith/courses/cpe335_s08/index.html CPE 232 MIPS ISA 1 (vonneumann) Processor Organization

More information

! What do we care about? n Fast program execution. n Efficient memory usage. n Avoid memory fragmentation. n Maintain data locality

! What do we care about? n Fast program execution. n Efficient memory usage. n Avoid memory fragmentation. n Maintain data locality Problem Chapter 10 Memory Model for Program Execution Original slides by Chris Wilcox, Colorado State University How do we allocate memory during the execution of a program written in C?! Programs need

More information

Course Overview. Levels of Programming Languages. Compilers and other translators. Tombstone Diagrams. Syntax Specification

Course Overview. Levels of Programming Languages. Compilers and other translators. Tombstone Diagrams. Syntax Specification Course Overview Levels of Programming Languages PART I: overview material 1 Introduction 2 Language processors (tombstone diagrams, bootstrapping) 3 Architecture of a compiler PART II: inse a compiler

More information

B.V. Patel Institute of Business Management, Computer & Information Technology, Uka Tarsadia University

B.V. Patel Institute of Business Management, Computer & Information Technology, Uka Tarsadia University Unit 1 Programming Language and Overview of C 1. State whether the following statements are true or false. a. Every line in a C program should end with a semicolon. b. In C language lowercase letters are

More information

The CPU and Memory. How does a computer work? How does a computer interact with data? How are instructions performed? Recall schematic diagram:

The CPU and Memory. How does a computer work? How does a computer interact with data? How are instructions performed? Recall schematic diagram: The CPU and Memory How does a computer work? How does a computer interact with data? How are instructions performed? Recall schematic diagram: 1 Registers A register is a permanent storage location within

More information

General issues. Section 9.1. Compiler Construction: Code Generation p. 1/18

General issues. Section 9.1. Compiler Construction: Code Generation p. 1/18 General issues Section 9.1 Target language: absolute machine language all addresses refer to actual addresses program placed in a fixed location in memory relocatable machine language (object modules)

More information

Project. there are a couple of 3 person teams. a new drop with new type checking is coming. regroup or see me or forever hold your peace

Project. there are a couple of 3 person teams. a new drop with new type checking is coming. regroup or see me or forever hold your peace Project there are a couple of 3 person teams regroup or see me or forever hold your peace a new drop with new type checking is coming using it is optional 1 Compiler Architecture source code Now we jump

More information

Computer Architecture /

Computer Architecture / Computer Architecture 02-201 / 02-601 The Conceptual Architecture of a Computer PC CPU register 0 register 1 register 2 registers hold small amounts of data for processing by the CPU Reading / writing

More information

CS 6353 Compiler Construction Project Assignments

CS 6353 Compiler Construction Project Assignments CS 6353 Compiler Construction Project Assignments In this project, you need to implement a compiler for a language defined in this handout. The programming language you need to use is C or C++ (and the

More information

Practical Malware Analysis

Practical Malware Analysis Practical Malware Analysis Ch 4: A Crash Course in x86 Disassembly Revised 1-16-7 Basic Techniques Basic static analysis Looks at malware from the outside Basic dynamic analysis Only shows you how the

More information

Chapter 3 Machine Instructions & Programs. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan

Chapter 3 Machine Instructions & Programs. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Chapter 3 Machine Instructions & Programs Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Outline Numbers, Arithmetic Operations, and Characters Memory Locations

More information

Run-time Environments. Lecture 13. Prof. Alex Aiken Original Slides (Modified by Prof. Vijay Ganesh) Lecture 13

Run-time Environments. Lecture 13. Prof. Alex Aiken Original Slides (Modified by Prof. Vijay Ganesh) Lecture 13 Run-time Environments Lecture 13 by Prof. Vijay Ganesh) Lecture 13 1 What have we covered so far? We have covered the front-end phases Lexical analysis (Lexer, regular expressions,...) Parsing (CFG, Top-down,

More information

Computer Architecture Prof. Mainak Chaudhuri Department of Computer Science & Engineering Indian Institute of Technology, Kanpur

Computer Architecture Prof. Mainak Chaudhuri Department of Computer Science & Engineering Indian Institute of Technology, Kanpur Computer Architecture Prof. Mainak Chaudhuri Department of Computer Science & Engineering Indian Institute of Technology, Kanpur Lecture - 7 Case study with MIPS-I So, we were discussing (Refer Time: 00:20),

More information

CSE P 501 Exam 8/5/04 Sample Solution. 1. (10 points) Write a regular expression or regular expressions that generate the following sets of strings.

CSE P 501 Exam 8/5/04 Sample Solution. 1. (10 points) Write a regular expression or regular expressions that generate the following sets of strings. 1. (10 points) Write a regular ression or regular ressions that generate the following sets of strings. (a) (5 points) All strings containing a s, b s, and c s with at least one a and at least one b. [abc]*a[abc]*b[abc]*

More information

CS64 Week 5 Lecture 1. Kyle Dewey

CS64 Week 5 Lecture 1. Kyle Dewey CS64 Week 5 Lecture 1 Kyle Dewey Overview More branches in MIPS Memory in MIPS MIPS Calling Convention More Branches in MIPS else_if.asm nested_if.asm nested_else_if.asm Memory in MIPS Accessing Memory

More information

Architecture II. Computer Systems Laboratory Sungkyunkwan University

Architecture II. Computer Systems Laboratory Sungkyunkwan University MIPS Instruction ti Set Architecture II Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Making Decisions (1) Conditional operations Branch to a

More information

Talen en Compilers. Johan Jeuring , period 2. December 15, Department of Information and Computing Sciences Utrecht University

Talen en Compilers. Johan Jeuring , period 2. December 15, Department of Information and Computing Sciences Utrecht University Talen en Compilers 2016-2017, period 2 Johan Jeuring Department of Information and Computing Sciences Utrecht University December 15, 2016 9 Simple stack machine 9-1 Recap: Semantic functions In the previous

More information

CS143 - Written Assignment 4 Reference Solutions

CS143 - Written Assignment 4 Reference Solutions CS143 - Written Assignment 4 Reference Solutions 1. Consider the following program in Cool, representing a slightly over-engineered implementation which calculates the factorial of 3 using an operator

More information

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont )

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont ) Chapter 2 Computer Abstractions and Technology Lesson 4: MIPS (cont ) Logical Operations Instructions for bitwise manipulation Operation C Java MIPS Shift left >>> srl Bitwise

More information

UNIT-V. Symbol Table & Run-Time Environments Symbol Table

UNIT-V. Symbol Table & Run-Time Environments Symbol Table 1 P a g e UNIT-V Symbol Table & Run-Time Environments Symbol Table Symbol table is a data structure used by compiler to keep track of semantics of variable. i.e. symbol table stores the information about

More information

Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes

Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes Chapter 2 Instructions: Language of the Computer Adapted by Paulo Lopes Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects

More information

ECE220: Computer Systems and Programming Spring 2018 Honors Section due: Saturday 14 April at 11:59:59 p.m. Code Generation for an LC-3 Compiler

ECE220: Computer Systems and Programming Spring 2018 Honors Section due: Saturday 14 April at 11:59:59 p.m. Code Generation for an LC-3 Compiler ECE220: Computer Systems and Programming Spring 2018 Honors Section Machine Problem 11 due: Saturday 14 April at 11:59:59 p.m. Code Generation for an LC-3 Compiler This assignment requires you to use recursion

More information

Recap: Printing Trees into Bytecodes

Recap: Printing Trees into Bytecodes Recap: Printing Trees into Bytecodes To evaluate e 1 *e 2 interpreter evaluates e 1 evaluates e 2 combines the result using * Compiler for e 1 *e 2 emits: code for e 1 that leaves result on the stack,

More information

Compiler construction 2009

Compiler construction 2009 Compiler construction 2009 Lecture 2 Code generation 1: Generating Jasmin code JVM and Java bytecode Jasmin Naive code generation The Java Virtual Machine Data types Primitive types, including integer

More information

COMP 181. Prelude. Intermediate representations. Today. High-level IR. Types of IRs. Intermediate representations and code generation

COMP 181. Prelude. Intermediate representations. Today. High-level IR. Types of IRs. Intermediate representations and code generation Prelude COMP 181 Lecture 14 Intermediate representations and code generation October 19, 2006 Who is Seth Lloyd? Professor of mechanical engineering at MIT, pioneer in quantum computing Article in Nature:

More information

Code Generation. Dragon: Ch (Just part of it) Holub: Ch 6.

Code Generation. Dragon: Ch (Just part of it) Holub: Ch 6. Code Generation Dragon: Ch 7. 8. (Just part of it) Holub: Ch 6. Compilation Processes Again Choice of Intermediate Code Representation (IR) IR examples Parse tree Three address code (e.g., x := y op z)

More information

Compiler Architecture

Compiler Architecture Code Generation 1 Compiler Architecture Source language Scanner (lexical analysis) Tokens Parser (syntax analysis) Syntactic structure Semantic Analysis (IC generator) Intermediate Language Code Optimizer

More information

Procedures and Stacks

Procedures and Stacks Procedures and Stacks Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T. March 15, 2018 L10-1 Announcements Schedule has shifted due to snow day Quiz 2 is now on Thu 4/12 (one week later)

More information

We ve written these as a grammar, but the grammar also stands for an abstract syntax tree representation of the IR.

We ve written these as a grammar, but the grammar also stands for an abstract syntax tree representation of the IR. CS 4120 Lecture 14 Syntax-directed translation 26 September 2011 Lecturer: Andrew Myers We want to translate from a high-level programming into an intermediate representation (IR). This lecture introduces

More information

Compiler Construction D7011E

Compiler Construction D7011E Compiler Construction D7011E Lecture 8: Introduction to code generation Viktor Leijon Slides largely by Johan Nordlander with material generously provided by Mark P. Jones. 1 What is a Compiler? Compilers

More information

Run-time Environment

Run-time Environment Run-time Environment Prof. James L. Frankel Harvard University Version of 3:08 PM 20-Apr-2018 Copyright 2018, 2016, 2015 James L. Frankel. All rights reserved. Storage Organization Automatic objects are

More information

G Programming Languages Spring 2010 Lecture 4. Robert Grimm, New York University

G Programming Languages Spring 2010 Lecture 4. Robert Grimm, New York University G22.2110-001 Programming Languages Spring 2010 Lecture 4 Robert Grimm, New York University 1 Review Last week Control Structures Selection Loops 2 Outline Subprograms Calling Sequences Parameter Passing

More information

Code Generation. Lecture 30

Code Generation. Lecture 30 Code Generation Lecture 30 (based on slides by R. Bodik) 11/14/06 Prof. Hilfinger CS164 Lecture 30 1 Lecture Outline Stack machines The MIPS assembly language The x86 assembly language A simple source

More information

Run-time Environments

Run-time Environments Run-time Environments Status We have so far covered the front-end phases Lexical analysis Parsing Semantic analysis Next come the back-end phases Code generation Optimization Register allocation Instruction

More information

CS4215 Programming Language Implementation. Martin Henz

CS4215 Programming Language Implementation. Martin Henz CS4215 Programming Language Implementation Martin Henz Thursday 15 March, 2012 2 Chapter 11 impl: A Simple Imperative Language 11.1 Introduction So far, we considered only languages, in which an identifier

More information