Chapter 4 The Datapath

Transcription

1 The Ageda Chapter 4 The Datapath Based o slides McGraw-Hill Additioal material 24/25/26 Lewis/Marti Additioal material 28 Roth Additioal material 2 Taylor Additioal material 2 Farmer Tae the elemets that we have ecoutered so far Combiatioal Elemets Gates, Adders, Muxes, decoders Storage Elemets Flip flops, registers, memories Ad use them to build a circuit that ca perform a sequece of arithmetic operatios. I essece, we will build a very simple CPU today Buildig the datapath..examples Recall earlier discussio dowload seq-devices.cdl Ope i Cedar Logic Page : schematic of a register We ow have the Register i our library Page 2: what is this device Set iput usig Iput eyboard, Read or Write usig, address usig address eyboard chec output Model of a memory usig a ba of 4 registers Page Schematic of a Read Oly (ROM) program cotets by eterig data i each locatio Sed read sigal eable OE; Provide address, chec output Page 4: Radom Access Mem (RAM) Read ad Write ito memory How to set up RAM module to do Read or Write? Page 5 shows RAM with Read/Write Note use of Tri-state buses Arithmetic Fuctios Page 6 usig 4-bit full adder to implemet a Adder Page 7 usig 4-bit comparator to implemet coditio checig: x>y? or x==y? or x < y? Page 8 what is this circuit? Page 8 two fuctio Arithmetic Logic Uit (ALU) Reads iputs from eyboard What are the cotrol sigals?

2 Examples Dowload datapath.cdl file Page : what s this? First set Write Eable to, eter,,2, o Address ad eter,4,6,8 o iput Next set address =2 ad set address 2 = What is the output? Multi-port Register ba/file Feed iputs to ALU from register file! Page 2: Eter ROM cotets: Address store Address store Address 2 store 2 Address store 4 Eter iputs Y= ad X=5 What is the output if you eter address What is the output if you eter address, 2, What s beig implemeted? Depedig o cotets of ROM, circuit loads values X,Y ito two registers ad either adds or compares them Programmable ALU Page 2: simple programmable 2-fuctio ALU Cotrol sigals (i.e., cotrol path) are stored i memory Step through addresses i memory Execute istructios! Iputs are comig from eyboard Page : what s this? Same circuit as Page 9, but register couts through the istructios lie a program couter! BASIC CPU DATAPATH & CONTROL 2

3 -bit Adder/Subtracter (simplified ALU) Adder/Subtracter Add/Sub CarryI A B A Basic Arithmetic Logic Uit (ALU) allows us to do two operatios + / - o bit values. Iputs: A, B, Add/Sub Outputs: S Data iputs: A & B, Cotrol iputs: Add/Sub S 2 by -bit : Two Read Ports, Oe Write (Register File) A R D W Decoder..... D D D 2... D 7 DR D R2 Address Space, = 2 = 8, or 8 drawers Addressability, m= bits, or 2 bytes i each drawer A R D W 2 x -bit DR DR2 Recall, this memory ca read 2 addresses ad write to a rd o the positive edge of CLK Simple Processor: Datapath Puttig Register File together with ALU: Our first CPU! Really just a glorified fiit state machie! 2 x -bit Simple Processor: Datapath w/cotrol Puttig Register File together with ALU: 2 x -bit A R Cotrol 2 x -bit This is the datapath Literally, the path through which data values travel What cotrols the flow of data through this datapath? These are the cotrol sigals (The lies i red) The sigals eeded to cotrol the flow of data alog the datapath Notice, we added a secod This memory will hold values for the cotrol sigals i.e.: AR, AR2, AW,, +/-

4 A Useful Aalogy The datapath correspods to the tracs i a railway pathways that allow you to move iformatio aroud the CPU The cotrol sigals cotrol the switches that coect tracs Sigals that setup the pathways so data ca flow through CPU Simple Processor: Example: Add two #s 2 x -bit Cotrol A R 2 x -bit Our register file has 2 =8 DFF Registers withi it: Let s say we wish to add the cotets of Regfiles: Reg to Reg2 The store the result i Reg. (ai to a program: a=b+c i Java) How would we set the cotrol lies? +/- = (to idicate a add) A R =, =, =, = (to store result) The settigs for the cotrol lies, come out of the cotrol memory: is the bits wide (i this case) ad equals: Simple Processor: Example: Add two #s 2 x -bit Cotrol A R 2 x -bit To ADD cotets of R+R2, cotrol memory must cotai: A R (R) (R2) (R) If row of the cotrol memory had these -bits i it Our ALU would perform a ADD of R+R2 ad write the results to R Simple Processor: Limitatio Register File Cotais DATA our processor operates upo Cotrol Holds cotrol sigals for our processor I essece holds the program we wat our CPU to execute Limitatio i our Simple Processor Model If we had a program with more tha istructio: a=b+c How could we advace to the ext row of cotrol? We eed a device to tell us what row of our program we are o I the ext slide, we ll try to fix this limitatio 4

5 Simple Processor w/program Couter () 2 x -bit Cotrol A R 2 x -bit BASIC CPU W/ PROGRAM COUNTER + Program Couter (poits to curret row i cotrol memory) We ve added a ew register () to our CPU -Holds the row # of the cotrol memory we are o We ve also attached a icremeter to mae a couter -Advaces us row of cotrol memory at each cloc pulse -=+ (just meas go to ext lie i cotrol mem) Simple Processor w/ - Limitatios Register File Cotais DATA our processor operates upo Cotrol Holds cotrol sigals for our processor I essece holds the program we wat our CPU to execute Holds state of our system Essetially tells us what row of cotrol memory to looup Limitatio i our Simple Processor w/ Model This system is great if our programs ru oe lie after aother But what if we do t wat to execute the program i order? Ca we add hardware to eable IF/THEN capability? Wat hardware that allows us to jump aroud i our program ENHANCED CPU IF/THEN/WHILE 5

6 Ehaced Processor /w & Tester Circuit 2 x -bit Cotrol A R 2 x -bit What does the circuit do? Ultimately cotrol the ext value for the Program Couter Tests output of ALU, for some coditio: NZP If coditio is TRUE, =Next (jump to aother lie lie: ) If coditio is FALSE, =+ (go to ext lie: +=) NZP Next + Also, two ew cotrol lies: NZP ad Next, cotrols box New circuit to evaluate output of ALU to cotrol mem to reg File NZP Next + Is ALUOut >? Why do we wat a circuit? Gives CPU ability to mae decisios at rutime Sip over istructios i cotrol memory Loop / repeat istructios i cotrol memory Examples: if (a>b) { // do somethig } else { // otherwise sip here } while (a>b) { // repeat these lies } Values of variables (a,b) may ot be ow util program is ruig How do we Implemet Comparisos? while (a>b) { // repeat these lies } We use ALU / Tester circuit / MUX to perform compariso example: Step : perform subtractio: a-b (ALU ca do this) Step 2: judge output of ALU: (Tester does this) If a-b <, the a is smaller tha b If a-b =, the a is equal to b If a-b >, the a is greater tha b Basic questio for Tester: did subtractio produce a Negative, Zero, or Positive umber (NZP) Step : Jump to a lie of program based o result of compariso If a>b, the =+ (MUX does this) If a<=b, the =some ew value 6

7 Aatomy of a Compariso w/ehaced Processor 2 x -bit Cotrol Set desired compariso: >, <, == A R NZP Next + 2 x -bit Perform subtractio here: Perform compariso here Results of compariso gover ext iput to Let s Defie Behavior of Our Circuit Wat a circuit that ca determie if output of ALU is: +, - or (OR MORE tha of those coditios: e.g.: >= ) Iputs/Outputs/Behavior: # to test Coditio to test # for is # to test: - is # to test: is # to test: + (Or some combiatio) = coditio was false = coditio was true Example of Circuit i operatio Let s test a -bit # to see if it is POSTIVE Let s say ALU outputs: Example I/Out: # to test: Coditio to test # for > N Z P Output of idicates, coditio was false, The # to test was ot positive Example of Circuit i operatio Let s test a -bit # to see if it is ZERO Let s say ALU outputs: Example I/Out: # to test: Coditio to test # for == N Z P Output of idicates, coditio was true, The # to test was ideed equal to 7

8 Example of Circuit i operatio Let s test a -bit # to see if it is POSITIVE (OR) ZERO Let s say ALU outputs: Example I/Out: # to test: Coditio to test # for >= N Z P ENHANCED CPU INSIDE NZP ER Output of idicates, coditio was true, The # to test was POSITIVE (OR) ZERO Implemetig the NZP Compoet: 4 iputs: # to test () -bit iput N, Z, P () -bit iputs Coditio to test for from USER output: -bit output =Coditio from user is FALSE, if TRUE Two iteral parts to the compoet ) Determie if icomig # is Negative/Zero/Positive 2) Compare icomig coditio from user to output of part ) Coditio to test for from USER N Z P # to test Comes from ALU Implemetig the NZP Compoet (Part ): Two iteral parts to the compoet ) Determie if icomig # is Negative/Zero/Positive # to test: (Part ) Determie if # is: -/+/ Ni Zi Pi Output of PART : If # is egative, Ni= If # is zero, Zi= If # is positive, Pi= Oly lie ca be high at a time (Part ) You get to implemet this for HW! 8

9 Implemetig the NZP Compoet (Part 2): Two iteral parts to the compoet ) Determie if icomig # is Negative/Zero/Positive 2) Compare icomig coditio from user to output of part ) # to test: Ex: Coditio to test for from USER N Z P Is (# to test <= )? (Part ) Determie if # is: -/+/ Ni Zi Pi (Part ) You get to implemet this for HW! (Part 2) Compares USER Coditio to output of Part ENHANCED CPU & THE VON NEUMANN MODEL User ased if # was egative Or zero 6- Output idicates it was oe of those two What Else Ca Our CPU Do? Not much We still eed memory 8 -bit words is ot eough to do aythig iterestig Storage space for large data structures Ehaced Processor: Data 2 x -bit Cotrol A R 2 x -bit 2 x -bit Data NZP Next + NZP With Data, we ca ow load register file with data! 9

10 So where is all this headed.. Project 2: Processor Desig Desig a mii processor Datapath ad Cotrol path You will be give a set (subset of a real set) of istructios Desig ALU, Desig datapath Desig cotrol path ad microprogram or FSM to cotrol the executios Test each compoet usig Cedar Logic (or Logisim) Provide a fial paper desig/schematic