QUESTION BANK FOR TEST

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1 CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice Questions choose the most appropriate answer for each of the following: 1. In which of the following gates the output is 1 if and only if at least one input is 1? a. AND b. OR c. NAND d. NOR 2. Which of the following gates would output 1 if and only if both inputs are 1? a. AND gate b. OR gate c. NAND gate d. NOR gate 3. Which of the following gates would output 1 when one input is 1 and the other input is 0? a. OR gate b. AND gate c. NAND gate d. Both (a) and (c) 4. A truth table has 32 rows when complete. The number of input variables that determine the Boolean function of this truth table is a. 4 b. 5 c. 32 d What is the minimum number of two-input NAND gates used to perform the function of a 2- input OR gate? a. One b. Two c. Three d. Four 6. A demultiplexer is used to a. Route data from a single input to one of several outputs b. Route data from a single input to several outputs simultaneously c. Route data from one of multiple inputs to a single output d. Route data from multiple inputs simultaneously to a single output 7. The number of half adders and full adders required to add two 16-bit numbers is a. 8 half adders, 8 full adders b. 1 full adder, 15 half adders c. 1 half adder, 15 full adders d. 16 half adders 8. Which of the following expressions is NOT equivalent to X? a. X NAND X b. X NOR X c. X NAND 1 d. X NOR 1 9. The following is a functionally complete set: a. {AND, OR, NOT} b. {OR, NOT} c. {AND, NOT} d. All of the above 1

2 10. Which of the following gates are added to the two inputs of an OR gate to convert it to a NAND gate? a. NOT b. AND c. OR d. XOR 11. A 64-to-1 multiplexer requires how many select lines? a. 6 b. 8 c. 16 d For the circuit shown for AB = 00, AB = 01, C, S values respectively are a. 0, 0 and 0, 1 b. 0, 0 and 1, 0 c. 0, 1 and 0, 0 d. 1, 0 and 0, The simplified form of the Boolean expression (X + Y + XY) (X + Z) is a. X + Y + Z b. XY + YZ c. X + YZ d. XZ + Y 14. Which of the following evaluations of the Boolean expression (A+B)(A+C) is true? a. (A+B)(A+C) = AC + BC b. (A+B)(A+C) = AB + C c. (A+B)(A+C) = A + BC d. (A+B)(A+C)= AC + B 15. The minimum number of NAND gates required to implement the function A + AB + AB C is a. Zero b. One c. Two d. Three 16. An RS flip-flop has R=0, S=1. Which of the following is true? a. The output Q will change to 0. b. The output Q will change to 1. c. The output Q will remain the same. d. This is a forbidden state. 17. An RS flip-flop has R=1, S=1. Which of the following is true? a. The output Q will change to 0. b. The output Q will change to 1. c. The output Q will remain the same. d. This is a forbidden state. 2

3 Question 2: Express the Boolean function represented by the truth table f(a, b, c) = Σ(0, 3, 5, 6) in the Sum of Products (SOP) and Product of Sums (POS) forms. Implement the function using: a) 2-level AND-OR b) 2-level OR-AND c) 2-level NAND-NAND d) 2-level NOR-NOR (Minimization not required) 3

4 Question 3: Apply DeMorgan s theorems to find the complement of each of the following Boolean expressions. a. (w + y)(w + y ) (w + x + y z ) b. z + z (x w + xy) Question 4: Using the identities of Boolean Algebra, prove that A'B + B'C' + AB + B'C = 1 Show the step-by-step process in the proof and indicate which identity you have used in each step. 4

5 Question 5: Minimize the following Boolean functions using the K-map method. (a) f1 (a, b, c, d) = Σ(0-3, 5,7) (b) f2 (a, b, c, d) = Σ(0-3, 5, 7, 8-11, 13, 15) (c ) f3 (a, b, c, d) = Σ(1, 3, 4, 5, 10, 11, 12, 13, 15) (d) f4 (a, b, c, d) = Σ (5, 7, 13, 15) + φ (0-3, 8-11) (e) f5 (a, b, c, d) = Σ (0,5,10,15) + φ (2,7,8,13) Note: 0-3 means all the minterms 0,1,2,3, and φ represents don t care. 5

6 Question 6: A combinational circuit has four inputs a, b, c and d and one output z. The output is 1 if and only if the number of 1 s in b and c is greater than or equal to the number of 1 s in a and d. For example, if abcd = 0001, then z = 0; if abcd = 1110, then z = 1; if abcd = 0000, then z = 1, and so on Write the truth table for z Minimize the expression for z using the K-map method Implement the circuit using a 2-level NAND-NAND logic (you need to draw the NOT gates). 6

7 Question 7: Using smaller multiplexers as building blocks, construct a 32-1 MUX. You may use any number and any combination of smaller multiplexers (2-1, 4-1, 8-1, and/or 16-1 MUXes). Question 8: A ROM has 4 memory locations and has the following content stored in its 4 locations as shown in the table below. Design the ROM as a combinational circuit using any building block as appropriate. Address Content

8 Question 9: Trace the Boolean function implemented by each of the following circuits. Minimization is not required but apply DeMorgan s theorem wherever you get the complement of a sum term or a product term. Question 10: Express the output of this circuit in the Sum of Products form. (Do not attempt minimization it is futile!) 8

Chapter 3. Gate-Level Minimization. Outlines

Chapter 3. Gate-Level Minimization. Outlines Chapter 3 Gate-Level Minimization Introduction The Map Method Four-Variable Map Five-Variable Map Outlines Product of Sums Simplification Don t-care Conditions NAND and NOR Implementation Other Two-Level