Solutions - Homework 2 (Due date: February 5 5:30 pm) Presentation and clarity are very important! Show your procedure!

Size: px
Start display at page:

Download "Solutions - Homework 2 (Due date: February 5 5:30 pm) Presentation and clarity are very important! Show your procedure!"

Transcription

1 Solutions - Homework (Due date: Februar 5 5: pm) Presentation and clarit are ver important! Show our procedure! PROBLEM ( PTS) In these problems, ou MUST show our conversion procedure. a) Convert the following decimal numbers to their s complement representations: binar and headecimal. (6 pts) -9.5, , , = =. = E76.B =. = 5.A = =. = F7F.7E -.5 =. -.5 =. = E.C b) Complete the following table. The decimal numbers are unsigned: (8 pts.) Decimal BCD Binar Reflective Gra Code c) Complete the following table. Use the fewest number of bits in each case: (6 pts.) REPRESENTATION Decimal Sign-and-magnitude 's complement 's complement PROBLEM (5 PTS) a) What is the minimum number of bits required to represent: ( pts), smbols? Numbers between 5, and 4,9? log = 7 log ( ) = log 89 = 4 b) A microprocessor has a -bit address line. The sie of the memor contents of each address is 8 bits. The memor space is defined as the collection of memor positions the processor can address. (5 pts) - What is the address range (lowest to highest, in headecimal) of the memor space for this microprocessor? What is the sie (in btes, KB, or MB) of the memor space? KB = btes, MB = btes, GB = btes Address range: to FFFFFFFF. With bits, we can address btes, thus we have = 4 GB of address space - A memor device is connected to the microprocessor. Based on the sie of the memor, the microprocessor has assigned the addresses BC to BFFFFFF to this memor device. What is the sie (in btes, KB, or MB) of this memor device? What is the minimum number of bits required to represent the addresses onl for this memor device? As per the figure below, we onl need bits for the addresses in the given range. Thus, the sie of the memor device is = 4MB. Address : BC : BC : BFFFFFF 8 bits Instructor: Daniel Llamocca

2 b 8 = b 7 = b 6 = b 5 = b 4 = b = b = b = c 9 = c 8 = c 4 = b 8 = b 7 = b 6 = b 5 = b 4 = b = b = b = c 6 = c 5 = b 8 = b 7 = b 6 = b 5 = b 4 = b = b = b = c) The figure below depicts the entire memor space of a microprocessor. Each memor address occupies one bte. (8 pts) - What is the sie (in btes, KB, or MB) of the memor space? What is the address bus sie of the microprocessor? Address sie: to FFFFFF. To represent all these addresses, we require 4 bits. So, the address bus sie of the microprocessor is 4 bits. The sie of the memor space is then 4 = 6 MB. - If we have a memor chip of MB, how man bits do we require to address MB of memor? MB memor device: MB = = btes. Thus, we require bits to address the memor device. - We want to connect the MB memor chip to the microprocessor. Provide an address range so that MB of memor is properl addressed. You can onl use the non-occupied portions of the memor space as shown in the figure below. MB of memor require bits. The -bit address range would be from to FFFFF. Within the entire 4- bit memor space, there are four options to place those MB in the figure. In particular, we picked the address range from 4 to 5FFFFF. FFFFFF C 7FFFFF 5FFFFF 6 4 FFFFF 8 bits PROBLEM ( PTS) a) Perform the following additions and subtractions of the following unsigned integers. Use the fewest number of bits n to represent both operators. Indicate ever carr (or borrow) from c to c n (or b to b n). For the addition, determine whether there is an overflow. For the subtraction, determine whether we need to keep borrowing from a higher bte. (8 pts) Eample (n=8): Borrow out! 54 = 6 = + = D = 77 = 4D = - 94 = C = = F = + 7 = 89 = 48 = 98 = Borrow out! 4 = B = - 97 = 6 = CA = = 6F = + 75 = 4B = No Borrow Out 8 = 8 = - 4 = B = 85 = 55 = Instructor: Daniel Llamocca

3 c = c= c8= c 6 = c5= c4= c = c= c5= c= c = c6= c 5 = c 4 = c= c = c6= c4= c= c8= c5= c= c= c6= c= c= b) We need to perform the following operations, where numbers are represented in 's complement: (6 pts) For each case: Determine the minimum number of bits required to represent both summands. You might need to sign-etend one of the summands, since for proper summation, both summands must have the same number of bits. Perform the binar addition in s complement arithmetic. The result must have the same number of bits as the summands. Determine whether there is overflow b: i. Using c n, c n (carries). ii. Performing the operation in the decimal sstem and checking whether the result is within the allowed range for n bits, where n is the minimum number of bits for the summands. If we want to avoid overflow, what is the minimum number of bits required to represent both the summands and the result? n = bits n = 8 bits c c 9 = -97 = + 56 = 59 = = 59 [- 9, 9 -] no overflow n = bits c 8 99 = + -6 = 7 = 99-6 = 7 [- 7, 7 -] no overflow n = 8 bits c 4 = + 67 = c 8-7 = + -7 = 4+67 = [-, -] overflow! -7-7 = -64 [- 7, 7 -] overflow! To avoid overflow: n = bits (sign-etension) c c = 4 = + 67 = = 4+67 = [-, -] no overflow To avoid overflow: n = 9 bits (sign-etension) c 9 c 8 = -7 = + -7 = -64 = -7-7 = -64 [- 8, 8 -] no overflow c) Get the multiplication results of the following numbers that are represented in s complement arithmetic with 4 bits. (6 pts),,. Instructor: Daniel Llamocca

4 PROBLEM 4 (5 PTS) In these problems, ou can use full adders and logic gates. Make sure our circuit works for all cases. If there is overflow, design our circuit so that the final answer is alwas the correct one with the correct number of bits. a) Given two 4-bit numbers provided in gra code, sketch the circuit that computes the summation of the unsigned decimal numbers these gra codes represent. a a a a b b b b a b a b a b a b c 4 c c c c s 4 s s s s b) Given two 4-bit signed ( s complement) numbers A, B, sketch the circuit that computes (A B) 4. a b a b a b a b a b c 5 c 4 c c c c r 4 r r r r PROBLEM 5 ( PTS) s 6 s 5 s 4 s s s s a) Implement the following functions using i) decoders (and OR gates) and ii) multipleers: (5 pts) F a = Y + Z + XY F b = X Y Z w w w s = s = w w w w w w Instructor: Daniel Llamocca

5 b) Using onl a 4-to- MUX, implement the following functions. (5 pts) F a (X, Y, Z) = (m, m, m 4, m 6 ) F b (X, Y, Z) = (M, M 4, M 5, M 6 ) c) Complete the timing diagram of the circuit shown below: ( pts) s = s = w E DECODER k w E P P Unknown s s P P P P P PRIORITY ENCODER f P k f 5 Instructor: Daniel Llamocca

Solutions - Homework 2 (Due date: October 4 5:30 pm) Presentation and clarity are very important! Show your procedure!

Solutions - Homework 2 (Due date: October 4 5:30 pm) Presentation and clarity are very important! Show your procedure! Solutions - Homework 2 (Due date: October 4 th @ 5:30 pm) Presentation and clarity are very important! Show your procedure! PROBLEM 1 (28 PTS) a) What is the minimum number of bits required to represent:

More information

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING, THE UNIVERSITY OF NEW MEXICO ECE-238L: Computer Logic Design Fall 2013.

DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING, THE UNIVERSITY OF NEW MEXICO ECE-238L: Computer Logic Design Fall 2013. ECE-8L: Computer Logic Design Fall Notes - Chapter BINARY NUMBER CONVERSIONS DECIMAL NUMBER SYSTEM A decimal digit can take values from to 9: Digit-b-digit representation of a positive integer number (powers

More information

Solutions - Homework 2 (Due date: October 9:30 am) Presentation and clarity are very important!

Solutions - Homework 2 (Due date: October 9:30 am) Presentation and clarity are very important! ECE-8L: Computer Logic Design Fall Solutions - Homework (Due date: October rd @ 9: am) Presentation and clarit are ver important! PROBLEM ( PTS) Complete the following table. Use the fewest number of bits

More information

ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT, OAKLAND UNIVERSITY ECE-278: Digital Logic Design Fall Notes - Unit 4. hundreds.

ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT, OAKLAND UNIVERSITY ECE-278: Digital Logic Design Fall Notes - Unit 4. hundreds. ECE-78: Digital Logic Design Fall 6 UNSIGNED INTEGER NUMBERS Notes - Unit 4 DECIMAL NUMBER SYSTEM A decimal digit can take values from to 9: Digit-by-digit representation of a positive integer number (powers

More information

ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT, OAKLAND UNIVERSITY ECE-2700: Digital Logic Design Winter Notes - Unit 4. hundreds.

ELECTRICAL AND COMPUTER ENGINEERING DEPARTMENT, OAKLAND UNIVERSITY ECE-2700: Digital Logic Design Winter Notes - Unit 4. hundreds. UNSIGNED INTEGER NUMBERS Notes - Unit 4 DECIMAL NUMBER SYSTEM A decimal digit can take values from to 9: Digit-by-digit representation of a positive integer number (powers of ): DIGIT 3 4 5 6 7 8 9 Number:

More information

ECE 2020B Fundamentals of Digital Design Spring problems, 6 pages Exam Two Solutions 26 February 2014

ECE 2020B Fundamentals of Digital Design Spring problems, 6 pages Exam Two Solutions 26 February 2014 Problem 1 (4 parts, 21 points) Encoders and Pass Gates Part A (8 points) Suppose the circuit below has the following input priority: I 1 > I 3 > I 0 > I 2. Complete the truth table by filling in the input

More information

ECE 2020B Fundamentals of Digital Design Spring problems, 6 pages Exam Two 26 February 2014

ECE 2020B Fundamentals of Digital Design Spring problems, 6 pages Exam Two 26 February 2014 Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate

More information

Digital Arithmetic. Digital Arithmetic: Operations and Circuits Dr. Farahmand

Digital Arithmetic. Digital Arithmetic: Operations and Circuits Dr. Farahmand Digital Arithmetic Digital Arithmetic: Operations and Circuits Dr. Farahmand Binary Arithmetic Digital circuits are frequently used for arithmetic operations Fundamental arithmetic operations on binary

More information

Chapter 4. Combinational Logic

Chapter 4. Combinational Logic Chapter 4. Combinational Logic Tong In Oh 1 4.1 Introduction Combinational logic: Logic gates Output determined from only the present combination of inputs Specified by a set of Boolean functions Sequential

More information

Optional: Building a processor from scratch

Optional: Building a processor from scratch Optional: Building a processor from scratch In this assignment we are going build a computer processor from the ground up, starting with transistors, and ending with a small but powerful processor. The

More information

ECE 2030D Computer Engineering Spring problems, 5 pages Exam Two 8 March 2012

ECE 2030D Computer Engineering Spring problems, 5 pages Exam Two 8 March 2012 Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate

More information

Lecture 10: Combinational Circuits

Lecture 10: Combinational Circuits Computer Architecture Lecture : Combinational Circuits Previous two lectures.! TOY machine. Net two lectures.! Digital circuits. George Boole (85 864) Claude Shannon (96 2) Culminating lecture.! Putting

More information

Chapter 10 Binary Arithmetics

Chapter 10 Binary Arithmetics 27..27 Chapter Binary Arithmetics Dr.-Ing. Stefan Werner Table of content Chapter : Switching Algebra Chapter 2: Logical Levels, Timing & Delays Chapter 3: Karnaugh-Veitch-Maps Chapter 4: Combinational

More information

Logic Circuits I ECE 1411 Thursday 4:45pm-7:20pm. Nathan Pihlstrom.

Logic Circuits I ECE 1411 Thursday 4:45pm-7:20pm. Nathan Pihlstrom. Logic Circuits I ECE 1411 Thursday 4:45pm-7:20pm Nathan Pihlstrom www.uccs.edu/~npihlstr My Background B.S.E.E. from Colorado State University M.S.E.E. from Colorado State University M.B.A. from UCCS Ford

More information

Advanced Computer Architecture-CS501

Advanced Computer Architecture-CS501 Advanced Computer Architecture Lecture No. 34 Reading Material Vincent P. Heuring & Harry F. Jordan Chapter 6 Computer Systems Design and Architecture 6.1, 6.2 Summary Introduction to ALSU Radix Conversion

More information

Lecture 2: Number Systems

Lecture 2: Number Systems Lecture 2: Number Systems Syed M. Mahmud, Ph.D ECE Department Wayne State University Original Source: Prof. Russell Tessier of University of Massachusetts Aby George of Wayne State University Contents

More information

Binary Addition. Add the binary numbers and and show the equivalent decimal addition.

Binary Addition. Add the binary numbers and and show the equivalent decimal addition. Binary Addition The rules for binary addition are 0 + 0 = 0 Sum = 0, carry = 0 0 + 1 = 0 Sum = 1, carry = 0 1 + 0 = 0 Sum = 1, carry = 0 1 + 1 = 10 Sum = 0, carry = 1 When an input carry = 1 due to a previous

More information

UNIT II - COMBINATIONAL LOGIC Part A 2 Marks. 1. Define Combinational circuit A combinational circuit consist of logic gates whose outputs at anytime are determined directly from the present combination

More information

Number System. Introduction. Decimal Numbers

Number System. Introduction. Decimal Numbers Number System Introduction Number systems provide the basis for all operations in information processing systems. In a number system the information is divided into a group of symbols; for example, 26

More information

Department of Electrical and Computer Engineering University of Wisconsin - Madison. ECE/CS 352 Digital System Fundamentals.

Department of Electrical and Computer Engineering University of Wisconsin - Madison. ECE/CS 352 Digital System Fundamentals. Department of Electrical and Computer Engineering University of Wisconsin - Madison ECE/C 352 Digital ystem Fundamentals Quiz #2 Thursday, March 7, 22, 7:15--8:3PM 1. (15 points) (a) (5 points) NAND, NOR

More information

Basic Definition INTEGER DATA. Unsigned Binary and Binary-Coded Decimal. BCD: Binary-Coded Decimal

Basic Definition INTEGER DATA. Unsigned Binary and Binary-Coded Decimal. BCD: Binary-Coded Decimal Basic Definition REPRESENTING INTEGER DATA Englander Ch. 4 An integer is a number which has no fractional part. Examples: -2022-213 0 1 514 323434565232 Unsigned and -Coded Decimal BCD: -Coded Decimal

More information

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010

ECE 2030B 1:00pm Computer Engineering Spring problems, 5 pages Exam Two 10 March 2010 Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate

More information

Decimal & Binary Representation Systems. Decimal & Binary Representation Systems

Decimal & Binary Representation Systems. Decimal & Binary Representation Systems Decimal & Binary Representation Systems Decimal & binary are positional representation systems each position has a value: d*base i for example: 321 10 = 3*10 2 + 2*10 1 + 1*10 0 for example: 101000001

More information

EE 109L Review. Name: Solutions

EE 109L Review. Name: Solutions EE 9L Review Name: Solutions Closed Book / Score:. Short Answer (6 pts.) a. Storing temporary values in (memory / registers) is preferred due to the (increased / decreased) access time. b. True / False:

More information

EE292: Fundamentals of ECE

EE292: Fundamentals of ECE EE292: Fundamentals of ECE Fall 2012 TTh 10:00-11:15 SEB 1242 Lecture 22 121115 http://www.ee.unlv.edu/~b1morris/ee292/ 2 Outline Review Binary Number Representation Binary Arithmetic Combinatorial Logic

More information

24 Nov Boolean Operations. Boolean Algebra. Boolean Functions and Expressions. Boolean Functions and Expressions

24 Nov Boolean Operations. Boolean Algebra. Boolean Functions and Expressions. Boolean Functions and Expressions 24 Nov 25 Boolean Algebra Boolean algebra provides the operations and the rules for working with the set {, }. These are the rules that underlie electronic circuits, and the methods we will discuss are

More information

CHW 261: Logic Design

CHW 261: Logic Design CHW 261: Logic Design Instructors: Prof. Hala Zayed Dr. Ahmed Shalaby http://www.bu.edu.eg/staff/halazayed14 http://bu.edu.eg/staff/ahmedshalaby14# Slide 1 Slide 2 Slide 3 Digital Fundamentals CHAPTER

More information

Chapter 1 Microprocessor architecture ECE 3120 Dr. Mohamed Mahmoud http://iweb.tntech.edu/mmahmoud/ mmahmoud@tntech.edu Outline 1.1 Computer hardware organization 1.1.1 Number System 1.1.2 Computer hardware

More information

Arithmetic Logic Unit (ALU)

Arithmetic Logic Unit (ALU) Arithmetic Logic Unit (ALU) Introduction to Computer Yung-Yu Chuang with slides by Sedgewick & Wayne (introcs.cs.princeton.edu), Nisan & Schocken (www.nand2tetris.org) and Harris & Harris (DDCA) Let's

More information

Chapter Three. Digital Components

Chapter Three. Digital Components Chapter Three 3.1. Combinational Circuit A combinational circuit is a connected arrangement of logic gates with a set of inputs and outputs. The binary values of the outputs are a function of the binary

More information

Introduction to Computer Science. Homework 1

Introduction to Computer Science. Homework 1 Introduction to Computer Science Homework. In each circuit below, the rectangles represent the same type of gate. Based on the input and output information given, identify whether the gate involved is

More information

R a) Simplify the logic functions from binary to seven segment display code converter (8M) b) Simplify the following using Tabular method

R a) Simplify the logic functions from binary to seven segment display code converter (8M) b) Simplify the following using Tabular method SET - 1 1. a) Convert the decimal number 250.5 to base 3, base 4 b) Write and prove de-morgan laws c) Implement two input EX-OR gate from 2 to 1 multiplexer (3M) d) Write the demerits of PROM (3M) e) What

More information

Binary Codes. Dr. Mudathir A. Fagiri

Binary Codes. Dr. Mudathir A. Fagiri Binary Codes Dr. Mudathir A. Fagiri Binary System The following are some of the technical terms used in binary system: Bit: It is the smallest unit of information used in a computer system. It can either

More information

ECE 331: N0. Professor Andrew Mason Michigan State University. Opening Remarks

ECE 331: N0. Professor Andrew Mason Michigan State University. Opening Remarks ECE 331: N0 ECE230 Review Professor Andrew Mason Michigan State University Spring 2013 1.1 Announcements Opening Remarks HW1 due next Mon Labs begin in week 4 No class next-next Mon MLK Day ECE230 Review

More information

COMBINATIONAL LOGIC CIRCUITS

COMBINATIONAL LOGIC CIRCUITS COMBINATIONAL LOGIC CIRCUITS 4.1 INTRODUCTION The digital system consists of two types of circuits, namely: (i) Combinational circuits and (ii) Sequential circuits A combinational circuit consists of logic

More information

DIGITAL LOGIC WITH VHDL (Fall 2013) Unit 4

DIGITAL LOGIC WITH VHDL (Fall 2013) Unit 4 DIGITAL LOGIC WITH VHDL (Fall 2013) Unit 4 Integer DATA TYPE STRUCTURAL DESCRIPTION Hierarchical deign: port-map, for-generate, ifgenerate. Eample: Adder, comparator, multiplier, Look-up Table, Barrel

More information

World Inside a Computer is Binary

World Inside a Computer is Binary C Programming 1 Representation of int data World Inside a Computer is Binary C Programming 2 Decimal Number System Basic symbols: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Radix-10 positional number system. The radix

More information

Wednesday, February 19, 2014

Wednesday, February 19, 2014 Wednesda, Februar 19, 2014 Topics for toda Solutions to HW #2 Topics for Eam #1 Chapter 6: Mapping High-level to assembl-level The Pep/8 run-time stack Stack-relative addressing (,s) SP manipulation Stack

More information

6: Combinational Circuits

6: Combinational Circuits Computer Architecture 6: Combinational Circuits Previous two lectures. von Neumann machine. This lectures. Boolean circuits. Later in the course. Putting it all together and building a TOY machine. George

More information

PART A (22 Marks) 2. a) Briefly write about r's complement and (r-1)'s complement. [8] b) Explain any two ways of adding decimal numbers.

PART A (22 Marks) 2. a) Briefly write about r's complement and (r-1)'s complement. [8] b) Explain any two ways of adding decimal numbers. Set No. 1 IV B.Tech I Semester Supplementary Examinations, March - 2017 COMPUTER ARCHITECTURE & ORGANIZATION (Common to Electronics & Communication Engineering and Electronics & Time: 3 hours Max. Marks:

More information

SE311: Design of Digital Systems

SE311: Design of Digital Systems SE311: Design of Digital Systems Lecture 3: Complements and Binary arithmetic Dr. Samir Al-Amer (Term 041) SE311_Lec3 (c) 2004 AL-AMER ١ Outlines Complements Signed Numbers Representations Arithmetic Binary

More information

BINARY SYSTEM. Binary system is used in digital systems because it is:

BINARY SYSTEM. Binary system is used in digital systems because it is: CHAPTER 2 CHAPTER CONTENTS 2.1 Binary System 2.2 Binary Arithmetic Operation 2.3 Signed & Unsigned Numbers 2.4 Arithmetic Operations of Signed Numbers 2.5 Hexadecimal Number System 2.6 Octal Number System

More information

8/27/2016. ECE 120: Introduction to Computing. Graphical Illustration of Modular Arithmetic. Representations Must be Unambiguous

8/27/2016. ECE 120: Introduction to Computing. Graphical Illustration of Modular Arithmetic. Representations Must be Unambiguous University of Illinois at Urbana-Champaign Dept. of Electrical and Computer Engineering ECE 120: Introduction to Computing Signed Integers and 2 s Complement Strategy: Use Common Hardware for Two Representations

More information

Combinational Circuits

Combinational Circuits Combinational Circuits Combinational circuit consists of an interconnection of logic gates They react to their inputs and produce their outputs by transforming binary information n input binary variables

More information

Real Digital Problem Set #6

Real Digital Problem Set #6 Real igital Problem et #6. (2 points) ketch a block diagram for a magnitude comparator bit-slice circuit. Create K-maps to define the bit-slice circuit, and use them to find optimal logic equations. ketch

More information

Chapter 1. Digital Systems and Binary Numbers

Chapter 1. Digital Systems and Binary Numbers Chapter 1. Digital Systems and Binary Numbers Tong In Oh 1 1.1 Digital Systems Digital age Characteristic of digital system Generality and flexibility Represent and manipulate discrete elements of information

More information

VON NEUMANN ARCHITECTURE. VON NEUMANN ARCHITECTURE IB DP Computer science Standard Level ICS3U

VON NEUMANN ARCHITECTURE. VON NEUMANN ARCHITECTURE IB DP Computer science Standard Level ICS3U C A N A D I A N I N T E R N A T I O N A L S C H O O L O F H O N G K O N G 5.3 Putting all the Units Together the Von Neumann Architecture 5.4 s Von Neumann Architecture the four components that make up

More information

Chapter 2 Number System

Chapter 2 Number System Chapter 2 Number System Embedded Systems with ARM Cortext-M Updated: Tuesday, January 16, 2018 What you should know.. Before coming to this class Decimal Binary Octal Hex 0 0000 00 0x0 1 0001 01 0x1 2

More information

Chap.3 3. Chap reduces the complexity required to represent the schematic diagram of a circuit Library

Chap.3 3. Chap reduces the complexity required to represent the schematic diagram of a circuit Library 3.1 Combinational Circuits 2 Chap 3. logic circuits for digital systems: combinational vs sequential Combinational Logic Design Combinational Circuit (Chap 3) outputs are determined by the present applied

More information

Revision: August 31, E Main Suite D Pullman, WA (509) Voice and Fax

Revision: August 31, E Main Suite D Pullman, WA (509) Voice and Fax Exercise 7: Combinational rithmetic Circuits Revision: ugust 3, 29 25 E Main uite D Pullman, W 9963 (59) 334 636 Voice and Fax TUDENT I am submitting my own work, and I understand penalties will be assessed

More information

Binary Adders: Half Adders and Full Adders

Binary Adders: Half Adders and Full Adders Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order

More information

Korea University of Technology and Education

Korea University of Technology and Education MEC52 디지털공학 Binary Systems Jee-Hwan Ryu School of Mechanical Engineering Binary Numbers a 5 a 4 a 3 a 2 a a.a - a -2 a -3 base or radix = a n r n a n- r n-...a 2 r 2 a ra a - r - a -2 r -2...a -m r -m

More information

Number Systems. Both numbers are positive

Number Systems. Both numbers are positive Number Systems Range of Numbers and Overflow When arithmetic operation such as Addition, Subtraction, Multiplication and Division are performed on numbers the results generated may exceed the range of

More information

Data Representation COE 301. Computer Organization Prof. Muhamed Mudawar

Data Representation COE 301. Computer Organization Prof. Muhamed Mudawar Data Representation COE 30 Computer Organization Prof. Muhamed Mudawar College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals Presentation Outline Positional Number

More information

Course overview. Computer Organization and Assembly Languages Yung-Yu Chuang 2006/09/18. with slides by Kip Irvine

Course overview. Computer Organization and Assembly Languages Yung-Yu Chuang 2006/09/18. with slides by Kip Irvine Course overview Computer Organization and Assembly Languages Yung-Yu Chuang 2006/09/18 with slides by Kip Irvine Logistics Meeting time: 9:10am-12:10pm, Monday Classroom: CSIE Room 102 Instructor: Yung-Yu

More information

Number Systems and Conversions UNIT 1 NUMBER SYSTEMS & CONVERSIONS. Number Systems (2/2) Number Systems (1/2) Iris Hui-Ru Jiang Spring 2010

Number Systems and Conversions UNIT 1 NUMBER SYSTEMS & CONVERSIONS. Number Systems (2/2) Number Systems (1/2) Iris Hui-Ru Jiang Spring 2010 Contents Number systems and conversion Binary arithmetic Representation of negative numbers Addition of two s complement numbers Addition of one s complement numbers Binary s Readings Unit.~. UNIT NUMBER

More information

BUILDING BLOCKS OF A BASIC MICROPROCESSOR. Part 1 PowerPoint Format of Lecture 3 of Book

BUILDING BLOCKS OF A BASIC MICROPROCESSOR. Part 1 PowerPoint Format of Lecture 3 of Book BUILDING BLOCKS OF A BASIC MICROPROCESSOR Part PowerPoint Format of Lecture 3 of Book Decoder Tri-state device Full adder, full subtractor Arithmetic Logic Unit (ALU) Memories Example showing how to write

More information

Arithmetic Logic Unit

Arithmetic Logic Unit Arithmetic Logic Unit A.R. Hurson Department of Computer Science Missouri University of Science & Technology A.R. Hurson 1 Arithmetic Logic Unit It is a functional bo designed to perform "basic" arithmetic,

More information

Chapter 4: The Building Blocks: Binary Numbers, Boolean Logic, and Gates. Invitation to Computer Science, C++ Version, Third Edition

Chapter 4: The Building Blocks: Binary Numbers, Boolean Logic, and Gates. Invitation to Computer Science, C++ Version, Third Edition Chapter 4: The Building Blocks: Binary Numbers, Boolean Logic, and Gates Invitation to Computer Science, C++ Version, Third Edition Objectives In this chapter, you will learn about: The binary numbering

More information

Combinational Circuit Design

Combinational Circuit Design Modeling Combinational Circuits with Verilog Prof. Chien-Nan Liu TEL: 3-42275 ext:34534 Email: jimmy@ee.ncu.edu.tw 3- Combinational Circuit Design Outputs are functions of inputs inputs Combinational Circuit

More information

Number Systems Base r

Number Systems Base r King Fahd University of Petroleum & Minerals Computer Engineering Dept COE 2 Fundamentals of Computer Engineering Term 22 Dr. Ashraf S. Hasan Mahmoud Rm 22-44 Ext. 724 Email: ashraf@ccse.kfupm.edu.sa 3/7/23

More information

Final Exam Solution Sunday, December 15, 10:05-12:05 PM

Final Exam Solution Sunday, December 15, 10:05-12:05 PM Last (family) name: First (given) name: Student I.D. #: Circle section: Kim Hu Department of Electrical and Computer Engineering University of Wisconsin - Madison ECE/CS 352 Digital System Fundamentals

More information

Topics. FPGA Design EECE 277. Number Representation and Adders. Class Exercise. Laboratory Assignment #2

Topics. FPGA Design EECE 277. Number Representation and Adders. Class Exercise. Laboratory Assignment #2 FPGA Deign EECE 277 Number Repreentation and Adder Dr. William H. Robinon Februar 2, 25 Topi There are kind of people in the world, thoe that undertand binar and thoe that don't. Unknown Adminitrative

More information

CS/EE1012 INTRODUCTION TO COMPUTER ENGINEERING SPRING 2013 HOMEWORK I. Solve all homework and exam problems as shown in class and sample solutions

CS/EE1012 INTRODUCTION TO COMPUTER ENGINEERING SPRING 2013 HOMEWORK I. Solve all homework and exam problems as shown in class and sample solutions CS/EE2 INTRODUCTION TO COMPUTER ENGINEERING SPRING 23 DUE : February 22, 23 HOMEWORK I READ : Related portions of the following chapters : È Chapter È Chapter 2 È Appendix E ASSIGNMENT : There are eight

More information

ECE 550D Fundamentals of Computer Systems and Engineering. Fall 2017

ECE 550D Fundamentals of Computer Systems and Engineering. Fall 2017 ECE 550D Fundamentals of Computer Systems and Engineering Fall 2017 Combinational Logic Prof. John Board Duke University Slides are derived from work by Profs. Tyler Bletsch and Andrew Hilton (Duke) Last

More information

COMPUTER ORGANIZATION AND ARCHITECTURE

COMPUTER ORGANIZATION AND ARCHITECTURE Page 1 1. Which register store the address of next instruction to be executed? A) PC B) AC C) SP D) NONE 2. How many bits are required to address the 128 words of memory? A) 7 B) 8 C) 9 D) NONE 3. is the

More information

Lecture 6: Signed Numbers & Arithmetic Circuits. BCD (Binary Coded Decimal) Points Addressed in this Lecture

Lecture 6: Signed Numbers & Arithmetic Circuits. BCD (Binary Coded Decimal) Points Addressed in this Lecture Points ddressed in this Lecture Lecture 6: Signed Numbers rithmetic Circuits Professor Peter Cheung Department of EEE, Imperial College London (Floyd 2.5-2.7, 6.1-6.7) (Tocci 6.1-6.11, 9.1-9.2, 9.4) Representing

More information

ECE2049: Homework 1. Consider the following code to compute the average of your exam grades: #define NUM_EXAMS (3)

ECE2049: Homework 1. Consider the following code to compute the average of your exam grades: #define NUM_EXAMS (3) Due: Thursday, 26 May 2016 by 5pm Submission notes: For full credit, please show your work and denote your answers with a circle or a box. Always write and draw your diagrams neatly! We cannot be expected

More information

END-TERM EXAMINATION

END-TERM EXAMINATION (Please Write your Exam Roll No. immediately) END-TERM EXAMINATION DECEMBER 2006 Exam. Roll No... Exam Series code: 100919DEC06200963 Paper Code: MCA-103 Subject: Digital Electronics Time: 3 Hours Maximum

More information

Chapter 3: part 3 Binary Subtraction

Chapter 3: part 3 Binary Subtraction Chapter 3: part 3 Binary Subtraction Iterative combinational circuits Binary adders Half and full adders Ripple carry and carry lookahead adders Binary subtraction Binary adder-subtractors Signed binary

More information

A complement number system is used to represent positive and negative integers. A complement number system is based on a fixed length representation

A complement number system is used to represent positive and negative integers. A complement number system is based on a fixed length representation Complement Number Systems A complement number system is used to represent positive and negative integers A complement number system is based on a fixed length representation of numbers Pretend that integers

More information

DLD VIDYA SAGAR P. potharajuvidyasagar.wordpress.com. Vignana Bharathi Institute of Technology UNIT 3 DLD P VIDYA SAGAR

DLD VIDYA SAGAR P. potharajuvidyasagar.wordpress.com. Vignana Bharathi Institute of Technology UNIT 3 DLD P VIDYA SAGAR DLD UNIT III Combinational Circuits (CC), Analysis procedure, Design Procedure, Combinational circuit for different code converters and other problems, Binary Adder- Subtractor, Decimal Adder, Binary Multiplier,

More information

ECE 341 Midterm Exam

ECE 341 Midterm Exam ECE 341 Midterm Exam Time allowed: 75 minutes Total Points: 75 Points Scored: Name: Problem No. 1 (8 points) For each of the following statements, indicate whether the statement is TRUE or FALSE: (a) A

More information

Number Systems. Readings: , Problem: Implement simple pocket calculator Need: Display, adders & subtractors, inputs

Number Systems. Readings: , Problem: Implement simple pocket calculator Need: Display, adders & subtractors, inputs Number Systems Readings: 3-3.3.3, 3.3.5 Problem: Implement simple pocket calculator Need: Display, adders & subtractors, inputs Display: Seven segment displays Inputs: Switches Missing: Way to implement

More information

SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road QUESTION BANK (DESCRIPTIVE)

SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road QUESTION BANK (DESCRIPTIVE) SIDDHARTH GROUP OF INSTITUTIONS :: PUTTUR Siddharth Nagar, Narayanavanam Road 517583 QUESTION BANK (DESCRIPTIVE) Subject with Code : STLD(16EC402) Year & Sem: II-B.Tech & I-Sem Course & Branch: B.Tech

More information

Part 2,Number Systems Questions

Part 2,Number Systems Questions Part 2,Number Systems Questions This study guide is provided as an aid in helping you to study for the ECE Department s 18-240, Fundamentals of Computer Engineering. The guide is a collection of previous

More information

Scheme G. Sample Test Paper-I

Scheme G. Sample Test Paper-I Sample Test Paper-I Marks : 25 Times:1 Hour 1. All questions are compulsory. 2. Illustrate your answers with neat sketches wherever necessary. 3. Figures to the right indicate full marks. 4. Assume suitable

More information

EE 109L Final Review

EE 109L Final Review EE 09L Final Review Name: Closed Book / Score:. Short Answer (6 pts.) a. Storing temporary values in (memory / registers) is preferred due to the (increased / decreased) access time. b. True / False: A

More information

Hybrid Electronics Laboratory

Hybrid Electronics Laboratory Hybrid Electronics Laboratory Design and Simulation of Various Code Converters Aim: To Design and Simulate Binary to Gray, Gray to Binary, BCD to Excess 3, Excess 3 to BCD code converters. Objectives:

More information

CO Computer Architecture and Programming Languages CAPL. Lecture 9

CO Computer Architecture and Programming Languages CAPL. Lecture 9 CO20-320241 Computer Architecture and Programming Languages CAPL Lecture 9 Dr. Kinga Lipskoch Fall 2017 A Four-bit Number Circle CAPL Fall 2017 2 / 38 Functional Parts of an ALU CAPL Fall 2017 3 / 38 Addition

More information

Chapter 1. Microprocessor architecture ECE Dr. Mohamed Mahmoud.

Chapter 1. Microprocessor architecture ECE Dr. Mohamed Mahmoud. Chapter 1 Microprocessor architecture ECE 3130 Dr. Mohamed Mahmoud The slides are copyright protected. It is not permissible to use them without a permission from Dr Mahmoud http://www.cae.tntech.edu/~mmahmoud/

More information

Number Systems Standard positional representation of numbers: An unsigned number with whole and fraction portions is represented as:

Number Systems Standard positional representation of numbers: An unsigned number with whole and fraction portions is represented as: N Number Systems Standard positional representation of numbers: An unsigned number with whole and fraction portions is represented as: a n a a a The value of this number is given by: = a n Ka a a a a a

More information

Information Science 1

Information Science 1 Week 01 self-preparation assignments I. Why is this course ( Information Science ) taught in English? Write three most important, in your opinion, reasons: 1. Most computer science jobs in any country,

More information

1010 2?= ?= CS 64 Lecture 2 Data Representation. Decimal Numbers: Base 10. Reading: FLD Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9

1010 2?= ?= CS 64 Lecture 2 Data Representation. Decimal Numbers: Base 10. Reading: FLD Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 CS 64 Lecture 2 Data Representation Reading: FLD 1.2-1.4 Decimal Numbers: Base 10 Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Example: 3271 = (3x10 3 ) + (2x10 2 ) + (7x10 1 ) + (1x10 0 ) 1010 10?= 1010 2?= 1

More information

Binary Arithmetic. Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T.

Binary Arithmetic. Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T. Binary Arithmetic Daniel Sanchez Computer Science & Artificial Intelligence Lab M.I.T. MIT 6.004 Fall 2018 Reminder: Encoding Positive Integers Bit i in a binary representation (in right-to-left order)

More information

Principles of Computer Architecture. Chapter 3: Arithmetic

Principles of Computer Architecture. Chapter 3: Arithmetic 3-1 Chapter 3 - Arithmetic Principles of Computer Architecture Miles Murdocca and Vincent Heuring Chapter 3: Arithmetic 3-2 Chapter 3 - Arithmetic 3.1 Overview Chapter Contents 3.2 Fixed Point Addition

More information

9/3/2015. Data Representation II. 2.4 Signed Integer Representation. 2.4 Signed Integer Representation

9/3/2015. Data Representation II. 2.4 Signed Integer Representation. 2.4 Signed Integer Representation Data Representation II CMSC 313 Sections 01, 02 The conversions we have so far presented have involved only unsigned numbers. To represent signed integers, computer systems allocate the high-order bit

More information

IT 1204 Section 2.0. Data Representation and Arithmetic. 2009, University of Colombo School of Computing 1

IT 1204 Section 2.0. Data Representation and Arithmetic. 2009, University of Colombo School of Computing 1 IT 1204 Section 2.0 Data Representation and Arithmetic 2009, University of Colombo School of Computing 1 What is Analog and Digital The interpretation of an analog signal would correspond to a signal whose

More information

Register Transfer Language and Microoperations (Part 2)

Register Transfer Language and Microoperations (Part 2) Register Transfer Language and Microoperations (Part 2) Adapted by Dr. Adel Ammar Computer Organization 1 MICROOPERATIONS Computer system microoperations are of four types: Register transfer microoperations

More information

CHAPTER V NUMBER SYSTEMS AND ARITHMETIC

CHAPTER V NUMBER SYSTEMS AND ARITHMETIC CHAPTER V-1 CHAPTER V CHAPTER V NUMBER SYSTEMS AND ARITHMETIC CHAPTER V-2 NUMBER SYSTEMS RADIX-R REPRESENTATION Decimal number expansion 73625 10 = ( 7 10 4 ) + ( 3 10 3 ) + ( 6 10 2 ) + ( 2 10 1 ) +(

More information

CHETTINAD COLLEGE OF ENGINEERING AND TECHNOLOGY COMPUTER ARCHITECURE- III YEAR EEE-6 TH SEMESTER 16 MARKS QUESTION BANK UNIT-1

CHETTINAD COLLEGE OF ENGINEERING AND TECHNOLOGY COMPUTER ARCHITECURE- III YEAR EEE-6 TH SEMESTER 16 MARKS QUESTION BANK UNIT-1 CHETTINAD COLLEGE OF ENGINEERING AND TECHNOLOGY COMPUTER ARCHITECURE- III YEAR EEE-6 TH SEMESTER 16 MARKS QUESTION BANK UNIT-1 Data representation: (CHAPTER-3) 1. Discuss in brief about Data types, (8marks)

More information

CS & IT Conversions. Magnitude 10,000 1,

CS & IT Conversions. Magnitude 10,000 1, CS & IT Conversions There are several number systems that you will use when working with computers. These include decimal, binary, octal, and hexadecimal. Knowing how to convert between these number systems

More information

EE 109 Unit 6 Binary Arithmetic

EE 109 Unit 6 Binary Arithmetic EE 109 Unit 6 Binary Arithmetic 1 2 Semester Transition Point At this point we are going to start to transition in our class to look more at the hardware organization and the low-level software that is

More information

Internal architecture of 8086

Internal architecture of 8086 Case Study: Intel Processors Internal architecture of 8086 Slide 1 Case Study: Intel Processors FEATURES OF 8086 It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 220 memory locations (1

More information

Combinational Logic. Prof. Wangrok Oh. Dept. of Information Communications Eng. Chungnam National University. Prof. Wangrok Oh(CNU) 1 / 93

Combinational Logic. Prof. Wangrok Oh. Dept. of Information Communications Eng. Chungnam National University. Prof. Wangrok Oh(CNU) 1 / 93 Combinational Logic Prof. Wangrok Oh Dept. of Information Communications Eng. Chungnam National University Prof. Wangrok Oh(CNU) / 93 Overview Introduction 2 Combinational Circuits 3 Analysis Procedure

More information

THE LOGIC OF COMPOUND STATEMENTS

THE LOGIC OF COMPOUND STATEMENTS CHAPTER 2 THE LOGIC OF COMPOUND STATEMENTS Copyright Cengage Learning. All rights reserved. SECTION 2.5 Application: Number Systems and Circuits for Addition Copyright Cengage Learning. All rights reserved.

More information

Arab Open University. Computer Organization and Architecture - T103

Arab Open University. Computer Organization and Architecture - T103 Arab Open University Computer Organization and Architecture - T103 Reference Book: Linda Null, Julia Lobur, The essentials of Computer Organization and Architecture, Jones & Bartlett, Third Edition, 2012.

More information

Microcomputers. Outline. Number Systems and Digital Logic Review

Microcomputers. Outline. Number Systems and Digital Logic Review Microcomputers Number Systems and Digital Logic Review Lecture 1-1 Outline Number systems and formats Common number systems Base Conversion Integer representation Signed integer representation Binary coded

More information

Intel 8086 MICROPROCESSOR. By Y V S Murthy

Intel 8086 MICROPROCESSOR. By Y V S Murthy Intel 8086 MICROPROCESSOR By Y V S Murthy 1 Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 2 20 memory locations (1 MB). It can support up to 64K I/O ports. It provides 14,

More information

D I G I T A L C I R C U I T S E E

D I G I T A L C I R C U I T S E E D I G I T A L C I R C U I T S E E Digital Circuits Basic Scope and Introduction This book covers theory solved examples and previous year gate question for following topics: Number system, Boolean algebra,

More information