Chapter 9. Programming Framework

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Clyde Boone
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1 Chapter 9 Programming Framework

2 Lesson 1 Registers

3 Registers Pointers Accumulator Status General Purpose Outline

4 CPU Registers Examples 8-bitA (Accumulator) Register 8-bit B Register 8-bitPSW (Processor Status Word) 8-bit Stack Pointer SP

5 Examples - Registers for Specific Functions Registers associated with the, Internal-devices, Ports, and CPU (A, B, SP, PSW, DPL, DPH), for example, special function registers (SFRs) in 8051

6 Examples of Registers in which a bit can also be addressed Registers associated with the, Internal-devices, Ports, and CPU (A, B, SP, PSW, DPL, DPH), IP,IE, TCON, SCON,T2CON,.. in 8051

7 A register compared to a memory address- 1 Named Entity of 32-bit, 16-bit or 8-bit A register specified in an instruction by few bits only Saves a temporary variable,which the processing unit uses directly without external fetch

8 A register compared to a memory address- 2 Larger number of register set saves larger number of program variables A bank (set) of registers can be separately pre-defined for each codeblock or routine A register can be for a specific preset function

9 A register compared to a memory address- 3 A part of register can be for a specific preset function Each nibble may be for a specific preset function Each bit can be for a specific preset function Each byte or 16-bits half-word can be for a preset function

10 Considerations during Programming Use of PC for program branches and calls Use of stack pointer for stacking Use of register sets Refer Table 9.1

11 Considerations during Programming Availability of Addressing Modes at the processor instruction set Use of Registers Refer Table 9.2

12 Registers Pointers Accumulator Status General Purpose Outline

13 Types of Pointers Indirect Address for data Program Counter Stack Pointer Index Post Base Pre- Autoincrement Offset to base +ve only Relative displacement - +ve or -ve No auto increment

14 Pointer at 8-bit Register R0 or R1 at a register bank in 8051 SP in 8051

15 A or direct 8051 Bank 3 Bank 2 Bank 1 Bank 0 MOV MOV 1 4 R0 or R1 3 2 Indirect addressed Internal RAM between 00H-FFH

16 Examples 9.6 and9.7 Use as Index register Use as base register Use of registers R0 and R1 for indirect Addressing

17 Pointer at 16-bit Registers 16-bit Program Counter PC to point to a code in the memory for the program 16-bit Data Pointer DPTR points to external data memory (DPTR has two bytes DPH-DPL as two SFRs)

18 Program Counter Next Instruction Address for fetching a code Sequential program flow Branching Call Jump Reset Watchdog timer timeout

19 Program Counter On Reset x96 80x86 68HC H 2080H F0000H As per bytes saved at FFFE-FFFFH As per Initialisation Boot Record

20 Example 9.1 use of AJMP Conditional Jumps

21 Stack Pointer Top of a stack of variables,where Pop or Push can be done to increase or decrease the stack Stack Stack Pointer Change Return Pop Call Push

22 Stack Pointer Default On Reset x96 68HC H None None As per Initialisation Boot Record

23 Example 9.2 use of PUSH Use of POP Reverse ordering program

24 Registers Pointers Accumulator Status General Purpose Outline

25 Accumulator Port Operations Operand for ALU Accumulates the result of +, -,,,, logic operations-xor, AND, OR

26 Accumulates the result of +, -,,,, logic operations 8051 Accumulato r Default value = 00H A SFR Address E0H Bit- Addresses E0-E7H E7H A and B B SFR Address F0H For MUL and DIV Bit- Addresses F0-F7H F7H Default value = 00H

27 Nibble exchange Temp from External Memory 8051 Accumulator uses Byte Exchange with DPTR With PC Offset pointer Accumulates the result of +, -,,,, logic operations-xor, AND, OR

28 8051 Accumulator when branch operations Jump JZ JNZ with DPTR CJNE Jump offset

29 Example 9.4 Use of A in subtraction ALU Operations affect flags

30 Example 9.5 Use of A in Addition ALU Operations affect C, AC Use of register Addressing

31 Dual Accumulator- 68HC11 ACCA ACCB Accumulates the result of +, -,,,, logic operations-xor, AND, OR

32 Accumulator Less Processor- 80x96 An 8-bit Address also used for AL,AH, AX Two Address Machine

33 Registers Pointers Accumulator Status General Purpose Outline

34 Bit- Addresses D7H D6H D5H D4H D3H D2H D1H D9H PSW.7 PSW.6 PSW.5 PSW.4 PSW.3 PSW.2 PSW.1 PSW.0 PSW 8051 PSW.7 PSW.0 User Flags F0,F1 C P V AC RS0, RS1 Default value = All 0s

35 Example 9.3 use of F0 in PSW Conditional program branches

36 16-bit PSW 80x96 ALU Operations affect flags Interrupt Mask All IMR C N Z VT V ST I Interrupt Secondary masks

37 CCR 68HC11 Z N V H C External Interrupt X S Stop Status bit

38 Outline Registers Pointers Accumulator Status General Purpose

39 General Purpose register Multiple Uses Scratch pad memory for variables As pointer As accumulator of result in two address machine

40 Summary

41 Accumulator Accumulator with addition B for MUL and DIV Dual accumulator Accumulator less Two address machine operations

42 Register Stack Pointer Program Counter Memory Address Pointer Refer Table 9.1

43 Status Registers PSW CCR Device Control and Status Register(s) Interrupt Mask Register

44 End of Lesson 1 Registers

45 THANK YOU

Microprocessors 1. The 8051 Instruction Set. Microprocessors 1 1. Msc. Ivan A. Escobar Broitman

Microprocessors 1. The 8051 Instruction Set. Microprocessors 1 1. Msc. Ivan A. Escobar Broitman Microprocessors 1 The 8051 Instruction Set Microprocessors 1 1 Instruction Groups The 8051 has 255 instructions Every 8-bit opcode from 00 to FF is used except for A5. The instructions are grouped into