University of Toronto Mississauga. Flip to the back cover and write down your name and student number.

Transcription

1 University of Toronto Mississauga Midterm Test Course: CSC258H5 Winter 2016 Instructor: Larry Zhang Duration: 50 minutes Aids allowed: None Last Name: Given Name: Flip to the back cover and write down your name and student number. This midterm consists of a total of 50 marks, for 4 questions on 10 pages (including this one). When you receive the signal to start, please make sure that your copy is complete. Each question is labelled with the suggested amount of time that you should spend on it. You may use it as reference to better manage your time. Precise answers will be given higher marks than vague ones. Concise answers will be given higher marks than lengthy ones. Illegible answers will not be given marks. If you write any answer on the pages for rough works, indicate clearly what you want marked. If you need extra scratch paper, raise your hand, and the instructor will bring you a few sheets. Trust yourself, you know more than you think you do. Page 1 of 10

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3 Question 1: Short Answers [2x10=20 marks] [10 minutes] For multiple choices questions, marks will be deducted for both missing choices and wrong choices. 1. What are the free charge carriers of a P type semiconductor? Circle your answer. a. electrons b. holes c. protons d. gravitational waves 2. When a high voltage is applied to the P side of a PN junction, what happens to the depletion layer? a. becomes wider b. becomes narrower c. neither of above 3. Assuming 4 inputs A, B, C and D. Which of the following is maxterm A + B + C + D. a. M 3 b. M 6 c. M 9 d. none of above 4. Which of the following logic expressions are equivalent to (A+B ) A? Circle all that apply. a. (A +B ) A b. (A+B) c. (A + B) B d. none of above 5. Suppose we use 2 to 1 muxes to implement a 258 to 1 mux. How many 2 to 1 muxes are needed at least? Write down the number in the space below. 6. What is the decimal value of the signed 8 bit binary number ? 7. How many bits are there in the mode & operation select input of the ALU? 8. A finite state machine has 42 states. How many flip flops are needed at least to build this FSM? 9. What is the output Q of a clocked SR latch when S = 1, R = 0 and C = 0? 10. Write down the logic expression of a half adder s output S (sum bit), in terms of input X and Y. S = Page 3 of 10

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5 Question 2: Slightly Longer Answers [20 marks] [20 minutes] 1. Assuming A and B are inputs and Y is the output. What logic gates are implemented in the following two diagrams? Write your answers in the boxes below. [4 marks] 2. Given the Product of Maxterms: (A + B + C)(A + B + C)(A + B + C )(A + B + C ), please write down below the equivalent Sum of Minterms. [4 marks] 3. Given the following Karnaugh map, draw the boxes on it so that the logic is the most reduced, and write down the reduced logic expression. [4 marks] CD C D C D CD A B 1 x 0 x A B AB 0 0 x 0 Reduced Logic Expression: AB x Page 5 of 10

6 4. Draw below the diagram of a 3 to 1 mux only using the 2 to 1 mux symbol on the right. The pins for the inputs (A, B, C), the select inputs (S1 and S0) and the output (Y) are already drawn for you. [4 marks] 5. Write down the two numbers that are printed out by the following C program. [4 marks] #include <stdio.h> Output: int main() { /* char is 8 bit integer */ unsigned char a = 250; unsigned char b = 200; unsigned char s = a + b; /* print the decimal value of s */ printf("%d\n", s); signed char c = 70; signed char d = 80; signed char t = c + d; /* print the decimal value of t */ printf("%d\n", t); } return 0; Page 6 of 10

7 Question 3: Finite State Machine Analysis [5 marks] [8 minutes] You ll get 1 out of 5 marks for leaving this question completely blank. Consider the flip flop circuit below and the incomplete state diagram on the right. Given the circuit, complete the transitions of the state diagram, making sure to label each transition with the value of input X. You may assume that the two digits in each state are the values for flip flops F 1 and F 0, respectively. Note: the two gates in the circuit diagram are XOR gates. Page 7 of 10

8 Question 4: Counter Design [5 marks] [6 minutes] You ll get 1 out of 5 marks for leaving this question completely blank. Consider the 4 bit synchronous up counter symbol on the right. In the space below, design a diagram of an 8 bit up counter that is constructed out of two 4 bit up counter symbols. You re only allowed to use the pins that is shown in the symbol, i.e., don t add other pins to the symbol. You may use other gates in your design, but for full marks you should use only one or two gates. You are allowed to use logic gates (AND, OR, XOR, etc.) with more than two input pins. The resulting input and output pins of the 8 bit counter are: Input : Clk Output : Q 0, Q 1, Q 2, Q 3, Q 4, Q 5, Q 6, Q 7 Make sure to label the input and output pins of your design. Page 8 of 10

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10 Last Name: Given Name: Student Number: Q1: /20 Q2: /20 Q3: / 5 Q4: / 5 TOTAL: /50 END OF TEST Page 10 of 10