Intel 8086: Instruction Set
|
|
- Timothy Wilkins
- 6 years ago
- Views:
Transcription
1 IUST-EE (Chapter 6) Intel 8086: Instruction Set 1
2 Outline Instruction Set Data Transfer Instructions Arithmetic Instructions Bit Manipulation Instructions String Instructions Unconditional Transfer Instruction Conditional Branch Instructions Interrupt Instructions Processor Control Instructions Assembly Language Program Examples 2
3 8086 Instruction Set The 8086 has approximately 117 different instructions with about 300 op codes. Except for string instructions which involve array operations, the 8086 instructions do not permit memory-to-memory operations. They can be classified into eight groups: 1. Data Transfer Instructions 2. Arithmetic Instructions 3. Bit Manipulation Instructions 4. String Instructions 5. Unconditional Transfer Instruction 6. Conditional Branch Instructions 7. Interrupt Instructions 8. Processor Control Instructions 3
4 Data Transfer Instructions 4
5 Examples: Data Transfer Instructions (cont.) MOV CX, DX ; (CX) (DX) MOV AX, 0205H ;(AX) 0205H MOV CH, [BX] ; (CH) (16*(DS)+(BX)) moves the 8-bit content of memory location addressed by BX and segment register DS into CH. If [BX] = 0050H, [DS] = 2000H, [20050H] = 08H, then after MOV CH, [BX], the content of CH will be 08H. 5
6 Data Transfer Instructions (cont.) MOV START [BP], CX ; (16*(SS)+(BP)+START) (CL), (16*(SS)+(BP)+START+1) (CH), For example, if [CX] = 5009H, [BP] = 0030H, [SS] = 3000H, START = 06H, then [30036H] = 09H and [30037H] = 50H. Note that the segment register SS can be overridden by CS using MOV CS: START [BP], CX. PUSH START [BX] ; first (SP) (SP)-2 then (16*(SS)+(SP)) (16*(DS)+START+(BX)) (16*(SS)+(SP)+1) (16*(DS)+START+(BX)+1) 6
7 Data Transfer Instructions (cont.) POP ES ; first (EL) (16*(SS)+(SP)), and (EH) (16*(SS)+(SP)+1), then (SP) (SP)+2 XCHG START [BX], AX exchanges the 16-bit word in AX with the contents of two consecutive memory locations starting at 20-bit physical address computed from START, BX, and DS. [AL] is exchanged with the content of the first location and [AH] is exchanged with the content of the next location XLAT can be used to convert one code into another code using a look up table in DS with BX as displacements This instruction is equivalent to MOV AL, [AL] [BX]. 7
8 Input/Output Instructions In fixed port addressing: IN AL, 38H inputs 8-bit data from port 38H into AL. IN AX, 38H inputs 16-bit data from ports 38H and 39H into AX. OUT 38H, AL outputs the contents of AL to port 38H. OUT 38H, AX, on the other hand, outputs the 16-bit contents of AX to ports 38H and 39H 8
9 Input/Output Instructions (cont.) In variable port addressing: the port address is 16-bit and is contained in the DX register. Assume [DX] =3124H IN AL, DX inputs 8-bit data from 8-bit port 3124H into AL. IN AX, DX inputs 16-bit data from ports 3124H and into AL and AH respectively. OUT DX, AL outputs 8-bit data from AL into port 3124H. OUT DX, AX outputs 16-bit data from AL and AH into ports 3124H and 3125H, respectively. 9
10 Address Initialization Instructions LEA reg, mem loads an offset (mem) directly into the specified register. LEA BX, 5000H and MOV BX, 5000H accomplish the same task. Accomplish different tasks: LEA DI, [SI] [BX] loads the 16-bit value computed from BX and SI into DI whereas MOV DI, [SI] [BX] loads the 16-bit contents of a memory location computed from SI and BX into DI. For example, LEA can be used to load the address of the table used by the XLAT instructions. 10
11 Address Initialization Instructions (cont.) LDS reg, mem can be used to initialize SI and DS to point to the start of the source string before using one of the string instructions. LDS SI, [BX] ; (SI) (16*(DS)+(BX)) (2 bytes) and (DS) (16*(DS)+(BX)+2) (2 bytes) LES reg, mem can be used to point to the start of the destination string before using one of the string instructions. LES DI, [BX] ; (DI) (16*(DS)+(BX)) (2 bytes) and (ES) (16*(DS)+(BX)+2) (2 bytes) 11
12 Flag Register Instructions PUSHF pushes the 16-bit flag register onto the stack. LAHF loads AH with the condition codes from the low byte of the flag register. 12
13 Arithmetic Instructions a a+b a a-b 13
14 Arithmetic Instructions (cont.) ASCII: American Standard Code for Information Interchange 14
15 Examples of Arithmetic Instructions To find the # of matches for an 8-bit number in an 8086 register such as DL in a data array of 50 bytes in memory pointed to by BX in DS. 15
16 Examples of Arithmetic Instructions AAA (ASCII adjust AL after addition) The ASCII codes for numbers 0 to 9 are 30H through 39H. AAA instruction can then be used to provide the correct unpacked BCD. packed BCD stores multiple digits, e.g. 78 in a byte unpacked BCD stores only one digit, e.g. 07 in a byte 16
17 Examples of Arithmetic Instructions (cont.) DAA is used to adjust the result of adding two packed BCD numbers in AL to provide a valid BCD number. If after the addition, the low 4-bit of the result in AL is greater than 9 (or if AF = 1), then the DAA adds 6 to the low 4 bits of AL. Then, if the high 4 bits of the result in AL is greater than 9 (or if CF = 1), then DAA adds 60H to AL. ADD AL, DL ;[AL] = 55H=55 BCD & [DL] = 18H=18 BCD ;Result = [AL] = 6DH DAA ; [AL] = 73H=73 BCD 17
18 Examples of Arithmetic Instructions (cont.) AAS: ASCII adjust [AL] after subtraction The ASCII codes for two 8-bit numbers in an based microcomputer can be subtracted. [DL] = 35H = ASCII for 5 & [AL] = 37H = ASCII for 7 SUB AL, DL ; [DL]=FEH (2 s complement addition) AAS ; CF=1, [AL]=02 DAS: Decimal adjust [AL] after subtraction If low 4-bit in AL is greater than 9 (or if AF = 1), then DAS subtracts 6 from the low 4-bit of AL. Then, if the upper 4-bit of the result in AL is greater than 9 (or if CF = 1), DAS subtracts 60 from AL. 18
19 Multiplication Instructions Unsigned multiplication: MUL mem/reg ;[AX] [AL]*[mem8/reg8] ;[DX][AX] [AX]*[mem 16/reg 16] : MUL WORDPTR [BX] ; unsigned 16 x 16 If [BX] = 0050H, [DS] = 3000H, [30050H] = 0002H, [AX] = 0006H, then after MUL WORDPTR [BX], [DX] = 0000H, [AX] = 000CH. IMUL mem/reg ; [AX] [AL]*[mem8/reg8] ;[DX][AX] [AX]*[mem 16/reg 16] provides signed 8 x 8 or signed 16 x 16 multiplication. If [CL] = FDH =-3, [AL] = FEH =-2, then after IMUL CL, register AX contains 0006H. 19
20 Division Instructions IDIV mem/reg ; 16/8 or 32/16 bit signed division [AX]/[mem8/reg8], [AH] Remainder, [AL] Quotient [DX][AX]/[mem 16/reg 16], [DX] Remainder, [AX] Quotient. IDIV WORDPTR [BX]. If [BX] = 0020H, [DS] = 2000H, [20020H] = 0004H, [DX] [AX] = H, then after [DX] = Remainder = 0001H, [AX] = Quotient = 0004H DIV mem/reg ;Unsigned division If [AX] = 0009H, [BL] = 02H, then after DIV BL, [AH] = Remainder = 01H, [AL] = Quotient = 04H, 20
21 Instructions (cont.) CBW extends the sign from the AL register to the AH register. if (AL) = F1H, then, after CBW, (AH)=FF to perform an arithmetic operation on two signed numbers of different lengths. CWD sign-extends the AX register into the DX if the MSB of AX is 1, then (DX)=FFFFH AAM adjusts the product of two unpacked BCD digits in AX. If (AL) = 03H and (CH) = 08H MUL CH ; (AX) = 0018H, AAM ; (AX) = 0204H=unpacked
22 Bit Manipulation Instructions 22
23 Logical, Shift and Rotate Instructions TEST BL, 3 ; logically ANDs the contents of BL with but does not store the result in BL. All flags are affected. All shift and rotate instructions include two operands. The destination operand specifies the register or memory to be shifted or rotated the source operand specifies the number of times SHL DX, 1 ;logically shifts the DX once to the left. 23
24 Logical, Shift and Rotate Instructions (cont.) SHL DX, 1 ;logically shifts the DX once to the left SHL DX,CL, with CL = 5, logically shifts the 16-bit contents of DX five times to the left. SHR is in the right direction Arithmetic shifts 24
25 Logical, Shift and Rotate Instructions (cont.) Rotate instructions 25
26 String Instructions The word "string" means that an array of data bytes or words is stored in consecutive memory locations. 26
27 String Instructions:MOVS SI and DI are incremented or decremented depending on the DF flag. Assuming (10002)=1234H then 27
28 String Instructions: REP REP repeats the instruction that follows until the CX register is decremented to 0. Example, the following instruction sequence uses LOOP instruction for moving 50 bytes from source to destination: 28
29 String Instructions: REP (cont.) The above instruction sequence can be replaced using REP prefix as follows: 29
30 String Instructions: CMPS CMPS WORD or BYTE subtracts without any result (affects flags) 8- or 16-bit data in the source memory location addressed by SI in DS from the destination memory location addressed by DI in ES. SI and DI are incremented or decremented depending on the DF flag. For example, if (DF) = 0, (DS) =1000H, (ES) = 3000H (SI) = 0002H, (DI) = 0004H, (10002) =1234H and (30004)= 1234H after CMPS WORD, CF = 0, PF = 1, AF = 1, ZF = 1, SF = 0, OF = 0, (10002) = 1234H, (30004) = 1234H, (SI) = 0004H, (DI) = 0006H 30
31 String Instructions: SCAS SCAS WORD or BYTE. This compares the memory (addressed by (ES) and (DI)) with AL or AX. (DI) = 0000H, (ES) = 2000H, (DF) = 0, (20000)=05, and (AL)=03 after SCAS BYTE (DI) = 0001H because (DF) = 0 all flags are affected based on the operation (AL) - (20000). 31
32 String Instructions: LODS LODS BYTE or WORD loads a byte into AL or a word into AX respectively from a string in memory addressed by SI in DS SI is then automatically incremented or decremented by 1 for a byte or by 2 for a word based on DF. For example, prior to execution of LODS BYTE, if (SI )= 0020H, (DS) = 3000H, (30020H) = O5H, DF = 0, then after execution (AL)=05H, (SI)= 0021H since DF = 0. 32
33 String Instructions: STOS STOS BYTE or WORD, on the other hand, stores a byte in AL or a word in AX respectively into a string addressed by DI in ES. DI is then automatically incremented or decremented by 1 for a byte or by 2 for a word based on DF. 33
34 String Instructions: REPE/REPZ REPE/REPZ prefix can be used with CMPS or SCAS to cause one of these instructions to continue executing until ZF = 1 or CX = 0. If CMPS is prefixed with REPE or REPZ, the operation is interpreted as "compare while not end-of-string (CX# 0) or strings are equal (ZF = 1)." If CMPS is preceded by REPNE or REPNZ, the operation is interpreted as "compare while not end-of-string (CX # 0) or strings not equal (ZF = 0)." Thus, repeated CMPS instructions can be used to find matching or differing string elements. 34
35 Unconditional Transfer Instructions Transfer control to a location either in the current executing memory segment (intrasegment) or in a different code segment (intersegment) The 8086 CALL instructions provide the mechanism to call a subroutine The RET instruction placed at the end of the subroutine transfers control back to the main program. 35
36 Unconditional Transfer Instructions (cont.) There are two types of 8086 CALL instruction. Intrasegment CALL (IP changes, CS is fixed). The 8086 pushes the current contents of IP onto the stack; the SP is then decremented by 2. Intersegment CALL (both IP and CS are changed). Note that intrasegment CALL instructions are used when the main program and the subroutine are located in the same code segment. 36
37 CALL NEAR PROC The assembler directive NEAR specifies the CALL instruction with relative addressing mode. NEAR determines a 16-bit displacement ( to ) and the offset is computed relative to the address of the CALL instruction. 37
38 CALL mem16 and CALL reg16 specify a memory location or a 16-bit register to hold the offset to be loaded into IP. use indirect addressing mode. An example of CALL mem16 CALL [BX] ; (IP) ((DS)*16+(BX)) Examples of CALL reg16 CALL BX ; (IP) (BX) CALL BP ; (IP) (BP) 38
39 Intersegment CALL Instructions The main program and the subroutine are located in two different code segments. The two intersegment CALL instructions are CALL FAR PROC CALL mem32. Upon execution of these two instructions, the 8086 pushes the current contents of IP and CS onto the stack, the new values of IP and CS are then loaded. 39
40 Intersegnent CALL Examples 40
41 RET RET instruction is usually placed at the end of a subroutine which pops IP or both IP and CS (pushed onto the stack by the intersegment CALL instruction), and returns control to the main program. RET disp 16, adds 16-bit value (disp 16) to SP after placing the return address into IP (for intrasegment CALL) or into IP and CS (for intersegment CALL). 41
42 JUMP Similar to the CALL instruction intrasegment JMP: can have an operand with a short label, near label, reg 16 or mem16. intersegment JMP For jumps with short label, IP changes and CS is fixed. JMP disp8 adds the second object code byte (signed 8-bit displacement) to (IP + 2), and (CS) is unchanged. Near label operand allows a JMP instruction to have a signed 16-bit displacement 42
43 JMP label JUMP JMP START. The 8086 assembler automatically computes the value of the displacement START at assembly time. JMP reg16 or JMP meml6 specifies the JUMP address respectively by the 16bit contents of a register or a memory location. JMP SI ; (IP) (SI), (CS) is unchanged JMP [DI] ; (IP) ((DS)*16+(DI)), (CS) is unchanged The intersegment JMP instruction includes operands with far label and mem32. JMP FAR [SI] ; loads IP and CS with the contents of four consecutive bytes pointed to by SI in DS. 43
44 Conditional Branch Instructions All 8086 conditional branch instructions use 8-bit signed displacement. If condition is true, then IP IP + disp8, otherwise IP IP + 2 and execute next instruction 44
45 Conditional Branch Instructions (Example) Clear a section of memory word starting at B up to and including A, where (A) = 3000H and (B) = 2000H in DS = 1000H using the following instruction sequence JGE treats CMP operands as 2 s complement numbers. The loop will terminate when BX = 3002H 45
46 Conditional Branch Instructions (Example) Now, suppose that (A) = 8500H and (B) = 0500H. Then, after CMP CX, BX is first executed, Because 8000H is a negative number, the loop terminates. The correct approach: 46
47 Conditional Branch Instructions Affecting Individual Flags 47
48 Iteration Control Instructions 48
49 Interrupt Instructions INT n is a software interrupt instruction. Execution of INT n causes the 8086 to push current CS, IP, and Flags onto the stack, and loads CS and IP with new values based on interrupt type n; an interrupt service routine is written at this new address. IRET at the end of the service routine transfers control to the main program by popping old CS, IP, and flags from the stack. The interrupt on overflow is a type 4 (n = 4) interrupt. This interrupt occurs if the overflow flag (OF) is set and the INTO instruction is executed. 49
50 Processor Control Instructions 50
51 Assembler Pseudo-Instructions or Directives Before using a variable in a program, its type must be declared as a byte (8-bit) BEGIN DB 0 word (16-bit) START DW 25F1H double word (4 bytes or 2 words) PROG DD 0 The EQU directive can be used to assign a name to constants. NUMB EQU 21H A section of a 8086 program or a data array can be defined by the SEGMENT and ENDS directives 51
52 Assembler Directives (cont.) The DUP directive can be used to initialize several locations to zero START DW 4 DUP (0) ; reserves four words starting at the offset START in DS and initializes them to zero The ASSUME directive tells the assembler to use the logical segment names ASSUME CS: CODE-1, DS: DATA-1 ; Assume CODE-1, and DATA-I as the code segment, data segment, respectively. 52
53 Assembler Pseudo-Instructions or Directives 53
54 Example 1 Write an 8086 assembly language program to add two 16-bit numbers in CX and DX and store the result in location 0500H addressed by DI. 54
55 Example 2 Write an 8086 assembly language program to add two 64-bit numbers. Assume SI and DI contain the starting offsets of the numbers. Store the result in memory pointed to by DI. 55
56 Example 2 (cont.) 56
57 Example 3 Write an 8086 assembly language program for each of the following C language program structures. Assume x and y are addresses of two 16-bit signed integers: (BX) the offset of x (SI) the offset of y 57
58 Example 3 (cont.) ii) sum = 0; for (i=0; i<=9; i=i + 1 ) sum = sum + a[i]; Assume sum is the address of the 16-bit result. (SI) the address of the first element of the array (BX) the offset of sum 58
59 Example 4 Write an 8086 assembly program to implement the following C language program loop: sum = 0; for (i=0;i<=99; i=i + 1 ) sum = sum + x[i] * y[i]; The assembly language program will compute x i y i where x i and y i are signed 8-bit numbers stored at offsets 4000H and 5000H, respectively. Initialize DS to 2000H. Store 16-bit result in DX. Assume no overflow. 59
60 Example 4 (cont.) 60
61 Example 5 Write an 8086 assembly language program to clear 50 consecutive bytes starting at offset 1000H. Assume DS is already initialized. 61
62 Example 6 Write an 8086 assembly language program to compare a source string of 50 words pointed to by an offset 1000H in the data segment at 2000H with a destination string pointed to by an offset 3000H in the extra segment at 4000H. The program should be halted as soon as a match is found or the end of the string is reached. 62
63 Example 6 (cont.) 63
64 Example 7 Write an 8086 assembly language program to multiply two 16-bit unsigned numbers to provide a 32-bit result. Assume that the two numbers are stored in CX and DX. 64
65 Example 8 Write an 8086 assembly language program to multiply two 8-bit signed numbers stored in the same register; AH holds one number and AL holds the other number. Store the 16-bit result in DX. 65
3.1 DATA MOVEMENT INSTRUCTIONS 45
3.1.1 General-Purpose Data Movement s 45 3.1.2 Stack Manipulation... 46 3.1.3 Type Conversion... 48 3.2.1 Addition and Subtraction... 51 3.1 DATA MOVEMENT INSTRUCTIONS 45 MOV (Move) transfers a byte, word,
More informationSummer 2003 Lecture 4 06/14/03
Summer 2003 Lecture 4 06/14/03 LDS/LES/LSS General forms: lds reg,mem lseg reg,mem Load far pointer ~~ outside of current segment {E.g., load reg w/value @ mem, & seg w/mem+2 XCHG Exchange values General
More informationSPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY
BACKGROUND 8086 CPU has 8 general purpose registers listed below: AX - the accumulator register (divided into AH / AL): 1. Generates shortest machine code 2. Arithmetic, logic and data transfer 3. One
More information8086 INSTRUCTION SET
8086 INSTRUCTION SET Complete 8086 instruction set Quick reference: AAA AAD AAM AAS ADC ADD AND CALL CBW CLC CLD CLI CMC CMP CMPSB CMPSW CWD DAA DAS DEC DIV HLT IDIV IMUL IN INC INT INTO I JA JAE JB JBE
More informationPESIT Bangalore South Campus
INTERNAL ASSESSMENT TEST 2 Date : 02/04/2018 Max Marks: 40 Subject & Code : Microprocessor (15CS44) Section : IV A and B Name of faculty: Deepti.C Time : 8:30 am-10:00 am Note: Note: Answer any five complete
More informationINSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
8 Unsigned and Signed Integer Numbers 1. Unsigned integer numbers: each type of integer can be either byte-wide or word-wide. This data type can be used to represent decimal numbers in the range 0 through
More informationCode segment Stack segment
Registers Most of the registers contain data/instruction offsets within 64 KB memory segment. There are four different 64 KB segments for instructions, stack, data and extra data. To specify where in 1
More information8088/8086 Programming Integer Instructions and Computations
Unit3 reference 2 8088/8086 Programming Integer Instructions and Computations Introduction Up to this point we have studied the software architecture of the 8088 and 8086 microprocessors, their instruction
More informationAPPENDIX C INSTRUCTION SET DESCRIPTIONS
APPENDIX C INSTRUCTION SET DESCRIPTIONS This appendix provides reference information for the 80C186 Modular Core family instruction set. Tables C-1 through C-3 define the variables used in Table C-4, which
More informationSigned number Arithmetic. Negative number is represented as
Signed number Arithmetic Signed and Unsigned Numbers An 8 bit number system can be used to create 256 combinations (from 0 to 255), and the first 128 combinations (0 to 127) represent positive numbers
More informationEC 333 Microprocessor and Interfacing Techniques (3+1)
EC 333 Microprocessor and Interfacing Techniques (3+1) Lecture 6 8086/88 Microprocessor Programming (Arithmetic Instructions) Dr Hashim Ali Fall 2018 Department of Computer Science and Engineering HITEC
More informationCS401 Assembly Language Solved Subjective MAY 03,2012 From Midterm Papers. MC
CS401 Assembly Language Solved Subjective MAY 03,2012 From Midterm Papers MC100401285 Moaaz.pk@gmail.com Mc100401285@gmail.com PSMD01 MIDTERM FALL 2011 CS401 Assembly Language Q: Affected flag of AND operation
More informationArithmetic Instructions
Segment 3C Arithmetic Instructions This topic covers the following instructions: Addition (ADD, INC, ADC) Subtraction (SUB, DEC, SBB,CMP) Multiplication (MUL, IMUL) Division (DIV, IDIV) BCD Arithmetic
More informationUNIT III MICROPROCESSORS AND MICROCONTROLLERS MATERIAL OVERVIEW: Addressing Modes of Assembler Directives. Procedures and Macros
OVERVIEW: UNIT III Addressing Modes of 8086 Assembler Directives Procedures and Macros Instruction Set of 8086 Data Transfer Group Arithmetic Group Logical Instructions Rotate and Shift instructions Loop
More informationASSEMBLY LANGUAGE PROGRAMMING OF THE MICROCOMPUTER
CHAPTER ASSEMBLY LANGUAGE PROGRAMMING OF THE MICROCOMPUTER 2.1 Introduction To run a program, a microcomputer must have the program stored in binary form in successive memory locations. There are three
More informationWeek /8086 Microprocessor Programming I
Week 4 8088/8086 Microprocessor Programming I Example. The PC Typewriter Write an 80x86 program to input keystrokes from the PC s keyboard and display the characters on the system monitor. Pressing any
More informationINSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
Note: PUSHF / POPF have no operands The figure below shows that if (SS) = 3000H, (SP) = 0042H, so the execution of POP CX loads CX by the word 4050H form the stack segment. The SP is incremented by 2.
More informationSPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY
BACKGROUND Segment The "SEGMENT" and "ENDS" directives indicate to the assembler the beginning and ending of a segment and have the following format label SEGMENT [options] ;place the statements belonging
More informationCS401 Assembly Language Solved MCQS From Midterm Papers
CS401 Assembly Language Solved MCQS From Midterm Papers May 14,2011 MC100401285 Moaaz.pk@gmail.com MC100401285@gmail.com PSMD01(IEMS) Question No:1 ( Marks: 1 ) - Please choose one The first instruction
More informationEx : Write an ALP to evaluate x(y + z) where x = 10H, y = 20H and z = 30H and store the result in a memory location 54000H.
Ex : Write an ALP to evaluate x(y + z) where x = 10H, y = 20H and z = 30H and store the result in a memory location 54000H. MOV AX, 5000H MOV DS, AX MOV AL, 20H MOV CL, 30H ADD AL, CL MOV CL, 10H MUL CL
More informationProgram controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions.
2 Microprocessor Program controlled semiconductor device (IC) which fetches (from memory), decodes and executes instructions. It is used as CPU (Central Processing Unit) in computers. 3 Microprocessor
More information9/25/ Software & Hardware Architecture
8086 Software & Hardware Architecture 1 INTRODUCTION It is a multipurpose programmable clock drive register based integrated electronic device, that reads binary instructions from a storage device called
More informationIntel 8086 MICROPROCESSOR ARCHITECTURE
Intel 8086 MICROPROCESSOR ARCHITECTURE 1 Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 2 20 memory locations (1 MB). It can support up to 64K I/O ports. It provides 14, 16
More informationEx: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans.
INSTRUCTOR: ABDULMUTTALIB A H ALDOURI Conditional Jump Cond Unsigned Signed = JE : Jump Equal JE : Jump Equal ZF = 1 JZ : Jump Zero JZ : Jump Zero ZF = 1 JNZ : Jump Not Zero JNZ : Jump Not Zero ZF = 0
More information8086 ASSEMBLY LANGUAGE PROGRAMMING
UNIT-II 8086 ASSEMBLY LANGUAGE PROGRAMMING Contents at a glance: 8086 Instruction Set Assembler directives Procedures and macros. 8086 MEMORY INTERFACING: 8086 addressing and address decoding Interfacing
More informationADVANCE MICROPROCESSOR & INTERFACING
VENUS INTERNATIONAL COLLEGE OF TECHNOLOGY Gandhinagar Department of Computer Enggineering ADVANCE MICROPROCESSOR & INTERFACING Name : Enroll no. : Class Year : 2014-15 : 5 th SEM C.E. VENUS INTERNATIONAL
More informationMnem. Meaning Format Operation Flags affected ADD Addition ADD D,S (D) (S)+(D) (CF) Carry ADC Add with ADC D,C (D) (S)+(D)+(CF) O,S,Z,A,P,C
ARITHMETIC AND LOGICAL GROUPS 6-1 Arithmetic and logical groups: The arithmetic group includes instructions for the addition, subtraction, multiplication, and division operations. The state that results
More informationEEM336 Microprocessors I. Data Movement Instructions
EEM336 Microprocessors I Data Movement Instructions Introduction This chapter concentrates on common data movement instructions. 2 Chapter Objectives Upon completion of this chapter, you will be able to:
More informationQ1: Multiple choice / 20 Q2: Protected mode memory accesses
16.317: Microprocessor-Based Systems I Summer 2012 Exam 2 August 1, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationWeek /8086 Microprocessor Programming II
Week 5 8088/8086 Microprocessor Programming II Quick Review Shift & Rotate C Target register or memory SHL/SAL 0 C SHR 0 SAR C Sign Bit 2 Examples Examples Ex. Ex. Ex. SHL dest, 1; SHL dest,cl; SHL dest,
More informationComputer Architecture 1 ح 303
Lecture 4 A. Addressing MODES 1. Introduction to assembly language programming: Program is a sequence of commands used to tell a microcomputer what to do. Each command in a program is an instruction Programs
More informationKingdom of Saudi Arabia Ministry of Higher Education. Taif University. Faculty of Computers & Information Systems
Kingdom of Saudi Arabia Ministry of Higher Education Taif University Faculty of Computers & Information Systems المملكة العربية السعودية وزارة التعليم العالي جامعة الطاي ف آلية الحاسبات ونظم المعلومات
More informationChapter Four Instructions Set
Chapter Four Instructions set Instructions set 8086 has 117 instructions, these instructions divided into 6 groups: 1. Data transfer instructions 2. Arithmetic instructions 3. Logic instructions 4. Shift
More informationEXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM
EXPERIMENT WRITE UP AIM: Assembly language program for 16 bit BCD addition LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM TOOLS/SOFTWARE
More informationIntel 8086 MICROPROCESSOR. By Y V S Murthy
Intel 8086 MICROPROCESSOR By Y V S Murthy 1 Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 2 20 memory locations (1 MB). It can support up to 64K I/O ports. It provides 14,
More informationArithmetic and Logic Instructions And Programs
Dec Hex Bin 3 3 00000011 ORG ; FOUR Arithmetic and Logic Instructions And Programs OBJECTIVES this chapter enables the student to: Demonstrate how 8-bit and 16-bit unsigned numbers are added in the x86.
More informationAssignment no:4 on chapter no :3 : Instruction set of 8086
Assignment no:4 on chapter no :3 : Instruction set of 8086 1) Describe any two string operation instruction of 8086 with syntax & one example of each. 1] REP: REP is a prefix which is written before one
More informationLecture 16: Passing Parameters on the Stack. Push Examples. Pop Examples. CALL and RET
Lecture 1: Passing Parameters on the Stack Push Examples Quick Stack Review Passing Parameters on the Stack Binary/ASCII conversion ;assume SP = 0202 mov ax, 124h push ax push 0af8h push 0eeeh EE 0E F8
More informationBasic Execution Environment
Basic Execution Environment 3 CHAPTER 3 BASIC EXECUTION ENVIRONMENT This chapter describes the basic execution environment of an Intel Architecture processor as seen by assembly-language programmers.
More informationdb "Please enter up to 256 characters (press Enter Key to finish): ",0dh,0ah,'$'
PA4 Sample Solution.model large.stack 100h.data msg1 db "This programs scans a string of up to 256 bytes and counts the repetitions of the number 4206 and sums them.",0dh,0ah,'$' msg2 db "Please enter
More informationEC 333 Microprocessor and Interfacing Techniques (3+1)
EC 333 Microprocessor and Interfacing Techniques (3+1) Lecture 7 8086/88 Microprocessor Programming (Data Movement Instructions) Dr Hashim Ali Spring 2018 Department of Computer Science and Engineering
More informationMicroprocessor and Assembly Language Week-5. System Programming, BCS 6th, IBMS (2017)
Microprocessor and Assembly Language Week-5 System Programming, BCS 6th, IBMS (2017) High Speed Memory Registers CPU store data temporarily in these location CPU process, store and transfer data from one
More informationWeek /8086 Microprocessor Programming
Week 5 8088/8086 Microprocessor Programming Multiplication and Division Multiplication Multiplicant Operand Result (MUL or IMUL) (Multiplier) Byte * Byte AL Register or memory Word * Word AX Register or
More informationcomplement) Multiply Unsigned: MUL (all operands are nonnegative) AX = BH * AL IMUL BH IMUL CX (DX,AX) = CX * AX Arithmetic MUL DWORD PTR [0x10]
The following pages contain references for use during the exam: tables containing the x86 instruction set (covered so far) and condition codes. You do not need to submit these pages when you finish your
More information8086 Programming. Multiplication Instructions. Multiplication can be performed on signed and unsigned numbers.
Multiplication Instructions 8086 Programming Multiplication can be performed on signed and unsigned numbers. MUL IMUL source source x AL source x AX source AX DX AX The source operand can be a memory location
More informationCS-202 Microprocessor and Assembly Language
CS-202 Microprocessor and Assembly Language Lecture 2 Introduction to 8086 Assembly Language Dr Hashim Ali Spring - 2019 Department of Computer Science and Engineering HITEC University Taxila!1 Lecture
More informationUNIT 4. Modular Programming
1 UNIT 4. Modular Programming Program is composed from several smaller modules. Modules could be developed by separate teams concurrently. The modules are only assembled producing.obj modules (Object modules).
More informationWINTER 12 EXAMINATION Subject Code : Model Answer Page No : / N. a) Describe the function of SID and SOD pins of 8085 microprocessor
Subject Code : Model Answer Page No : / N Q.1) SOLVE ANY FIVE : (20 MARKS) a) Describe the function of SID and SOD pins of 8085 microprocessor Ans: - SID: - (2 Mark) Serial Input Data SID pin is used to
More informationBasic Assembly SYSC-3006
Basic Assembly Program Development Problem: convert ideas into executing program (binary image in memory) Program Development Process: tools to provide people-friendly way to do it. Tool chain: 1. Programming
More informationif 2 16bit operands multiplied the result will be
how many operands in ADC? ans:3 how 32 bit word is defined? ans define double if 2 16bit operands multiplied the result will be ans 32bit if div by ero occurs then?? ans div by zero int for software int
More informationORG ; TWO. Assembly Language Programming
Dec 2 Hex 2 Bin 00000010 ORG ; TWO Assembly Language Programming OBJECTIVES this chapter enables the student to: Explain the difference between Assembly language instructions and pseudo-instructions. Identify
More informationMarking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313)
Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 02/06/2018 Section 1 Weighting 40% of
More informationInstructions moving data
do not affect flags. Instructions moving data mov register/mem, register/mem/number (move data) The difference between the value and the address of a variable mov al,sum; value 56h al mov ebx,offset Sum;
More informationWe will first study the basic instructions for doing multiplications and divisions
MULTIPLICATION, DIVISION AND NUMERICAL CONVERSIONS We will first study the basic instructions for doing multiplications and divisions We then use these instructions to 1. Convert a string of ASCII digits
More informationLecture 9. INC and DEC. INC/DEC Examples ADD. Arithmetic Operations Overflow Multiply and Divide
Lecture 9 INC and DEC Arithmetic Operations Overflow Multiply and Divide INC adds one to a single operand DEC decrements one from a single operand INC destination DEC destination where destination can
More information1-Operand instruction types 1 INC/ DEC/ NOT/NEG R/M. 2 PUSH/ POP R16/M16/SR/F 2 x ( ) = 74 opcodes 3 MUL/ IMUL/ DIV/ DIV R/M
Increment R16 1-Operand instruction types 1 INC/ DEC/ NOT/NEG R/M 4 x (16+48) = 256 opcodes 2 PUSH/ POP R16/M16/SR/F 2 x (8+24+4+1) = 74 opcodes 3 MUL/ IMUL/ DIV/ DIV R/M 4 x (16+48) = 256 opcodes INC
More informationLecture (07) x86 programming 6
Lecture (07) x86 programming 6 By: Dr. Ahmed ElShafee 1 The Flag Register 31 21 20 19 18 17 16 14 13 12 11 10 9 8 7 6 4 2 0 ID VIP VIF AC VM RF NT IOP 1 IOP 0 O D I T S Z A P C 8088/8086 80286 80386 80486
More informationVARDHAMAN COLLEGE OF ENGINEERING (AUTONOMOUS) Shamshabad, Hyderabad
Introduction to MS-DOS Debugger DEBUG In this laboratory, we will use DEBUG program and learn how to: 1. Examine and modify the contents of the 8086 s internal registers, and dedicated parts of the memory
More information8086 INTERNAL ARCHITECTURE
8086 INTERNAL ARCHITECTURE Segment 2 Intel 8086 Microprocessor The 8086 CPU is divided into two independent functional parts: a) The Bus interface unit (BIU) b) Execution Unit (EU) Dividing the work between
More informationArchitecture and components of Computer System Execution of program instructions
Execution of program instructions Microprocessor realizes each program instruction as the sequence of the following simple steps: 1. fetch next instruction or its part from memory and placing it in the
More informationEC-333 Microprocessor and Interfacing Techniques
EC-333 Microprocessor and Interfacing Techniques Lecture 4 Addressing Modes Dr Hashim Ali Spring - 2018 Department of Computer Science and Engineering HITEC University Taxila Slides taken from Computer
More informationMicroprocessor. By Mrs. R.P.Chaudhari Mrs.P.S.Patil
Microprocessor By Mrs. R.P.Chaudhari Mrs.P.S.Patil Chapter 1 Basics of Microprocessor CO-Draw Architecture Of 8085 Salient Features of 8085 It is a 8 bit microprocessor. It is manufactured with N-MOS technology.
More informationQ1: Multiple choice / 20 Q2: Memory addressing / 40 Q3: Assembly language / 40 TOTAL SCORE / 100
16.317: Microprocessor-Based Systems I Summer 2012 Exam 1 July 20, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationExperiment 3 3 Basic Input Output
Experiment 3 3 Basic Input Output Introduction The aim of this experiment is to introduce the use of input/output through the DOS interrupt. Objectives: INT Instruction Keyboard access using DOS function
More informationEEM336 Microprocessors I. Arithmetic and Logic Instructions
EEM336 Microprocessors I Arithmetic and Logic Instructions Introduction We examine the arithmetic and logic instructions. The arithmetic instructions include addition, subtraction, multiplication, division,
More informationScott M. Lewandowski CS295-2: Advanced Topics in Debugging September 21, 1998
Scott M. Lewandowski CS295-2: Advanced Topics in Debugging September 21, 1998 Assembler Syntax Everything looks like this: label: instruction dest,src instruction label Comments: comment $ This is a comment
More informationComputer Architecture and System Software Lecture 06: Assembly Language Programming
Computer Architecture and System Software Lecture 06: Assembly Language Programming Instructor: Rob Bergen Applied Computer Science University of Winnipeg Announcements Assignment 3 due thursday Midterm
More informationLecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86
Lecture 15 Intel Manual, Vol. 1, Chapter 3 Hampden-Sydney College Fri, Mar 6, 2009 Outline 1 2 Overview See the reference IA-32 Intel Software Developer s Manual Volume 1: Basic, Chapter 3. Instructions
More informationData Movement Instructions
Segment 3B Data Movement Instructions PUSH/POP Contents Load-Effective address (LEA, LDS, LES) String Data Transfer (LODS, STOS, MOVS) XCHG, XLAT IN and OUT Course Instructor Mohammed Abdul kader Lecturer,
More informationUNIT 2 PROCESSORS ORGANIZATION CONT.
UNIT 2 PROCESSORS ORGANIZATION CONT. Types of Operand Addresses Numbers Integer/floating point Characters ASCII etc. Logical Data Bits or flags x86 Data Types Operands in 8 bit -Byte 16 bit- word 32 bit-
More informationCC411: Introduction To Microprocessors
CC411: Introduction To Microprocessors OBJECTIVES this chapter enables the student to: Describe the Intel family of microprocessors from 8085 to Pentium. In terms of bus size, physical memory & special
More informationUS06CCSC04: Introduction to Microprocessors and Assembly Language UNIT 3: Assembly Language Instructions II
Unconditional & Conditional JUMP instructions: Conditional JUMP instructions: JA/JNBE Jump if above / Jump if not Below or Equal These two mnemonics represent the same instruction. The term above and below
More informationL1 Remember, L2 Understand, L3 - Apply, L4 Analyze, L5 Evaluate, L6 Create
Sample µp questions Syllabus: Microprocessors And Microcontrollers - 15CS44: Modules 1, 2, 3, 4, 5 Text book: Muhammad Ali Mazidi, Janice GillispieMazidi, Danny Causey, The x86 PC Assembly Language Design
More informationDefining and Using Simple Data Types
85 CHAPTER 4 Defining and Using Simple Data Types This chapter covers the concepts essential for working with simple data types in assembly-language programs The first section shows how to declare integer
More informationLogic Instructions. Basic Logic Instructions (AND, OR, XOR, TEST, NOT, NEG) Shift and Rotate instructions (SHL, SAL, SHR, SAR) Segment 4A
Segment 4A Logic Instructions Basic Logic Instructions (AND, OR, XOR, TEST, NOT, NEG) Shift and Rotate instructions (SHL, SAL, SHR, SAR) Course Instructor Mohammed Abdul kader Lecturer, EEE, IIUC Basic
More information22 Assembly Language for Intel-Based Computers, 4th Edition. 3. Each edge is a transition from one state to another, caused by some input.
22 Assembly Language for Intel-Based Computers, 4th Edition 6.6 Application: Finite-State Machines 1. A directed graph (also known as a diagraph). 2. Each node is a state. 3. Each edge is a transition
More informationSRI VENKATESWARA COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ECE EC6504 MICROPROCESSOR AND MICROCONTROLLER (REGULATION 2013)
SRI VENKATESWARA COLLEGE OF ENGINEERING AND TECHNOLOGY DEPARTMENT OF ECE EC6504 MICROPROCESSOR AND MICROCONTROLLER (REGULATION 2013) UNIT I THE 8086 MICROPROCESSOR PART A (2 MARKS) 1. What are the functional
More informationQuestion Bank Part-A UNIT I- THE 8086 MICROPROCESSOR 1. What is microprocessor? A microprocessor is a multipurpose, programmable, clock-driven, register-based electronic device that reads binary information
More information4- MACHINE LANGUAGE CODING 4-1THE INSTRUCTION SET:
4- MACHINE LANGUAGE CODING 4-1THE INSTRUCTION SET: The microprocessor's instruction set defines the basic operations that a programmer can specify to the device to perform. Table 4-1 contains list basic
More informationIntroduction to IA-32. Jo, Heeseung
Introduction to IA-32 Jo, Heeseung IA-32 Processors Evolutionary design Starting in 1978 with 8086 Added more features as time goes on Still support old features, although obsolete Totally dominate computer
More informationInternal architecture of 8086
Case Study: Intel Processors Internal architecture of 8086 Slide 1 Case Study: Intel Processors FEATURES OF 8086 It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 220 memory locations (1
More informationComputer Organization & Assembly Language Programming. CSE 2312 Lecture 15 Addressing and Subroutine
Computer Organization & Assembly Language Programming CSE 2312 Lecture 15 Addressing and Subroutine 1 Sections in 8088 Code TEXT section, for the processor instructions. DATA section for the initialization
More informationLecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit
Lecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit 1 1. introduction The internal function of 8086 processor are partitioned logically into processing units,bus Interface Unit(BIU)
More informationINTRODUCTION TO IA-32. Jo, Heeseung
INTRODUCTION TO IA-32 Jo, Heeseung IA-32 PROCESSORS Evolutionary design Starting in 1978 with 8086 Added more features as time goes on Still support old features, although obsolete Totally dominate computer
More information6/20/2011. Introduction. Chapter Objectives Upon completion of this chapter, you will be able to:
Introduction Efficient software development for the microprocessor requires a complete familiarity with the addressing modes employed by each instruction. This chapter explains the operation of the stack
More informationLABORATORY WORK NO. 7 FLOW CONTROL INSTRUCTIONS
LABORATORY WORK NO. 7 FLOW CONTROL INSTRUCTIONS 1. Object of laboratory The x86 microprocessor family has a large variety of instructions that allow instruction flow control. We have 4 categories: jump,
More informationPESIT Bangalore South Campus Hosur road, 1km before Electronic City, Bengaluru -100 Department of Electronics and Communication
USN 1 P E PESIT Bangalore South Campus Hosur road, 1km before Electronic City, Bengaluru -100 Department of Electronics and Communication INTERNAL ASSESSMENT TEST 1 Date : 26/02/2018 Marks: 40 Subject
More information8086 programming Control Flow Instructions and Program Structures
8086 programming Control Flow Instructions and Program Structures Example: write a procedure named Square that squares the contents of BL and places the result in BX. Square: PUSH AX MOV AL, BL MUL BL
More informationLesson 1. Fundamentals of assembly language
Lesson 1. Fundamentals of assembly language Computer Structure and Organization Graduate in Computer Sciences Graduate in Computer Engineering Graduate in Computer Sciences Graduate in Computer Engineering
More informationComputer Architecture and System Software Lecture 04: Floating Points & Intro to Assembly
Computer Architecture and System Software Lecture 04: Floating Points & Intro to Assembly Instructor: Rob Bergen Applied Computer Science University of Winnipeg Decimal Addition Review decimal addition
More informationAm186 and Am188 Family Instruction Set Manual. February, 1997
Am186 and Am188 Family Instruction Set Manual February, 1997 1997 Advanced Micro Devices, Inc. Advanced Micro Devices reserves the right to make changes in its products without notice in order to improve
More informationJones & Bartlett Learning, LLC NOT FOR SALE OR DISTRIBUTION 80x86 Instructions
80x86 Instructions Chapter 4 In the following sections, we review some basic instructions used by the 80x86 architecture. This Jones is by & no Bartlett means a Learning, complete list LLC of the Intel
More informationMr. Sapan Naik 1. Babu Madhav Institute of Information Technology, UTU
5 Years Integrated M.Sc.(IT) Semester 4 060010402 System Programming Question Bank Unit 1: Introduction 1. Write the decimal equivalent for each integral power of 2 from 2! to 2!". 2. Convert the following
More informationPESIT Bangalore South Campus
INTERNAL ASSESSMENT TEST 2 Date : 28/03/2016 Max Marks: 50 Subject & Code : Microprocessor (10CS45) Section: IV A and B Name of faculty: Deepti.C Time: 8:30-10:00 am Note: Answer any complete five questions
More informationMICROPROCESSOR PROGRAMMING AND SYSTEM DESIGN
MICROPROCESSOR PROGRAMMING AND SYSTEM DESIGN ROAD MAP SDK-86 Intel 8086 Features 8086 Block Diagram 8086 Architecture Bus Interface Unit Execution Unit 8086 Architecture 8086 Programmer s Model Flag Register
More informationicroprocessor istory of Microprocessor ntel 8086:
Microprocessor A microprocessor is an electronic device which computes on the given input similar to CPU of a computer. It is made by fabricating millions (or billions) of transistors on a single chip.
More informationThe x86 Architecture
The x86 Architecture Lecture 24 Intel Manual, Vol. 1, Chapter 3 Robb T. Koether Hampden-Sydney College Fri, Mar 20, 2015 Robb T. Koether (Hampden-Sydney College) The x86 Architecture Fri, Mar 20, 2015
More informationComplex Instruction Set Computer (CISC)
Introduction ti to IA-32 IA-32 Processors Evolutionary design Starting in 1978 with 886 Added more features as time goes on Still support old features, although obsolete Totally dominate computer market
More informationChapter 3: Addressing Modes
Chapter 3: Addressing Modes Chapter 3 Addressing Modes Note: Adapted from (Author Slides) Instructor: Prof. Dr. Khalid A. Darabkh 2 Introduction Efficient software development for the microprocessor requires
More informationCMSC 313 Lecture 07. Short vs Near Jumps Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR
CMSC 313 Lecture 07 Short vs Near Jumps Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR More Arithmetic Instructions NEG, MUL, IMUL, DIV Indexed Addressing:
More information