Generation of UVM compliant Test Benches for Automotive Systems using IP-XACT with UVM-SystemC and SystemC AMS
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1 Generation of UVM compliant Test Benches for Automotive Systems using IP-XACT with UVM-SystemC and SystemC AMS Ronan LUCAS (Magillem) Philippe CUENOT (Continental) Accellera Systems Initiative 1
2 Agenda Introduction IP-XACT extension for UVM Test bench generation Traceability Conclusion Accellera Systems Initiative 2
3 Introduction : Automotive Design with impact on... Vehicle System Electronic Development with impact on... Sub-System with impact on... Electronic Unit with impact on... SW µp ASIC ASIC Accellera Systems Initiative 3
4 Introduction : Virtual Prototype Make ECU model available before HW delivery HW-SW Co-design and function exploration System simulation for V&V cycle Digital simulation is state of the art (System-C) Mixed Signal ASICs SystemC-AMS as Executable Spec. Golden reference Investigate UVM (VERDI UVM-SC-AMS) Focus on ASIC Platform Execution Environment Virtual Platform ECU ASICs Accellera Systems Initiative 4
5 Introduction : System Under Test ASIC for Engine Management System Smart Power Supply as Design Under Test example with Communication interface Accellera Systems Initiative 5
6 Introduction: Test Bench Organization TOP Test UVM-SC-AMS organization Test Configuration (sample of the complete DUT) Virtual Sequence Scoreboard Trace Sequencer SPI Agent Driver Monitor Vin Agent Reset Agent Vout Agent Vif Vif Vif Vif DUT as SystemC-AMS Agent = ASIC feature - Test = Test Case Accellera Systems Initiative 6
7 IP-XACT for Specification driven Verification Flow From the specification to the UVM code, based on IEEE1685 IP-XACT standard to provide a unified specification for a verification component to exchange and share compatible components from multiple companies or services. HDL lib DUT assembly Testbench To enable efficient assembly and configuration of test bench, test and top level elements by generating the relevant SystemC and SystemC -AMS views netlist Accellera Systems Initiative 7
8 IP-XACT extensions for UVM Assembly Hierarchy and interconnections inside testbench follow the existing IEEE1685 standard Extension to identify : UVM test, virtual interface Connection of DUT to the testbench Accellera Systems Initiative 8
9 IP-XACT extensions for UVM Virtual Interface as an IP-XACT component : Bus Interface definition: Logical representation of interconnection with the UVC through the UVM configuration mechanism Ad hoc connections to represent the connections to the DUT through signals vin_vif ena_vif spi_vif DUT TEST UVC_SPI Vout_VIF Accellera Systems Initiative 9
10 IP-XACT extensions for UVM Configuration: Extension to store information in the central resource: UVM configuration database // record the configuration uvm::uvm_config_db< testbench_config* >::set(this,"m_tb0.*","my_tb_config",m_tb_config); Accellera Systems Initiative 10
11 IP-XACT extensions for UVM Agent of configuration: uvm_object defined by a name and instance name To configure each UVC in testbench through dedicated method defined by an unbounded list of parameters Contained : nested configuration description, virtual interface Configuration parameter is defined by a name, a value and a type virtual void configure_spi_agent_config ( spi_agent_config* config, uvm::uvm_active_passive_enum active, std::string in_file_name, spi_trans_config* m_spi_trans_cfg); spi_trans_config* m_spi_trans_cfg; spi_agent_config* m_spi_agent_cfg; m_spi_agent_cfg=spi_agent_config::type_id::create( "m_spi_agent_cfg",this); configure_spi_agent_config( m_spi_agent_cfg, UVM_ACTIVE, m_tb_config->spi_file_concat, m_spi_trans_cfg); Accellera Systems Initiative 11
12 Testbench generator Generator architecture TGI API to get meta-datas Template based to customize the outputs Generated files: sc-main test.h test.cpp testbench.h testbench.cpp testbench_cfg.h virtual_sequence.h template UVM-SC code Generator Internal model TGI API Accellera Systems Initiative 12
13 Template mechanism Text to customize the output: header, fix library, comments key words replaced by generator from an elaborated IP-XACT description // // Copyright 2013 Continental Automotive France SAS // All Rights Reserved //. // #include <systemc> #include <systemc-ams> #include <uvm.h> // Connect the Virtual Interfaces to the dut // // Copyright 2013 Continental Automotive France SAS // All Rights Reserved //. // #include <systemc> #include <systemc-ams> #include <uvm.h> #include "ena/v_regulator_if_ena.h" #include "vin/v_regulator_if_vin.h" #include "spi/v_regulator_if_spi.h" #include "vout/v_regulator_if_vout.h" #include "test.h" #include "reading_method.h" // Connect the Virtual Interfaces to the dut dut->enable_v(vif_v_regulator_ena->sig_enable_v); dut->trans_spi_cs_port(vif_v_regulator_spi->sig_tspi_cs_v); dut->trans_spi_sdi_port(vif_v_regulator_spi->sig_tspi_sdi_v);. Accellera Systems Initiative 13
14 Traceability of test requirements Fragments the Test specification in Minimum Reusable Unit during the import Builds IP-XACT test-bench Creates links between fragments and ip-xact elements of test-bench Netlists UVM test environment Traces the test requirements Analyzes the impact of change request Generates reports HDL lib DUT assembly netlist Testbench Accellera Systems Initiative 14
15 Treacability of test requirements Ensure the verification of all requirements defined in component specification Use case 1 : Evaluate the coverage of the requirements Use case 2 : Evaluate the impact of a change request on tests or DUT and identify non-regression test suite Test platform Test specification DUT Requirements Stimuli Trace Accellera Systems Initiative 15
16 Use Case 1 : Coverage report Requirements and tests are linked Coverage report shows : the requirements covered by the verification flow the last test execution Test specification Requirement specification Dependency Doc generator Require ment RQT_22 Test Stimuli Test Equip Test1 Test2 Test1/ana_stim1 Test1/spi_stim1 Test2/spi_stim2 RQT_23 Test1 Test1/ana_stim1 Test1/spi_stim1 RQT_24 test3 Test3/ana_stim1 Test3/spi_stim3 RQT_25??? DUT E33220 NI-8452 E3664 NI-8452 E33220 NI-8452 Test platform Stimuli Test specification Requirements Trace trace date Test1/trace1 05/10??? Test3/trace2 05/31 Accellera Systems Initiative 16
17 Use Case 2 : Impact Report A change request in the specification can impact test suite, DUT, UVCs Impact report shows the list of test involved by a change request or the consolidation of a change request Test platform Test specification DUT Requirements Stimuli Trace Requirem ent Test Test Effort Test Equip. Requirement specification Dependency Doc generator RQT_23 test1 2h E33220 NI-8452 RQT_24 test3 0.2h E3664 NI-8452 DUT Testbench Accellera Systems Initiative 17
18 Conclusion : Verification The IP-XACT description offers: A central repository to exchange tests cases between UVM expert and Verification team Simplify test case execution for verification team (user interface used only for configuration) An easy integration for traceability flow The UVM infrastructure offers: Organization of test versus IP features (reuse still to be investigated for interface configuration) Joining with the validation phase (today only stimuli) Accellera Systems Initiative 18
19 Thank you for your attention Questions? Accellera Systems Initiative 19 Accellera Systems Initiative
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