Corso di Elettronica dei Sistemi Programmabili

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1 Corso di Elettronica dei Sistemi Programmabili Sistemi Operativi Real Time freertos implementation Aprile 2014 Stefano Salvatori 1/40

2 Sommario RTOS tick Execution context Context switch example 2/40

3 RTOS Tick Oltre allo stato di esecuzione, un task può trovarsi in uno di questi stati: sleep block 3/40

4 RTOS Tick When sleeping, a task will specify a time after which it requires 'waking'. When blocking, a task can specify a maximum time it wishes to wait. 4/40

5 RTOS Tick Time measure The FreeRTOS real time kernel measures time using a tick count variable. A timer interrupt (the RTOS tick interrupt) increments the tick count with strict temporal accuracy - allowing the real time kernel to measure time to a resolution of the chosen timer interrupt frequency. 5/40

6 RTOS Tick At (1) the RTOS idle task is executing. At (2) the RTOS tick occurs, and control transfers to the tick ISR (3). The RTOS tick ISR makes vcontroltask ready to run, and as vcontroltask has a higher priority than the RTOS idle task, switches the context to that of vcontroltask. As the execution context is now that of vcontroltask, exiting the ISR (4) returns control to vcontroltask, which starts executing (5). 6/40

7 preempitive A context switch occurring in this way is said to be Preemptive, as the interrupted task is preempted without suspending itself voluntarily. The uc port of FreeRTOS uses a compare match event on a timer to generate the RTOS tick. In the following, the RTOS tick ISR is described in detail. In computing, preemption is the act of temporarily interrupting a task being carried out by a computer system, without requiring its cooperation, and with the intention of resuming the task at a later time. Such a change is known as a context switch. It is normally carried out by a privileged task or part of the system known as a preemptive scheduler, which has the power to preempt, or interrupt, and later resume, other tasks in the system. 7/40

8 FreeRTOS Tick Code /* */ /* Interrupt service routine for the RTOS tick. */ void SIG_OUTPUT_COMPARE1A( void ) { /* Call the tick function. */ vportyieldfromtick(); /* Return from the interrupt. If a context switch has occurred this will return to a different task. */ asm volatile ( "reti" ); } /* */ 8/40

9 FreeRTOS Tick Code void vportyieldfromtick( void ) { /* This is a naked function so the context is saved. */ portsave_context(); /* Increment the tick count and check to see if the new tick value has caused a delay period to expire. This function call can cause a task to become ready to run. */ vtaskincrementtick(); /* See if a context switch is required. Switch to the context of a task made ready to run by vtaskincrementtick() if it has a priority higher than the interrupted task. */ vtaskswitchcontext(); /* Restore the context. If a context switch has occurred this will restore the context of the task being resumed. */ portrestore_context(); /* Return from this naked function. */ asm volatile ( "ret" ); } /* */ 9/40

10 Execution Context es.: uc AVR 10/40

11 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ ); macro 11/40

12 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ ); r0 usato per salvare lo status register va salvato 12/40

13 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ ); r0 SR 13/40

14 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ ); interrupt disabilitati portsave_context potrebbe essere chiamata non dall'interno della ISR (che già disab. IRQ) p.es. un task che si autosospende 14/40

15 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ ); salvo SR perché la prima istruzione non può essere CLI? 15/40

16 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ ); salvo r1 16/40

17 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ ); r1 è azzerato (ISR di FreeRTOS vede se r1=0) 17/40

18 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ ); salvo tutti i registri della CPU 18/40

19 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ ); "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... è un puntatore "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ salva l'indirizzo nel registro X (r27-r26) della CPU La variabile pxcurrenttcb di FreeRTOS contiene l'indirizzo della locazione di memoria da cui recuperare lo stack pointer dei task (vd. più avanti) 19/40

20 Saving the Context #define portsave_context() asm volatile ( \ "push r0 \n\t" \ "in r0, SREG \n\t" \ "cli \n\t" \ "push r0 \n\t" \ "push r1 \n\t" \ "clr r1 \n\t" \ "push r2 \n\t" \ "push r3 \n\t" \ "push r4 \n\t" \ "push r5 \n\t" \... "push r30 \n\t" \ "push r31 \n\t" \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "in r0, SP_L \n\t" \ "st x+, r0 \n\t" \ "in r0, SP_H \n\t" \ "st x+, r0 \n\t" \ ); lo stack pointer viene salvato 20/40

21 Saving the Context #define portrestore_context() \ asm volatile ( \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "ld r28, x+ \n\t" \ "out SP_L, r28 \n\t" \ "ld r29, x+ \n\t" \ "out SP_H, r29 \n\t" \ "pop r31 \n\t" \ "pop r30 \n\t" \... "pop r1 \n\t" \ "pop r0 \n\t" \ "out SREG, r0 \n\t" \ "pop r0 \n\t" \ anche questa è una macro ); 21/40

22 Saving the Context #define portrestore_context() \ asm volatile ( \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "ld r28, x+ \n\t" \ "out SP_L, r28 \n\t" \ "ld r29, x+ \n\t" \ "out SP_H, r29 \n\t" \ "pop r31 \n\t" \ "pop r30 \n\t" \... "pop r1 \n\t" \ "pop r0 \n\t" \ "out SREG, r0 \n\t" \ "pop r0 \n\t" \ carica pccurrenttcb nel registro X della CPU pxcurrenttcb contiene l'indirizzo della locazione di memoria da cui recuperare lo stack pointer dei task ); 22/40

23 Saving the Context #define portrestore_context() \ asm volatile ( \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "ld r28, x+ \n\t" \ "out SP_L, r28 \n\t" \ "ld r29, x+ \n\t" \ "out SP_H, r29 \n\t" \ "pop r31 \n\t" \ "pop r30 \n\t" \... "pop r1 \n\t" \ "pop r0 \n\t" \ "out SREG, r0 \n\t" \ "pop r0 \n\t" \ ripristina lo stack pointer della CPU ); 23/40

24 Saving the Context #define portrestore_context() \ asm volatile ( \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "ld r28, x+ \n\t" \ "out SP_L, r28 \n\t" \ "ld r29, x+ \n\t" \ "out SP_H, r29 \n\t" \ "pop r31 \n\t" \ "pop r30 \n\t" \... "pop r1 \n\t" \ "pop r0 \n\t" \ "out SREG, r0 \n\t" \ "pop r0 \n\t" \ recupera tutti i registri della CPU ); 24/40

25 Saving the Context #define portrestore_context() \ asm volatile ( \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "ld r28, x+ \n\t" \ "out SP_L, r28 \n\t" \ "ld r29, x+ \n\t" \ "out SP_H, r29 \n\t" \ "pop r31 \n\t" \ "pop r30 \n\t" \... "pop r1 \n\t" \ "pop r0 \n\t" \ "out SREG, r0 \n\t" \ "pop r0 \n\t" \ recupera lo SR ); 25/40

26 Saving the Context #define portrestore_context() \ asm volatile ( \ "lds r26, pxcurrenttcb \n\t" \ "lds r27, pxcurrenttcb + 1 \n\t" \ "ld r28, x+ \n\t" \ "out SP_L, r28 \n\t" \ "ld r29, x+ \n\t" \ "out SP_H, r29 \n\t" \ "pop r31 \n\t" \ "pop r30 \n\t" \... "pop r1 \n\t" \ "pop r0 \n\t" \ "out SREG, r0 \n\t" \ "pop r0 \n\t" \ recupera infine r0 ); 26/40

27 Context Switch Detailed Example 27/40

28 Detailed example (1) Prior to the RTOS tick interrupt This example starts with TaskA executing. TaskB has previously been suspended so its context has already been stored on the TaskB stack. 28/40

29 Detailed example (2) The RTOS tick interrupt occurs The RTOS tick occurs just as TaskA is about to execute an LDI instruction. When the interrupt occurs the uc automatically places the current program counter (PC) onto the stack before jumping to the start of the RTOS tick ISR. auto 29/40

30 Detailed example (3) The RTOS tick interrupt executes /* Interrupt service routine for the RTOS tick. */ void SIG_OUTPUT_COMPARE1A( void ) { vportyieldfromtick(); asm volatile ( "reti" ); } void vportyieldfromtick( void ) { portsave_context(); vtaskincrementtick(); vtaskswitchcontext(); portrestore_context(); asm volatile ( "ret" ); } 30/40

31 Detailed example (4) void vportyieldfromtick( void ) { } portsave_context(); vtaskincrementtick(); vtaskswitchcontext(); portrestore_context(); asm volatile ( "ret" ); /40

32 Detailed example (5) void vportyieldfromtick( void ) { portsave_context(); vtaskincrementtick(); vtaskswitchcontext(); portrestore_context(); asm volatile ( "ret" ); } Incrementing the Tick Count vtaskincrementtick() executes after the TaskA context has been saved. For the purposes of this example assume that incrementing the tick count has caused TaskB to become ready to run. 32/40

33 Detailed example (6) void vportyieldfromtick( void ) { } portsave_context(); vtaskincrementtick(); vtaskswitchcontext(); portrestore_context(); asm volatile ( "ret" ); Incrementing the Tick Count TaskB has a higher priority than TaskA so vtaskswitchcontext() selects TaskB as the task to be given processing time when the ISR completes. 33/40

34 Detailed example (7) The TaskB stack pointer is retrieved void vportyieldfromtick( void ) { 1 } portsave_context(); vtaskincrementtick(); vtaskswitchcontext(); portrestore_context(); asm volatile ( "ret" ); 34/40

$counter remains on the stack. void vportyieldfromtick( void ) { portsave_context(); vtaskincrementtick(); vtaskswitchcontext(); portrestore_context(); asm volatile ( "ret" ); } 35/40$

35 Detailed example (8) Restore the TaskB context portrestore_context() completes by restoring the TaskB context from its stack into the appropriate processor registers Only the program counter remains on the stack. void vportyieldfromtick( void ) { portsave_context(); vtaskincrementtick(); vtaskswitchcontext(); portrestore_context(); asm volatile ( "ret" ); } 35/40

36 Detailed example (9) The RTOS tick exits vportyieldfromtick() returns to SIG_OUTPUT_COMPARE1A()... void vportyieldfromtick( void ) { portsave_context(); vtaskincrementtick(); vtaskswitchcontext(); portrestore_context(); asm volatile ( "ret" ); } 36/40

37 Detailed example (10) The RTOS tick exits vportyieldfromtick() returns to SIG_OUTPUT_COMPARE1A() where the final instruction is a return from interrupt (RETI). A RETI instruction assumes the next value on the stack is a return address placed onto the stack when the interrupt occurred. void SIG_OUTPUT_COMPARE1A ( void ) { vportyieldfromtick(); asm volatile ( "reti" ); } 37/40

38 Detailed example (11) The RTOS tick exits When the RTOS tick interrupt started the AVR automatically placed the TaskA return address onto the stack - the address of the next instruction to execute in TaskA. The ISR altered the stack pointer so it now points to the TaskB stack. Therefore the return address POP'ed from the stack by the RETI instruction is actually the address of the instruction TaskB was going to execute immediately before it was suspended. The RTOS tick interrupt interrupted TaskA, but is returning to TaskB the context switch is complete! 38/40

39 Detailed example (12) The RTOS tick interrupt interrupted TaskA, but is returning to TaskB the context switch is complete! /40

40 Riferimenti Richard Barry, FreeRTOS, at chapter 16, pp. 13, 14, /40

Corso di Elettronica dei Sistemi Programmabili

Corso di Elettronica dei Sistemi Programmabili Sistemi Operativi Real Time freertos implementation Aprile 2014 Stefano Salvatori 1/24 Sommario RTOS tick Execution context Context switch example 2/24 RTOS