Digital Logic Design (3)

Size: px

Start display at page:

Download "Digital Logic Design (3)"

Erica Fox
6 years ago
Views:

Digital Logic Design (3) ENGG1015 1 st Semester, 2010 Dr. Kenneth Wong Dr.

oolean algebra helps to simplify the oolean expression DeMorgan s theorems NND/NOR gates are universal gates Non-standard representation is equivalent to DeMorgan s theorems Canonical SOP/POS Today

table oolean logic expression Schematics Truth Table rithmetic rcuit Half adder Full adder Subtractor Schematics oolean Expression Example: This example illustrate the complete procedure for

1 Digital Logic Design (3) ENGG st Semester, 2010 Dr. Kenneth Wong Dr. Hayden So Department of Electrical and Electronic Engineering Last lecture ll logic functions can be represented as (1) truth table (2) schematics (3) oolean expressions, interchangeably Laws of oolean algebra helps to simplify the oolean expression DeMorgan s theorems NND/NOR gates are universal gates Non-standard representation is equivalent to DeMorgan s theorems Canonical SOP/POS Today Conversion through 3 representations Simplification of oolean expressions oolean algebra Karnaugh map Representing Logic Operations Each function can be represented equivalently in 3 ways: Truth table oolean logic expression Schematics Truth Table rithmetic rcuit Half adder Full adder Subtractor Schematics oolean Expression Example: This example illustrate the complete procedure for designing a logic circuit. Suppose the logic circuit having 3 inputs,,, C will have its output HIGH only when a majority of the inputs are HIGH. Step 1 Set up the truth table Step 2 Write the ND term for each case where the output is a 1. Step 3 Write the SOP form the output x = C + C + C + C Step 4 Simplify the output expression x = C + C + C + C + C + C = C( + ) + C( + ) + ( C + C) = C + C + Step 5 Implement the circuit C x Example: Conversion through the opposite direction: Step 1 Start from the circuit Step 2 Obtain oolean expression from the circuit (in SOP form) y = C + C + C Step 3 Write the truth table y Schematics C C Truth Table C y oolean Expression

2 Forms of oolean Expressions There are two general forms of logic expression: SOP, POS Sum-of-products form (SOP) first the product (ND) terms are formed then these are summed (OR) eg: C + DEF + GHI Product-of-sum form (POS) first the sum (OR) terms are formed then the products are taken (ND) eg: (++C)(D+E+F)(G+H+I) It is possible to convert between these two forms using oolean algebra Simplifying Logic rcuits Once the expression for a logic circuit is obtained, we may try to simplify it, so that the implementation requires fewer gates Example: below two circuits are the same, but the second one is much more simpler Two methods for simplifying lgebraic method (use oolean algebra theorems) Karnaugh mapping method (systematic, step-by-step approach) Minimization by oolean lgebra Make use of relationships and theorems of oolean algebra to simplify the expressions this method relies on your algebraic skill Mainly consists of two steps: The original expression is put into SOP form by repeated application of DeMorgan s theorems and multiplication of terms Once the original expression is in SOP form, the product terms are checked for common factors, and factoring is performed wherever possible Example: Simplify z = C + ( C) z = C + ( + C) [by DeMorgan thm] = C + ( + C) [cancel double inverions] = C + + C = C + + C [ = ] = C( + ) + = C + [ + = 1] Example: Simplify z = C + C + C The expression is already in SOP form z = ( C + C) + C = (1) + C = + C = ( + C) = ( + C) [by rule 11 in previous chapter] Example: Simplify x = ( + )( + + D) D x = D + D + DD + D + D + DD = D + D + D [ = 0 and DD = 0] = D( + + 1) [factoring] = D [ + = 1 and 1+1=1] = ( C + ) Example: Simplify z = C( D) + CD + C First expand it into SOP form z = C( + + D) + CD + C [DeMorgan thm] = C + C + CD + CD + C = C + CD + CD + C [ = 0] Then look for the largest common factor between any two or more product terms: first and last terms have C, while the second and third terms share D Grouping the terms gives z = C( + ) + D( C + C) = C + D( C + ) [by + = 1, C + C = C + ] We might think that the above expression is the simplest since it cannot be simplified further However, in fact, the simplest form of this equation is z = D + C It turns out that we missed an operation earlier that could have led to the simpler form Question: How could we have known that we missed a step?? ns: There is no way we can know. This illustrate the frustration often encountered in oolean simplification Minimization by Karnaugh Maps What is a Karnaugh map? Karnaugh map (K map) is a graphical tool used to simplify a logic equation or to convert a truth table to its corresponding logic circuit With a simple and orderly process, the resulting logic expression will be in its simplest SOP form!!! K map format: 3 Variable K map: 0 1 grid of squares Each square represents one product term eg: top-left represents C, bottom-right represents C The variables are ordered according to Gray code only one variable changes between adjacent squares Squares on edges are considered adjacent to squares on opposite edges

$4 Variable K map \CD 00 01 11 10 00 01??? 11 10 The square marked? represents C D The square marked?? represents C D Note that they differ in only the C variable.$

3 4 Variable K map \CD ??? The square marked? represents C D The square marked?? represents C D Note that they differ in only the C variable. Karnaugh maps become clumsier to use with more than 4 variables General procedure for using K map: 1. Fill out the K map for a given oolean expression 2. Simplify the expression by properly combining those squares in the K map that contains 1s. This process is called looping Filling out a Karnaugh Map Given an initial (unsimplified) logic oolean expression Write the expression in SOP form For each product term, write a 1 in all the squares which are included in the term, 0 elsewhere ll variables present in the product term: one square One variable missing: two adjacent squares Two terms missing: 4 adjacent squares Example 1: X = C + C + C + C Example 2: X = C + C + C Example 3: X = + C Looping Minimization is done by spotting patterns of 1's and 0's Pairs of adjacent 1's (Looping groups of two) remember that adjacent squares differ by only one variable hence the combination of 2 adjacent squares has the form this can be simplified (from before) to just P Example 1 (continue) X = C + C + C + C P + ( ) -- the adjacent squares C and C differ only in -- hence they can be combined into just C, indicated by the blue loop -- looping can also be done by grouping C and C to give C, as indicated by the red loop -- furthermore, looping can also be done by grouping C and C to give, as indicated by the yellow loop -- The simplified oolean equation is one that sums all the terms corresponding to each of the group: X = C + C + More examples on looping of two Looping group of four (quads) K map may contain a group of four 1s that are adjacent to each other. This group is called quad Looping a quad of adjacent 1s eliminates the two variables that appear in both complemented and uncomplemented form Looping group of eight (Octets) group of eight 1s that are adjacent to one another is called an octet Looping an octet of adjacent 1s eliminates the three variables that appear in both complemented and uncomplemented form

4 Complete Simplification Process 1. Construct the K map and place 1s and 0s in the squares according to the truth table. 2. Group the isolated 1s which are not adjacent to any other 1s. (single loops) 3. Group any pair which contains a 1 adjacent to only one other 1. (double loops) 4. Group any octet even if it contains one or more 1s that have already been grouped. 5. Group any quad that contains one or more 1s that have not already been grouped, making sure to use the minimum number of groups. 6. Group any pairs necessary to include any 1s that have not yet been grouped, making sure to use the minimum number of groups. 7. Form the OR sum of all the terms generated by each group. \CD Step2. Isolated 1: None Step3. djacent to only one 1: None Step4. Octet: None Step5. Quad: lue and red loops Step6. ll 1s have been looped => skip this step \CD Step2. Isolated 1: None Step3. djacent to only one 1: red loop Step4. Octet: None Step5. Quad: Green loops Step6. ll 1s have been looped => skip this step + CD D + C More examples S2. Isolated 1: loop 4 S3. djacent to only one 1: loop 11,15 S4. Octet: None S5. Quad: loop 6,7,10,11 S6. ll 1s have been looped => skip S2. Isolated 1: None S3. djacent to only one 1: loop 3,7 S4. Octet: None S5. Quad: loop 5,6,9,10 and loop 5,6,7,8 S6. ll 1s have been looped => skip S2. Isolated 1: None S3. djacent to only one 1: loop 2,6, loop 7,8, loop 11,15 and loop 9,10 S4-S6. ll 1s have been looped => skip rithmetic circuit Recall the binary addition process S LS Column has 2 inputs 2 outputs Inputs: Outputs: 0 S 0 0 C 1 Other Columns have 3 inputs, 2 outputs Inputs: n n C n Outputs: S n C n+1 We use a "half adder" to implement the LS column We use a "full adder" to implement the other columns Each column feeds the next-most-significant column. Half dder Truth Table oolean Equations Implementation S C S = + = C = Note also XOR implementation possible for S 1 S C Full dder Truth Table oolean Equations S = = Co = = + + = + ( + ) S Co Complete circuitry for a F

Parallel dder The full adder obtained in the previous slide can only add two single bit (plus a carry bit) In order to add two multi-bit numbers, we use 1 full adder per bit of the numbers The carry

5 Parallel dder The full adder obtained in the previous slide can only add two single bit (plus a carry bit) In order to add two multi-bit numbers, we use 1 full adder per bit of the numbers The carry is propagated from one stage to the next most significant stage takes some time to work because of the carry propagation delay which is n times the propagation delay of one stage 4-bit Parallel inary dders (74LS283) 2-bit Parallel inary dders Parallel Subtraction using Parallel dder Subtraction can be achieve by adding the complement E.g.: 6-3 = 6 + (-3) = 3 2's complement :- invert all bits and then add 1 Invert all the inputs bits of Use Carry-in of first stage for the "add 1" In conclusion Conversion through 3 representations Simplification of oolean expressions oolean algebra Karnaugh map rithmetic rcuit Half adder Full adder Subtractor

Points Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map

Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions Sum-of-Products (SOP),