# Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine

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1 Machine Language Instructions Introduction Instructions Words of a language understood by machine Instruction set Vocabulary of the machine Current goal: to relate a high level language to instruction set of a machine Machine language vs. human language (restricted programming language) Most machines speak similar languages, or dialect of the same language Similar operations in a formal language (arithmetic, comparison) Close to like learning to drive one car mips instruction set Used by nec, Nintendo, Silicon Graphics, and Sony Designed since the early 1980s Hardware operations Arithmetic mips assembly language instruction Equivalent C statement: a = b + c; add a, b, c Too rigid in nature; to perform a = b + c + d + e; you have to do the following: add a, b, c # a = b + c add a, a, d # a = b + c + d add a, a, e # a = b + c + d + e Each line can contain only one instruction, and the instruction does not achieve much more than a primitive operation Comments terminate at the end of line Same number of operands for each instruction (three above) Keeping number of operands constant keeps hardware simple Design Principle 1 Simplicity favors regularity. Compiling a simple C program into mips assembly C Program Assembly a = b + c; add a, b, c d = a - e; sub d, a, e Compiling a slightly complex C program into mips assembly C Program Assembly f = ( g + h ) - ( i + j ) add t0, g, h add t1, i, j sub f, t0, t1 Somehow, the compiler needs to know to perform both additions before performing subtraction, and to use temporary variables

4 Machine Language Instructions 4 Registers are part of every instruction Registers \$s0 to \$s7 map onto registers 16 to 23 Registers \$t0 to \$t7 map onto registers 8 to 15 Translating a mips assembly instruction into machine language Consider the instruction add \$t0, \$s1, \$s2 Decimal representation \$s1 \$s2 \$t0 unused + Six fields, with field 0 and 5 indicating the operation to be performed, field 4 unused, and other fields indicating the registers to be used Binary representation in 32-bits bits 5 bits 5 bits 5 bits 5 bits 6 bits op rs rt rd shamt funct Layout of instruction is called instruction format All mips instructions are 32-bit long Numeric version is called machine instruction Sequence of machine instructions is called machine code mips fields Six fields are identified as op Basic operation, or opcode, described in 6 bits rs First register source operand rt Second register source operand rd Register destination shamt Shift amount, used in shift instructions funct Function; specific variant of operation in op field, also called function code Problem lw specifies two registers and a constant Limiting constant to 5 bits limits the offset to just 32; too small to be useful for accessing large arrays or structures Conflict to keep all instructions the same length and desire for a single instruction format Design Principle 3 Good design demands good compromises. mips compromise is to have the same length for all instructions but different format R-type format (register type) I-type format (data transfer instructions) op rs rt address 6 bits 5 bits 5 bits 16 bits 16-bit address allows access to an address in a range of ±2 15 from the base address (± bytes, ±2 13 or ±8192 words), base address is contained in register rs Consider the instruction: lw \$t0, 32(\$s3) # \$t0 = A[8] op rs rt address x23 0x13 0x08 0x0020

5 Machine Language Instructions 5 The rt field specifies the destination for this instruction, to receive the result of load (it was second source in R-type instruction) Complexity is reduced by keeping the instruction format similar First three fields in both R-type and I-type instructions are the same in length and name Formats are distinguished by the op field The funct field is recognized based on the bit pattern in the op field Example: Assume that base of A is in \$t1 and h corresponds to \$s2 C Program Assembly A[300] = h + A[300] lw \$t0, 1200(\$t1) # \$t0 = A[300] add \$t0, \$s2, \$t0 # \$t0 = h + A[300] sw \$t0, 1200(\$t1) # A[300] = h + A[300] Equivalent machine code is: 0x23 0x09 0x08 0x04B0 0x00 0x12 0x08 0x08 0x00 0x20 0x2B 0x09 0x08 0x04B0 For I-type instructions, base register is specified in second field (rs), destination (or source) is specified in third field (rt), and the offset in final field For R-type instructions, we need funct in sixth field, two source operands in second and third fields, and destination in fourth field The op for lw and sw differs in just one bit, with no difference in the rest of the fields Stored program concept Both instructions and data are kept in memory as bit patterns (or binary numbers) mips has 32 general purpose registers, each of length 32 bits mips can address 2 32 bytes (2 30 words) of memory Making decisions Conditional branches Decision making is implemented in a high level language by using an if statement Decision making in mips assembly language Start with two instructions beq register1, register2, label if ( register1 == register2 ) goto label bne register1, register2, label if ( register1!= register2 ) goto label Mnemonics are equivalent to branch if equal and branch if not equal, and are known as conditional branches Compiling C code into mips assembly; assume g, h, i, j, k correspond to registers \$s0 through \$s4 C Program Assembly if ( i == j ) go to L1; beq \$s2, \$s3, L1 f = g + h; add \$s0, \$s1, \$s2 L1: f = f - i; L1: sub \$s0, \$s0, \$s2 Label L1 corresponds to the address of the subtract instruction Modern programming languages almost never have any goto-statement, or discourage their use (see Compiling if-then-else into conditional branches

7 Machine Language Instructions 7 while ( save[i] == k ) i = i + j; Modified C loop LOOP: if ( save[i]!= k ) go to EXIT; i = i + j; go to LOOP; EXIT: mips assembly code # Load save[i] into temporary register LOOP: add \$t1, \$s3, \$s3 # \$t1 = 2 * i add \$t1, \$t1, \$t1 # \$t1 = 4 * i add \$t1, \$t1, \$s6 # \$t1 = save + 4 * i -- &save[i] lw \$t0, 0(\$t1) # \$t0 = save[i] EXIT: bne \$t0, \$s5, EXIT # if ( save[i]!= k ) go to EXIT add \$s3, \$s3, \$s4 # i = i + j j LOOP # go to LOOP Comparing two numbers to find out which is larger Achieved by the instruction slt, (set on less than) The instruction slt \$t0, \$s1, \$s2 sets register \$t0 to 1 if \$s1 is less than \$s2; otherwise, it is reset (or set to 0) slt is R-type instruction, and instruction such as slt \$s1, \$s2, \$s3 translates as follows: op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits beq 0x00 0x12 0x13 0x17 0x00 0x2A The \$zero register Conditions mips compiler uses the register \$zero to read the result of all conditional expressions Register \$zero is mapped to register 0 Compiling a less than test The C statement if ( a < b ) go to LESS; mips assembly code slt \$t0, \$s0, \$s1 # \$t0 = ( \$s0 < \$s1 )? 1 : 0; bne \$t0, \$zero, LESS # if ( \$t0!= 0 ) go to LESS; mips isa does not have an instruction to compare and branch in a single instruction but uses two faster and simpler instructions to achieve the effect slt is an R-type instruction Case/switch statement Consider the C code

10 Machine Language Instructions 10 int foobar ( const int g, const int h, const int i, const int j ) { int f = ( g + h ) - ( i + j ); } return ( f ); In assembly language: foobar: sub \$sp, \$sp, 12 # Make room for three words sw \$t1, 8(\$sp) # Save registers \$s0, \$t0, and \$t1 sw \$t0, 4(\$sp) sw \$s0, 0(\$sp) # Variables g, h, i, j correspond to \$a0, \$a1, \$a2, \$a3 add \$t0, \$a0, \$a1 # ( g + h ) add \$t1, \$a2, \$a3 # ( i + j ) sub \$v0, \$t0, \$t1 # ( g + h ) - ( i + j ); into return value lw \$s0, 0(\$sp) # Restore registers lw \$t0, 4(\$sp) lw \$t1, 8(\$sp) add \$sp, \$sp, 12 # Adjust stack pointer jr \$ra # Return to caller Convention to reduce register spilling Saved registers (\$s0 \$s7) must be saved by the called procedure and restored before return Temporary registers (\$t0 \$t9) need not be preserved by the called procedure The convention implies that we could have reduced the saving and restoration steps for temporary registers in the above code Nested procedures Procedures that do not call other procedures are known as leaf procedures All the registers, including \$ra and temporaries may need to be preserved, using the stack Recursive procedures may make it even more tough Compiling a recursive procedure to compute factorial int fact ( const int n ) { if ( n < 1 ) return ( 1 ); } return ( n * fact ( n - 1 ) ); Parameter n is the argument or \$a0 Assembly code

14 Machine Language Instructions 14 Compiler Assembler Pseudoinstructions Object file Machine language instructions Data allocation Information to put the instructions in memory (format) Symbol table Object file format Header Size and position of other pieces of file Text segment Actual machine language code Data segment Static data Dynamic data Relocation information Instructions and data words that depend on absolute addresses Symbol table Undefined symbols such as extern variables Debugging information Associating machine instructions with source language statements Linker, or linkage editor Loader Putting together independently assembled modules Place code and data modules symbolically in memory Determine the addresses of data and instruction labels Patch both the internal and external references Executable file Read executable file header to determine the size of text and data segments Allocate memory to hold text and data Copy text (instructions) and data from executable file into memory Copy parameters for main() to stack Initialize machine registers and stack pointer Start the program Examples on swap and sort Reading assignment Arrays versus pointers

15 Machine Language Instructions 15 Refer to earlier example on strcpy function, comparing with the one in the book C compiler treats arrays as pointers #include <iostream> int main() { using namespace std; int a[] = { 1, 2, 3, 4, 5, 6, 7, 8 }; cout << "a[6] = " << a[6] << endl; cout << "6[a] = " << 6[a] << endl; } return ( 0 ); The above code works because a[i] gets translated internally to *( a + i ) PowerPC and 80x86 ISA Instruction complexity, clock speed, and number of instructions executed by a given program IBM/Motorola PowerPC Similar to mips in most respects 32 integer registers Each instruction is 32-bits long Data transfer possible only through load and store Two more addressing modes and a few operations Indexed addressing Allows two registers to be added together during instruction execution mips code add \$t0, \$a0, \$s3 # \$a0 is array base; \$s3 is index lw \$t1, 0(\$t0) # \$t1 = \$a0[\$s3] PowerPC code lw \$t1, \$a0 + \$s3 # \$t1 = \$a0[\$s3] Update addressing Look at our pointer arithmetic version of strcpy Automatically increment the base pointer mips code lw \$t0, 4(\$s3) # \$t0 = *(\$s3 + 4 ) addi \$s3, \$s3, 4 # \$s3 += 4 PowerPC code lwu \$t0, 4(\$s3) # \$t0 = *(\$s3 + 4 ); \$s3 += 4 New instructions Load multiple and store multiple Transfer up to 32 words of data in one instruction; useful for copying large data Special counter register to speed up loops

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