Introduction to Micro-controller Software. Gary J. Minden September 3, 2013

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1 Introduction to Micro-controller Software Gary J. Minden September 3,

2 Microcontroller Software How developed Language (C) Tools Organization/Structure How deployed Organization in memory How executed 2

3 Tools -- Code Composer 3

4 Tools -- Behind Code Composer Your Program cpp cc A *.c *.c (Expanded) *.s *.asm (Assembler Code) *.h Definitions of Code you use (reference) 4

5 Tools -- Behind Code Composer A as ld B *.o (Object) *.bin *.out (Complete Program) *.lst *.o *.a Other programs Libraries *.map 5

6 Debugger 6

7 Debugging B Debug PC Putty Serial Communications LM3S1968 Eval Board 7

8 Typical C File static unsigned long Task0NextExecute = 0; static unsigned long Task0DeltaExecute = 50; // 50 SysTicks void Task0_Init() { // // Enable the GPIO Port G. // SysCtlPeripheralEnable( SYSCTL_PERIPH_GPIOG ); // // Configure GPIO_G to drive the Status LED. // GPIOPinTypeGPIOOutput( GPIO_PORTG_BASE, GPIO_PIN_2 ); 8

9 Typical Assembly Language ; ; 73 int W, X, Y, Z; ; LDR V1, [SP, #16] ; 72 ; ; 75 W = A + B + C; ; ADDS A1, A2, A1 ; 75 ADDS V2, A3, A1 ; 75 ; ; 76 X = B + C + D; ; ADDS A1, A3, A2 ; 76 ADDS A2, A4, A1 ; 76 ; ; 77 Y = C + D + E; ; ADDS A1, A4, A3 ; 77 ADDS A3, V1, A1 ; 77 ;

10 Typical Listing File Task0_Init: 361 ;* * 362.dwcfi cfa_offset, B510 PUSH {V1, LR} ; [DPU_3_PIPE] ; [ORIG 16-BIT INS] 364.dwcfi cfa_offset, dwcfi save_reg_to_mem, 14, dwcfi cfa_offset, dwcfi save_reg_to_mem, 4, dwcfi cfa_offset, dwpsn file "../Task_Blinky.c",line 90,column 5,is_stmt,isa B LDR A1, $C$CON1 ; [DPU_3_PIPE] 90 ; [ORIG 16-BIT INS] 371 $C$DW$52.dwtag DW_TAG_TI_branch 372.dwattr $C$DW$52, DW_AT_low_pc(0x00) 373.dwattr $C$DW$52, DW_AT_name("SysCtlPeripheralEnable") 374.dwattr $C$DW$52, DW_AT_TI_call FFFEF7FF! BL SysCtlPeripheralEnable ; [DPU_3_PIPE] 90 ; [KEEP 32-BIT INS] 376 ; CALL OCCURS {SysCtlPeripheralEnable } ; [] dwpsn file "../Task_Blinky.c",line 96,column 5,is_stmt,isa C0A LDR V1, $C$CON2 ; [DPU_3_PIPE] 96 ; [ORIG 16-BIT INS] Relative Memory Address 10

11 Typical Listing File Task0_Init: 361 ;* * 362.dwcfi cfa_offset, B510 PUSH {V1, LR} ; [DPU_3_PIPE] ; [ORIG 16-BIT INS] 364.dwcfi cfa_offset, dwcfi save_reg_to_mem, 14, dwcfi cfa_offset, dwcfi save_reg_to_mem, 4, dwcfi cfa_offset, dwpsn file "../Task_Blinky.c",line 90,column 5,is_stmt,isa B LDR A1, $C$CON1 ; [DPU_3_PIPE] 90 ; [ORIG 16-BIT INS] 371 $C$DW$52.dwtag DW_TAG_TI_branch 372.dwattr $C$DW$52, DW_AT_low_pc(0x00) 373.dwattr $C$DW$52, DW_AT_name("SysCtlPeripheralEnable") 374.dwattr $C$DW$52, DW_AT_TI_call FFFEF7FF! BL SysCtlPeripheralEnable ; [DPU_3_PIPE] 90 ; [KEEP 32-BIT INS] 376 ; CALL OCCURS {SysCtlPeripheralEnable } ; [] dwpsn file "../Task_Blinky.c",line 96,column 5,is_stmt,isa C0A LDR V1, $C$CON2 ; [DPU_3_PIPE] 96 ; [ORIG 16-BIT INS] Instruction Mnemonic 11

12 Typical Listing File Task0_Init: 361 ;* * 362.dwcfi cfa_offset, B510 PUSH {V1, LR} ; [DPU_3_PIPE] ; [ORIG 16-BIT INS] 364.dwcfi cfa_offset, dwcfi save_reg_to_mem, 14, dwcfi cfa_offset, dwcfi save_reg_to_mem, 4, dwcfi cfa_offset, dwpsn file "../Task_Blinky.c",line 90,column 5,is_stmt,isa B LDR A1, $C$CON1 ; [DPU_3_PIPE] 90 ; [ORIG 16-BIT INS] 371 $C$DW$52.dwtag DW_TAG_TI_branch 372.dwattr $C$DW$52, DW_AT_low_pc(0x00) 373.dwattr $C$DW$52, DW_AT_name("SysCtlPeripheralEnable") 374.dwattr $C$DW$52, DW_AT_TI_call FFFEF7FF! BL SysCtlPeripheralEnable ; [DPU_3_PIPE] 90 ; [KEEP 32-BIT INS] 376 ; CALL OCCURS {SysCtlPeripheralEnable } ; [] dwpsn file "../Task_Blinky.c",line 96,column 5,is_stmt,isa C0A LDR V1, $C$CON2 ; [DPU_3_PIPE] 96 ; [ORIG 16-BIT INS] Instruction Operands 12

13 Typical Listing File Task0_Init: 361 ;* * 362.dwcfi cfa_offset, B510 PUSH {V1, LR} ; [DPU_3_PIPE] ; [ORIG 16-BIT INS] 364.dwcfi cfa_offset, dwcfi save_reg_to_mem, 14, dwcfi cfa_offset, dwcfi save_reg_to_mem, 4, dwcfi cfa_offset, dwpsn file "../Task_Blinky.c",line 90,column 5,is_stmt,isa B LDR A1, $C$CON1 ; [DPU_3_PIPE] 90 ; [ORIG 16-BIT INS] 371 $C$DW$52.dwtag DW_TAG_TI_branch 372.dwattr $C$DW$52, DW_AT_low_pc(0x00) 373.dwattr $C$DW$52, DW_AT_name("SysCtlPeripheralEnable") 374.dwattr $C$DW$52, DW_AT_TI_call FFFEF7FF! BL SysCtlPeripheralEnable ; [DPU_3_PIPE] 90 ; [KEEP 32-BIT INS] 376 ; CALL OCCURS {SysCtlPeripheralEnable } ; [] dwpsn file "../Task_Blinky.c",line 96,column 5,is_stmt,isa C0A LDR V1, $C$CON2 ; [DPU_3_PIPE] 96 ; [ORIG 16-BIT INS] Hardware Instruction 13

14 Typical Listing File Task0_Init: 361 ;* * 362.dwcfi cfa_offset, B510 PUSH {V1, LR} ; [DPU_3_PIPE] ; [ORIG 16-BIT INS] 364.dwcfi cfa_offset, dwcfi save_reg_to_mem, 14, dwcfi cfa_offset, dwcfi save_reg_to_mem, 4, dwcfi cfa_offset, dwpsn file "../Task_Blinky.c",line 90,column 5,is_stmt,isa B LDR A1, $C$CON1 ; [DPU_3_PIPE] 90 ; [ORIG 16-BIT INS] 371 $C$DW$52.dwtag DW_TAG_TI_branch 372.dwattr $C$DW$52, DW_AT_low_pc(0x00) 373.dwattr $C$DW$52, DW_AT_name("SysCtlPeripheralEnable") 374.dwattr $C$DW$52, DW_AT_TI_call FFFEF7FF! BL SysCtlPeripheralEnable ; [DPU_3_PIPE] 90 ; [KEEP 32-BIT INS] 376 ; CALL OCCURS {SysCtlPeripheralEnable } ; [] dwpsn file "../Task_Blinky.c",line 96,column 5,is_stmt,isa C0A LDR V1, $C$CON2 ; [DPU_3_PIPE] 96 ; [ORIG 16-BIT INS] Comments 14

15 Tools -- Behind Code Composer A as ld B *.o (Object) *.bin *.out (Complete Program) *.lst *.o *.a Other programs Libraries *.map 15

16 Typical Map File SEGMENT ALLOCATION MAP run origin load origin length init length attrs members a a8 r-x c c r--.intvecs c c c c r-x.text r--.cinit rw rw-.stack rw rw-.data Segment Memory Start Address Segment Memory Size (Bytes) Segment Init. Size (Bytes) Segment Attributes Segment Name Segment == Section Values in Hex 16

17 CPU/Memory Structure Data Path Memory Addresses Data Memory Instruction Processing CPU 17

18 Memory Structure Address Array of data bytes Grouped 4-bytes to a Word, 32-bit words CPU provides address CPU reads (copies) data from memory to CPU OR CPU writes new data to Memory To/From Memory & I/O Bus 18

19 LM3S1968 Memory Map Peripherals 0x400F EFFF 0x Variables Stack SRAM 0x2000 FFFF 0x KB Programs Constants Interrupt Vectors Flash 0x0003 FFFF 0x KB 19

EECS 388 Embedded Systems Example Program Structure. Gary J. Minden August 24, 2016

EECS 388 Embedded Systems Example Program Structure Gary J. Minden August 24, 2016 1 EECS 388 Program Structure Initial program structure A set of Main, Tasks, and Timer Tasks consists of: Task variables