The Motorola 68HC11 Instruc5on Set

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1 The Motorola 68HC11 Instruc5on Set

2 Some Defini5ons A, B * accumulators A and B D * double accumulator (A + B) IX, IY * index registers X and Y SP * stack pointer M * some memory loca5on opr * an operand r * remainder aner division S,X,H,I,N,Z,V,C * individual bits in the condi5on code register 2

3 Condi5on Code Register (CCR) S STOP Disable (prevents opera5on of STOP) X, I to do with the interrupt system (covered later) H half carry set when there is a carry between bits 3 and 4 (useful for some BCD opera5ons) N nega5ve set when the result of an arithme5c or logic opera5on is nega5ve (MSB = 1) Z zero set when the result of an arithme5c or logic opera5on is zero V overflow set when the result of an arithme5c or logic opera5on overflows the accumulator C carry 8 th bit of an arithme5c or logic opera5on 3

4 Data Transfer Instruc5ons 1 LDAA (opr) M A load accumulator A LDAB (opr) M B load accumulator B LDD (opr) M A, M+1 B load double accumulator D LDS (opr) M:M+1 SP load stack pointer LDX (opr) M:M+1 IX load index register X LDY (opr) M:M+1 IY load index register Y STAA (opr) A M store accumulator A STAB (opr) B M store accumulator B STD (opr) A M, B M+1 store double accumulator D STS (opr) SP M:M+1 store stack pointer STX (opr) IX M:M+1 store index register X STY (opr) IY M:M+1 store index register Y 4

5 Data Transfer Instruc5ons 2 CLR (opr) 0 M clear memory byte CLRA 0 A clear accumulator A CLRB 0 B clear accumulator B XDGX D IX, IX D exchange D with IX XDGY D IY, IY D exchange D with IY TAB A B transfer A to B TBA B A transfer B to A TSX SP+1 IX transfer SP to IX TSY SP+1 IY transfer SP to IY TXS IX- 1 SP transfer IX to SP TYS IY- 1 SP transfer IY to SP 5

6 Increment/Decrement INC (opr) M+1 M increment memory byte INCA A+1 A increment accumulator A INCB B+1 B increment accumulator B INS SP+1 SP increment stack pointer INX IX+1 IX increment IX INY IY+1 IY increment IY DEC (opr) M- 1 M decrement memory byte DECA A- 1 A decrement accumulator A DECB B- 1 B decrement accumulator B DES SP- 1 SP decrement stack pointer DEX IX- 1 IX decrement IX DEY IY- 1 IY decrement IY 6

7 Arithme5c 1 ABA A+B A add A to B ADCA (opr) A+M+C A add with carry to A ADCB (opr) B+M+C B add with carry to B ADDA (opr) A+M A add memory to A ADDB (opr) B+M B add memory to B ADDD (opr) D+M:M+1 D add 16- bit to D SBA A- B A subtract B from A SBCA (opr) A- M- C A subtract with carry from A SBCB(opr) B- M- C B subtract with carry from B SUBA (opr) A- M A subtract memory from A SUBB (opr) B- M B subtract memory from B SUBD (opr) D- M:M+1 D subtract memory from D 7

8 Arithme5c 2 NEG (opr) 0- M M 2 s complement memory byte NEGA 0- A A 2 s complement A NEGB 0- B B 2 s complement B MUL A x B D mul5ply 8 by 8 FDIV D/IX IX, r D frac5onal divide 16 by 16 IDIV D/IX IX, r D integer divide 16 by 16 8

9 Logical ANDA (opr) A M A * AND A with memory ANDB (opr) B M B * AND B with memory ORAA (opr) A + M A * OR A with memory ORAB (opr) B + M B * OR B with memory EORA (opr) A M A * exclusive OR A with memory EORB (opr) B M B * exclusive OR B with memory 9

10 ShiNs ASL * arithme5c shin len ASLD * arithme5c shin len double ASR * arithme5c shin right LSL * logical shin len LSLD * logical shin len double LSR * logical shin right LSRD * logical shin right double ROL ROR * rotate len * rotate right 10

11 Compares CMPA * compare A to memory CMPB * compare B to memory CPD CPX CPY * compare D to memory 16- bit * compare IX to memory 16- bit * compare IY to memory 16- bit 11

12 Calls and Uncondi5onal Jumps BRA BSR JMP JSR * branch always * branch to subrou5ne * jump * jump to subrou5ne 12

13 Condi5onal Branches BCC BCS BEQ BGE BGT BHI BHS BLE BLO BLS BLT * branch if carry clear * branch if carry set * branch if zero * branch if g.t.e zero * branch if g.t. zero * branch if higher * branch if higher or same * branch if l.t.e. zero * branch if lower * branch if lower or same * branch if l.t. zero 13

14 Condi5onal Branches 2 BMI * branch if minus BNE * branch if not equal to zero BPL * branch if plus BRCLR * branch if bit(s) clear BRSET * branch if bit(s) set BVC * branch if overflow clear BVS * branch if overflow set 14

15 Flag Opera5ons CLC CLI CLV * clear carry bit * clear interrupt mask * clear overflow flag SEC SEI SEV * set carry bit * set interrupt mask * setoverflow flag 15

16 Stack Opera5ons PSHA * push A onto stack PSHB * push B onto stack PSHX PSHY * push IX onto stack * push IY onto stack PULA PULB PULX PULY * pull A from stack * pull B from stack * pull IX from stack * pull IY from stack 16

17 Misc. NOP * no opera5on STOP * stop all internal clocks And more. (the ones I forgot) Essen5al * Read The Manual! 17

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