Compiler Design. Spring Register Allocation. Sample Exercises and Solutions. Prof. Pedro C. Diniz

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1 Compler Desgn Sprng 2014 Regster Allocaton Sample Exercses and Solutons Prof. Pedro C. Dnz USC / Informaton Scences Insttute 4676 Admralty Way, Sute 1001 Marna del Rey, Calforna pedro@s.edu Regster Allocaton Sample Exercses 1 Sprng 2014

2 Problem 1: Consder the three-address code below: 1: = 0; 2: a = p1; 3: b = * 4; 4: c = a + b; 5: L1: f ( > 100) goto L2 6: c = a + 1; 7: = + 1; 8: b = * 4; 9: e = p1; 10: f (c <= p1) goto L3 11: c = e - b; 12: a = e; 13: goto L4 14: L3: d = p1; 15: c = d + b; 16: a = d; 17: L4: f ( <= 100) goto L1 18: L2: return a) Determne the nterference graph assumng a gven varable s lve at the end of a specfc nstructon f after the use n that nstructon the value s stll used elsewhere n the code. You should assume the varable p1 s defned upon entry of the code as t corresponds to a parameter of the procedure and s used after the return nstructon. b) Determne the mnmum number of regsters needed (wthout spllng, of course). c) Assumng you were short of one regster, whch regster(s) would you spll and at whch ponts n the program would you nsert the spll code? Explan the ratonale of your choce. d) Now redo the regster allocaton usng the top-down method n whch varables used nsde a loop are weghted more that varables outsde the loop. Soluton: a) We have drawn the nterference graph between the webs as shown below where we use the nterference noton as dctated by the lveness of a gven varable after the executon of a gven nstructon. In ths context we say a varable s lve n a specfc nstructons (denoted by the lne number) f that varables partcpates n that nstructon. If a varable s not used after a specfc nstructon t s consdered dead after that nstructon. We consder that the parameter p1 s defned outsde and s stll needed after the code of the procedure executes. It s thus always lve. As such as have the followng lve ranges (denoted by the lne numbers) where each varable s lve: a: { 2, 3, 4, 5, 6 } + { 12, 13,16, 17 } b: { 3, 4 } + { 8, 9, 10, 11 } + { 14, 15 } c: { 4 } + { 6, 7, 8, 9, 10 } + { 11 } + { 15 } d: {14, 15, 16 } e: { 9, 10, 11, 12 } : { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 } p1: { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 } The fgure below llustrates the Control-Flow-Graph (CFG) wth the basc blocks correspondng to ths code that helps you determne whch value of whch varables flow to whch uses. Regster Allocaton Sample Exercses 2 Sprng 2014

3 1: def ; 2: def a, use p1; 3: def b; use ; 4: def c; use a, b; BB0 5: use ; BB1 6: def c; use a; 7: def ; use ; 8: def b; use ; 9: def e; use p1; 10: use c ; use p1; BB2 BB3 11: def c; use e,b; 12: def a; use e; 13: BB4 14: def d; use p1; 15: def c; use d,b; 16: def a; use d; 17: use ; BB5 18: BB6 b) Usng these nterference webs for computng the nterference graph one would get the graph below. To color ths graph one needs 6 colors. Notce that there s a clque of sze 6 (a complete set of 6 nodes where all nodes n ths set are connected to the other nodes n the same set). Ths means that we need at least 6 colors. The 6-clque n ths example s composed by the nodes {a,b,c,e,,p1}. The node {d} can be colored wth the same color as node {e} as they have no conflct or nterference. c) Removng the nodes {e} ad {d} whch corresponds to the varable wth the shortest lve ranges would leaves us wth a clque of sze 5 thus requrng 5 regsters. Regster Allocaton Sample Exercses 3 Sprng 2014

4 d) Usng the top-down allocaton algorthm we must frst compute the COST(V,B) functons for each varables V and basc block B. For the example above we have the followng matrx of cost values: BB0 BB1 BB2 BB3 BB4 BB5 BB p a b c d e In addton we now have to compute the nestng depth of each basc block as shown n the table below. BB0 BB1 BB2 BB3 BB4 BB5 BB6 Depth Gven these two tables we now compute the total cost assocated wth a gven varable n ths algorthm as TotCost(V) = cost(v, B)*freq(B) where freq(b) of the basc block B s 10 depth(b). V TotCost(V) TotCost(V) 2 + 1*10 + 3*10 + 1*10 52 p *10+ 1*10 31 a 2 + 1*10+ 1* *10 32 b 2 + 1*10+ 1* *10 32 c 1 + 2*10+ 1* *10 41 d 0 + 3*10 30 e 0+1*10 + 2*10 30 As such the varables are assgned regster n the followng prorty: {, c, a, b, p1, d, e} Regster Allocaton Sample Exercses 4 Sprng 2014

5 Problem 2: Consder the followng three-address format representaton of a computaton. Here we have use the ARP regster to load local varables nto temporary varables ntroduced n the ntermedate code generaton process. We have also used comple-tme offsets to load the values of several local varables as they are located and fxed locatons n the current procedure AR. 01: t1 = k * 8 02: = FP + offset_a 03: = t1 + 04: = * 05: = * x 06: = FP + offset_b 07: t7 = * 8 08: t8 = *t7 09: t9 = + t8 10: *t7 = t9 11: k = k + 1 Questons: (a) Usng the bottom-up regster allocator descrbed n class assgn the varous temporary varables and varables to actual regsters. For the purpose of ths secton, assume you only have 4 physcal regsters. At each pont when choosng to reuse a regster ndcate why do you pck each one. (b) Use the graph-colorng based algorthm for dong regster allocaton nstead. In ths secton we are to explore the use of nterference webs for dfferent defntons of nterference as mentoned n class. Soluton: a. In the frst web use the defnton that two varables nterfere f there s at least one nstructon n whch they partcpate. Derve the nterference web between varables usng ths defnton. b. In the second defnton there s no nterference f the two webs ether do not ntersect at all or f they do ntersect at a sngle nstructon the web that ends at that nstructon partcpates as the argument of the nstructon and the web that begns at that nstructon corresponds to the destnaton value of the nstructon. c. For both defntons determne the mnmum number of requred regsters. d. Usng the graph-colorng heurstc descrbed n class determne the number of requred regsters for each of the two nterference defntons. Why do they dffer, or why not? (a) Below s a descrpton on how to translate the code n ths queston usng 4 physcal regsters and usng the local allocaton algorthm descrbed n class. For each varable we have loaded ts value nto a regster va the ndrecton usng the FP and a specfc offset n the AR. At specfc ponts n the executon we ndcate the current assgnment of regsters to program varables. 01: r0 = FP + offset_k // Assgnment: r0 k; r1 empty; r2 empty; r3 empty; 02: r1 = r0 * 8 // Assgnment: r0 k; r1 t1; r2 empty; r3 empty; 03: r2 = FP + offset_a // Assgnment: r0 k; r1 t1; r2 ; r3 empty; 04: r3 = r1 + r2 // Assgnment: r0 k; r1 t1; r2 ; r3 ; 05: r1 = (r3) // Assgnment: r0 k; r1 ; r2 ; r3 ; 06: r2 = FP + offset_x // Assgnment: r0 k; r1 ; r2 x; r3 ; 07: r1 = r1 * r2 // Assgnment: r0 k; r1 ; r2 x; r3 ; 08: r2 = FP + offset_b // Assgnment: r0 k; r1 ; r2 ; r3 t7; 09: r3 = r2 * 8 // Assgnment: r0 k; r1 ; r2 ; r3 t7; 10: r2 = *r3 // Assgnment: r0 k; r1 ; r2 t8; r3 t7; 11: r1 = r2 + r1 // Assgnment: r0 k; r1 t9; r2 t8; r3 t7; 12: *r3 = r1 // Assgnment: r0 k; r1 t9; r2 t8; r3 t7; 13: r0 = r0 + 1 // Assgnment: r0 k; r1 t9; r2 t8; r3 t7; Regster Allocaton Sample Exercses 5 Sprng 2014

6 (b) We present the nterference table nstead as t s easer to read. On the left we have the nterference table for the smpler noton of nterference whereas on the rght we have for the noton of nterference takng nto account the use of the value n each regster when the RHS s evaluated. k x t1 t7 t8 t9 k x t1 t7 t8 t9 k x t1 t7 t8 t9 k x t1 t7 t8 t9 a. Interference Table b. Interference Table t7 t8 t9 x t1 t7 t8 t9 x t1 k k a. Interference Graph b. Interference Graph (c) In the frst case we need 5 regsters as the maxmum number of conflcts n any row of the table s 4 (last one for t9) whereas n the second case we only need 4 regsters. (d) Usng the graph-colorng heurstc algorthm (for the frst noton of nterference) and usng 5 regsters durng the frst phase we push the nodes for all nodes (n lexcographcal order) onto the stack leavng only the nodes correspondng to x, and k. We assgn r0 to k and r1 to. Then poppng each of the nodes off the stack we can assgn r1 to t1, r2 to,, and t8,; r3 to y3, t7 and r4 to t9, yeldng the colored graph below: t8 t9 t1 t7 x k Regster Allocaton Sample Exercses 6 Sprng 2014

7 Problem 3: Consder the code fragment depcted below. 1: = 0 2: a = 1 3: b = * 4 4: c = a + b 5: L1: f > n goto L2 6: c = a + 1 7: = + 1 8: b = * 4 9: f c <= p goto L3 10: e = 1 11: c = e - b 12: a = e 13: goto L4 14: L3: d = 2 15: c = d + b 16: a = d 17: L4: goto L1 18: L2: return For ths code determne the followng: a) The lve ranges for the varables, a, b, c, d, e, p. b) The nterference graph usng the smplest defnton of nterference where the webs nclude the lve range n terms of the lne numbers where an access to a varable (ether a read or a wrte operaton) occurs. c) Determne the mnmum number of regsters needed (wthout spllng, of course) usng the graph colorng algorthm descrbed n class. d) Assumng that you were short of one regster, whch regster(s) would you spll and at whch ponts n the program would you nsert the spll code? Explan. Soluton: a) The basc observaton s that one varable s lve at a specfc program pont p f ts value s stll gong to possbly be used n the future. The best way to fgure ths out s to begn by constructng the control-flow graph (CFG) for ths code. For nstance varable s lve at program pont 11 as there s a possblty that the value defned for ths varable at pont 7 s gong to be used along the path that traverses the basc block that contans the nstructons 10 through 13 whch then jumps to lne 5 whch reads ths varable to evaluate the test(>n). Tracng the defntons and uses for each varable we can arrve at the followng lve ranges where the number ndcaton the source program lne numbers: : {1 17} p: {1-17} a: {2-6,12,13,16,17} b: {3,4}, {8,9,10,11}, {8,9,14,15} c: {4}, {6,7,8,9,11,15} d: {14,15,16} e: {10,11,12} b) The varables {, a, p} nterfere wll all the other varables as depcted n the nterference graph s as shown below (left). a a b b p c c e d e d Regster Allocaton Sample Exercses 7 Sprng 2014

8 c) Usng the algorthm we have studed n class for graph colorng for N = 6 gven that that s the hghest degree n the graph t s hghly lkely that for N = 6 we wll be able to fnd such colorng of the nterference graph. In ths case only nodes d and e go nto the stack as they have degree 5 less than 6. If that s the case we now remove one node from the graph, say node p that nterferes wth all the other remanng nodes n the graph. We are left wth the graph above n the mddle. Then we must push all the remanng nodes on the stack agan, ths tme all of them have degree less than 6. We then pop the nodes one by one and assgn colors. One such color s to assgn the same color, say red to {e,d} as they do not nterfere and any other 4 colors to the remanng nodes. Ths results n 5 colors leavng the node correspondng to p uncolored. d) If you had one less regster say 4 regsters, you could leave the node wth the shortest lve range, say node d or e out of regsters. Regster Allocaton Sample Exercses 8 Sprng 2014

9 Problem 4: Consder the followng three-address format representaton of a computaton usng scalars and arrays A and B. Assume for the purposes of ths exercse that no addtonal regsters are needed to access (ether wrtng or readng) the value of an array. As such the access to A[t1] requres no addtonal regsters n addton to the one carryng the value of t1. 01: t1 = 02: = A[t1] 03: = : = A[] 05: = + 06: = / 2 07: t7 = 08: B[t7] = 09: = + 1 Questons: (a) Usng the bottom-up regster allocator descrbed n class assgn the varous temporary varables and varables to actual regsters. For the purpose of ths secton, assume you have 3 physcal regsters and that the scalar s already loaded nto regster r0. At each pont when choosng to reuse a regster ndcate why do you pck each one. Also you should try to reuse regsters n copy operatons such as t1 = n lne 01 thus not consumng any more regsters but smply propagatng the use of r0 n ths case. (b) Use the graph-colorng based algorthm for dong regster allocaton nstead. In ths secton we are to explore the use of nterference webs for dfferent defntons of nterference as mentoned n class. Soluton: e. In the frst web use the defnton that two varables nterfere f there s at least one nstructon n whch they partcpate. Derve the nterference web between the varables n ths code usng ths defnton. f. In the second defnton there s no nterference f the two webs ether do not ntersect at all or f they do ntersect at a sngle nstructon the web that ends at that nstructon partcpates as the argument of the nstructon and the web that begns at that nstructon corresponds to the destnaton value of the nstructon. g. Usng the graph-colorng heurstc descrbed n class wth N=4 and determne the colorng and hence regster allocaton for both nterference defntons. Why do they dffer, or why not? (a) Below s a descrpton on how to translate the code n ths queston usng 3 physcal regsters and usng the local allocaton algorthm descrbed n class. At specfc ponts n the executon we ndcate the current assgnment of regsters to program varables. Note that we could have elmnated t1 as the frst nstructon makes a copy of the value of I nto t1 (and the same s true for t7 and ). For ths reason n the assgnment below the par t1, and t7, appear as a sngle tuple. 01: r0 = r0 // Assgnment: r0 t1, ; r1 empty; r2 empty; 02: r1 = A[r0] // Assgnment: r0 t1, ; r1 ; r2 empty; 03: r2 = r0 + 1 // Assgnment: r0 t1, ; r1 ; r2 ; 04: r0 = A[r2] // Assgnment: r0 ; r1 ; r2 ; 05: r2 = r1 + r0 // Assgnment: r0 ; r1 ; r2 ; 06: r0 = r2 / 2 // Assgnment: r0 ; r1 ; r2 ; 07: r1 = // Assgnment: r0 ; r1 t7, ; r2 ; 08: B[r1] = r0 // Assgnment: r0 ; r1 t7, ; r2 ; 09: r1 = r1 + 1 // Assgnment: r0 ; r1 t7, ; r2 ; (e) We present the nterference table nstead as t s easer to read. On the left we have the nterference table for the smpler noton of nterference whereas on the rght we have for the noton of nterference takng nto account the use of the value n each regster when the RHS s evaluated. In ths example we have gnored the varables t1 and t7 as they can be elmnated by copy-propagaton - an optmzaton that removes redundant varables by observng when the denttes {a = b} hold through the executon of a code secton. Ths greatly smplfes the regster allocaton. Regster Allocaton Sample Exercses 9 Sprng 2014

10 a. Interference Table b. Interference Table a. Interference Graph b. Interference Graph (f) In the frst case we need 4 regsters as the maxmum number of conflcts n any row of the table s 4 (for ) whereas n the second case we only need 3 regsters. There are several clques of sze 3 n the second case and at least one clque of sze 4 n the frst case (nvolvng ). (g) Usng the graph-colorng heurstc algorthm (for the frst noton of nterference) and usng 4 regsters or N=4 n the algorthm, we fst push onto the stack the nodes n the order {,,,,, }. We then pop the node correspondng to and assgn t the color c0. Next we color wth color c1, color wth color c2 and wth color c3. When we pop we can color t wth the same color as,.e., c2 and when we pop we can use ether c3 or c1. The fgures below depct these colorngs on the left for the frst nterference graph and on the rght for the second nterference graph, whch uses only 3 color. Notce that for the graph on the left there s a clque of sze 4 so usng four colors (regsters) s the best we can do and s n fact optmal. Regster Allocaton Sample Exercses 10 Sprng 2014

11 Problem 5: Consder the followng three-address format representaton of a computaton usng scalars and arrays A and B and a procedure F(nt a, nt b). Assume for the purposes of ths exercse that no addtonal regsters are needed to access (ether wrtng or readng) the value of an array. As such the access to A[t1] requres no addtonal regsters n addton to the one carryng the value of t1. 01: t1 = 02: = A[t1] 03: = : = A[] 05: = + 06: = / 2 07: t7 = 08: B[t7] = 09: putparam 10: putparam 1 11: call F,2 12: t8 = 13: t9 = t8 + 2 a) Apply copy propagaton and dead code elmnaton to the basc block mmedately precedng the functon nvocaton. b) Use the bottom-up regster allocaton algorthm for 3 regsters under the assumpton that varable s lve outsde ths basc block and after the call to F. In ths secton you can smply gnore the nstructons on lnes 09 through 11. In ths part of the code load the value of the scalar varables usng the offset of the scalar from the Frame-Ponter (FP) regster. So you need to make some changes to the ntermedated code. c) Passng the arguments to the procedure F could be done va regsters. Ths would come at the cost of addtonal regsters unless the values requred by a gven procedure would already resde n regsters. For ths partcular case explan whch putparam nstructon could be elmnated usng arguments for the procedure that are already n regsters. Soluton: a) The statements on lnes 01, 07 and 12 are dead once we propagate the correspondng assgnments to the nstructons on lnes 02, 08 and : t1 = 02: = A[] 03: = : = A[] 05: = + 06: = / 2 07: t7 = 08: B[] = 09: putparam 10: putparam 1 11: call F,2 12: t8 = 13: t9 = t8 + 2 Regster Allocaton Sample Exercses 11 Sprng 2014

12 b) The code below llustrates the resultng code under the assumpton that the varable s ntally stored at an negatve offset 16 of the Frame-Ponter (FP) regster. 01: r0 = FP 16 02: r0 = *r0 // loads the value of varable nto r0 02: r1 = A[r0] // r0,t1, r1, r2 empty 03: r2 = r0 + 1 // r0,t1, r1, r2 04: r0 = A[r2] // r0, r1, r2 05: r2 = r1 + r0 // r0, r1, r2 06: r0 = r2 / 2 // r0, r1, r2 07: r1 = FP - 16 // r0, r1,t7, r2 08: r1 = *r1 // r0, r1,t7, r2 08: B[r1] = r0 // r0, r1,t7, r2 09: putparam r1 10: putparam 1 11: call F,2 12: r0 = r1 // r0 t8, r1,t7, r2 13: r2 = r1 + 2 // r0 t8, r1,t7, r2 t9 c) For ths partcular case the argument value s already n regster r1, so we could elmnate the frst putparam nstructon provded now that when dong the regster allocaton for F we would start wth the assumpton that the frst parameter s already n r1. Regster Allocaton Sample Exercses 12 Sprng 2014

13 Problem 6: The code shown on the left s for a procedure n C where p and n are arguments to the functon. 1 func:getparam p 2 getparam n 3 = 0 4 a = 1 5 b = * 4 6 c = a + b 7 L1: f > n goto L2 8 c = a = b = * 4 11 f c <= p goto L3 12 e = 1 13 c = e - b 14 a = e 15 goto L4 16 L3: d = 2 17 c = d + b 18 a = d 19 L4: goto L1 20 L2: return For ths code determne the followng: a) The lve ranges for the varables, a, b, c, d, e. b) The nterference graph usng the smplest defnton of nterference where the webs nclude the lve range n terms of the lne numbers where an access to a varable (ether a read or a wrte operaton) occurs. Assume that the parameters n and p are not n regsters. c) Determne whch varables should be put n regsters usng the top-down regster allocaton algorthm descrbed n class gven that you only had 4 regsters. Explan. Soluton: a) Varables s lve at all nstructons n ths procedures and thus ts lve ranges are {3,, 20}. Varable a has two lve ranges r1 = {4,5,6,7,8,9,10,12,12,13,14} and r2 = {18, 19, 7, 8} n ths second range he value defned n lne 18 s used n nstructon 8 va the goto statement on lne 19. For varable b we have three lve ranges, r = {5,6}, r2 = {10,11,12,13} and r3 = {10,11,16,17}. For varable c we have 4 lve ranges r1 = {6}, r2 = {8,9,10,11}, r3 = {13} and r4 = {17}. For varable d we have a sngle lve range r1 = {16,17,18} and for e we have r1 = {12,13,14}. b) The nterference graph usng the smplest defnton of nterference where the webs nclude the lve range n terms of the lne numbers where an access to a varable (ether a read or a wrte operaton) occurs. Assume that the parameters n and p are not n regsters. Usng the nformaton from a) the nterference graph s as shown below. The only two varables that do not nterfere (usng ths defnton) wth each other are varables d and e. e a d b c Regster Allocaton Sample Exercses 13 Sprng 2014

14 c) Determne whch varables should be put n regsters usng the top-down regster allocaton algorthm descrbed n class gven that you only had 5 regsters. Explan. We need to determne the loop structure of the code so that we can weght the occurrences of each of the varables. By nspecton of the code we can see that there s a loop that contans all statements from lnes 7 through 19. Insde the loop there s an f-then-else construct so all the accesses nsde ths loop wth be weghted wth weght 10 as there s a sngle nested loop here. As such the table of weghts for ths code s as follows: Varable a b C d e Breakdown 4 x x x x x x Weght We can see that preferentally we should put n regsters the varables and c followed by the varables a and b and fnally the varables d and e. Note that because varables d and e do not nterference (see b) above they need only one regster and thus I would be able to allocate all of them to the 5 regsters provded. Regster Allocaton Sample Exercses 14 Sprng 2014