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1 Introduction SIC, RISC & CISC 0. Introduction to Systems Programming This course aims at: Understanding what is going on behind the scenes The design and implementation of system software, such as Assemblers Loaders and linkers Macro processors Operating systems 0.1 System Software and Architecture Machine dependency of system software System programs are intended to support the operation and use of the computer. Machine architecture differs in: Machine code Instruction formats Addressing mode Registers Machine independency of system software Some features like General design and logic is basically the same: Code optimization Subprogram linking In short the course consists of: Introducing a hypothetical computer (SIC) for reducing the complexity and creating uniformity for learning the concepts. The basic functions of assemblers, loaders, linkers, macro processors and operating systems Machine-dependent functions Machine-independent functions Design options (single-pass vs. multipass) Examples of implementations 1.1 Simplified Instructional Computer (SIC) and SIC/XE [Extra Equipment] Why the simplified instructional computer To avoid various unique features and idiosyncrasies of a particular machine To focus on central, fundamental, and commonly encountered features and concepts Two versions Standard model (SIC) and an XE version (SIC/XE) Upward compatible (Programs for SIC can run on SIC/XE) SIC Architecture Memory - byte addressable (we can access each byte) - 32 KB Registers - Five registers - A (Accumulator used for arithmetic op.) - X (Index Register used for addressing) - L (Linkage register used to store return address when JSUB instruction is called) - PC (Program Counter) - SW (Status word contains various info.) Data formats Characters: 8-bit ASCII codes Integers 24-bit binary numbers 2 s complement for negative values Floating-point numbers: Not available 1

2 Introduction SIC, RISC & CISC Instruction Formats [Format/Meaning of each bit used in the instruction. Total number of instructions and formats are fixed and predetermined by the processor designer] 24- bit format Addressing modes [How the target address is calculated] Instruction set Load and store registers LDA, LDX, STA, STX Integer arithmetic operations (involve register A and a word in memory, save result in A) ADD, SUB, MUL, DIV Comparison (involves register A and a word in memory, save result in the condition code (CC) of SW) COMP Conditional jump instructions (according to CC) JLE, JEQ, JGT Subroutine linkage JSUB (jumps and places the return address in register L) RSUB (returns to the address in L) Input and output Each IO device is assigned a unique 8- bit code One byte at a time to or from the rightmost 8 bits of register A Three instructions: Test device (TD): Test whether the device is ready to send/receive Test result is set in CC Read data (RD): read one byte from the device to register A Write data (WD): write one byte from register A to the device SIC/XE Architecture Memory: - From bytes to 1 mega bytes. Registers: - 4 additional registers - B (Base register used for addressing) - S (General working Register) - T (General working Register) - F (Floating Point accumulator 48 bits) Data formats Additional data formats available Floating-point numbers (48 bits) sign bit s fraction f: a value between 0 and 1 exponent e: unsigned binary number between 0 and 2047 Value 2

3 Introduction SIC, RISC & CISC Instruction formats Total four instruction formats Addressing modes: two new relative addressing for format 3 direct addressing for formats 3 and 4 if b=p=0 Indexed addressing can be combined if x=1: the term (x) should be added Bits x,b,p,e: how to calculate the target address relative, direct, and indexed addressing modes Bits i and n: how to use the target address (TA) i=1, n=0: immediate addressing TA is used as the operand value, no memory reference i=0, n=1: indirect addressing The word at the TA is fetched Value in this word is taken as the address of the operand value i=0, n=0 (in SIC), or i=1, n=1 (in SIC/XE): simple addressing TA is taken as the address of the operand value Exception: indexing cannot be used with immediate or indirect addressing modes For upward compatibility 8-bit binary codes for all SIC instructions end in 00 If n=i=0, bits b,p,e are considered as part of the 15-bit address field Instruction set Additional Instructions are available Load and store registers LDX, STX, LDB, STB, Integer arithmetic operations ADDF, SUBF, MULF, DIVF, ADDR, SUBR, MULR, DIVR Comparison COMP Register move RMO Supervisor call (for generating an interrupt) SVC 3

4 Introduction SIC, RISC & CISC 1.2 Real Machines :RISC & CISC Two Categories: Based on the type of the processor Complex Instruction Set Computers (CISC) Relative large and complicated instruction set, more instruction formats, instruction lengths, and addressing modes Hardware implementation is complex - More number of instructions - Complicated architecure Examples: VAX Intel x86 Reduced Instruction Set Computers (RISC) Simplified design, faster and less expensive processor development, greater reliability, faster instruction execution times - less number of instructions Examples: Sun SPARC Example 1 : VAX Architecture (CISC) Memory: 232 bytes in virtual address space consists of 8-bit bytes: word: 2 bytes longword: 4 bytes quadword: 8 bytes octaword: 16 bytes can be divided into System space (OS and shared space) Process space (defined separately for each process) 32-bit registers 16 general-purpose registers R0-R11: no special functions AP: argument pointer (address of arguments when making a procedure call) FP: frame pointer (address of the stack frame when making a procedure call) SP: stack pointer (top of stack in program s process space) PC: program counter PSL: processor status longword Control registers to support OS Data formats Characters: 8-bit ASCII codes Integers: 2, 4, 8, 16-byte binary numbers 2 s complement for negative values Floating-point numbers: 4 different floating-point data ranging in length from 4 to 16 bytes Instruction formats Variable-length instruction format Each instruction consists of OP code (1 or 2 bytes) Up to 6 operand specifiers (depends on instruction) Addressing modes Register mode Register deferred mode Autoincrement and autodecrement modes Base relative modes PC relative modes Index modes Indirect modes Immediate mode etc. Instruction set Mnemonics format (e.g., ADDW2, MULL3) Prefix: type of operation Suffix: data type of the operands Modifier: number of operands involved In addition to computation, data movement and conversion, comparison, branching, VAX provides instructions that are hardware realizations of frequently occurring sequences of codes Load and store multiple registers Manipulate queues and variable-length bit fields Powerful instructions for calling and returning from procedure Input and output Each I/O device has a set of registers, which are assigned locations in the physical address space, called I/O space. Association of these registers with addresses in I/O space is handled by memory management routines. Device driver read/write values into these registers. Software routines read/write values in I/O space using standard instructions. 4

5 Introduction SIC, RISC & CISC Example 2 :Pentium Pro Architecture (CISC) Memory: virtual memory consists of 8-bit bytes: word: 2 bytes & double-word: 4 bytes can be divided into segments with different sizes Code, data, and stack segments Each segment can be divided into pages 32-bit registers 8 general-purpose registers EAX, EBX, ECX, EDX: data manipulation ESI, EDI, EBP, ESP: addresses Data formats Characters: 8-bit ASCII codes Integers: 1, 2, 4-byte binary numbers (8-byte signed integers for FPU) 2 s complement for negative values Little-endian byte ordering Binary coded decimal (packed or unpacked BCD) Floating-point numbers: Single-precision: 32 bits Double-precision: 64 bits Extended-precision: 80 bits Instruction formats Variable-length instruction format (1-10 bytes) Each instruction consists of Optional prefixes containing flags that modify the operation of the instruction Addressing modes Immediate mode Register mode Base relative mode PC relative mode Index mode Direct mode etc. Instruction set (>400 instructions) 0, 1, 2, or 3 operands Register-to-register, register-to-memory, and memory-to-memory instructions Special-purpose instructions that are frequently required in high-level languages, e.g., entering and leaving procedures, checking the bounds of an array Input and output I/O instructions that transfer one byte, word, or double-word from an I/O device into register EAX, or vice versa. Repetition prefixes can be used to transfer an entire string in a single operation Example 3: UltraSPARC Architecture (RISC) Memory: 264 bytes in virtual address space -consists of 8-bit bytes: -can be divided into pages halfword: 2 bytes word: 4 bytes doubleword: 8 bytes Large register file (>100 general-purpose registers) 32 bits for original SPARC, 64 bits for UltraSPARC Each procedure can access only 32 registers 8 global registers 24 registers in overlapped window A file of 64 double-precision floating-point registers fro FPU. Data formats Characters: 8-bit ASCII codes Integers: 1, 2, 4, 8-byte binary numbers 2 s complement for negative values Big- and little-endian and byte ordering Floating-point numbers: Single-precision: 32 bits Double-precision: 64 bits Quad-precision: 80 bits Instruction formats Fix-length instruction format (32 bits long) Can speed the process of instruction fetching and decoding 3 basic instruction formats Call instruction Branch instruction Register loads and stores, and three-operands arithmetic operations Each instruction consists of First 2 bits: identify formats OP code & Operands Addressing modes Immediate mode Register direct mode PC relative mode only for branch instructions Register indirect with displacement Register indirect indexed Instruction set (<100 instructions) Register-to-register instructions Load and store instructions (only instructions that access memory) Instruction execution is pipelined. Input and output A range of memory locations is logically replaced by device registers. Device driver read/write values into these registers. 5

6 1.3 Assemblers Assembler converts assembly language program to machine language. Example: Assembly language Instruction: ADD loc Here ADD [Instruction], loc[address] Say value of ADD is18 (hex) & loc is 1500(hex) Machine Language equivalent of the above instruction is: or (hex) So the assembler s function can be represented using the fig. Mnemonic operation Symbolic labels Basic functions of assembler Machine language Machine addresses SIC Assembler s task: Convert mnemonic operation codes to their machine language equivalents Convert symbolic operands to their equivalent machine addresses Build machine instructions in proper format Convert data constants into internal machine representations (data formats) Write object program and the assembly listing SIC assembler directives START : Specify name and starting address for the program END : Indicate the end of the source program, and (optionally) the first executable instruction in the program. BYTE : Generate character or hexadecimal constant, occupying as many bytes as needed to represent the constant. WORD : Generate one-word integer constant RESB : Reserve the indicated number of bytes for a data area RESW : Reserve the indicated number of words for a data area A simple SIC assembler & its functions Convert mnemonic operation codes to their machine language equivalents Convert symbolic operands to their equivalent machine addresses ( normally require 2 passes) Decide the proper instruction format Convert the data constants to internal machine representations Write the object program and the assembly listing Difficult part : Convert symbolic operands to their equivalent machine addresses and we may need two passes (going through the same program twice) because of forward reference Forward reference - A reference to a label that is defined later in the program (example given in next page) Solution: 2 passes Assembler Directives Basic assembler directives (pseudo instructions): Assembler directives are not machine instructions, rather they are directions to the assembler itself. First pass: scan the source program for label definitions and assign addresses Second pass: perform actual translation 6

7 Example for SIC Assembly Program Line numbers Address Mnemonic opcode operand comment Fixed format Example for Forward Reference Forward reference 7

8 Format of the generated object program [Machine language (in hex) program input for linker/loader] Includes three records Header Col. 1 H Col. 2~7 Program name Col. 8~13 Starting address of object program (hex) Col Length of object program in bytes (hex) Text Col.1 T Col.2~7 Starting address for object code in this record (hex) Col. 8~9 Length of object code in this record in bytes (hex) Col. 10~69 Object code, represented in hex (2 col. per byte) End Col.1 E Col.2~7 Address of first executable instruction in object program (hex) Example: 1.4 Design of Two Pass SIC Assembler Pass 1 (define symbols) Assign addresses to all statements in the program Save the addresses assigned to all labels for use in Pass 2 Perform assembler directives, including those for address assignment, such as BYTE and RESW Pass 2 (assemble instructions and generate object program) Assemble instructions (generate opcode and look up addresses) Generate data values defined by BYTE, WORD Perform processing of assembler directives not done during Pass 1 Write the object program and the assembly listing Data Structures used in a two pass assembler Operation Code Table (OPTAB) Contents: Mnemonic operation codes Machine language equivalents Instruction format and length During pass 1: Validate operation codes Find the instruction length to increase LOCCTR During pass 2: Determine the instruction format Translate the operation codes to their machine language equivalents Implementation: a static hash table Symbol Table (SYMTAB) A variable accumulated for address assignment, i.e., LOCCTR gives the address of the associated label. LOCCTR is initialized to be the beginning address specified in the start statement. After each source statement is processed during pass 1, instruction length or data area is added to LOCCTR. Location Counter (LOCCTR) Contents: Label name Label address Flags (to indicate error conditions) Data type or length During pass 1: Store label name and assigned address (from LOCCTR) in SYMTAB During pass 2: Symbols used as operands are looked up in SYMTAB Implementation: a dynamic hash table for efficient insertion and retrieval Should perform well with non-random keys (LOOP1, LOOP2). Source program Pass 1 Pass 2 LOCCTR OPTAB Intermediate file SYMTAB Diagram showing different parts of an assembler Object program 8

9 Pass 1 & Pass 2 of SIC assembler [Refer Text for a clear view] (From now on we are discussing about SIC/XE Assembler features) 1.5 Machine-Dependent Assembler Features Outline: - Instruction formats and addressing modes - Program relocation Addressing modes [In which way the target address/operand value is calculated] PC-relative or Base-relative addressing usage: opcode m Indirect addressing usage: Immediate addressing usage: opcode #c Extended format usage: +opcode m Index addressing usage: opcode m,x Register-to-register instructions usage: opcode r1,r2 Benefits of SIC/XE Addressing Modes Register-to-register instructions Shorter than register-to-memory instructions No memory reference Immediate addressing mode No memory reference. The operand is already present as part of the instruction Indirect addressing mode Avoids the needs for another instruction Relative addressing mode Shorten than the extended instruction Easy program relocation Considering Instruction Formats START directive specifies a beginning program address of 0: a relocatable program. Register-to-register instructions: simply convert the mnemonic name to their number equivalents OPTAB: for opcodes SYMTAB: preloaded with register names and their values 9

10 Considering Addressing Modes PC or base relative addressing Calculate displacement Displacement must be small enough to fit in the 12-bit field ( for PC relative mode, for base relative mode) Extended instruction format (4-byte) 20-bit field for large displacements PC Relative Addressing Mode Instruction: FIRST STL RETADR 17202D LDB #LENGTH 69202D : : RETADR RESW 1 (14) (02D)16 Some Examples of using different addressing modes Immediate Addressing Mode Instruction: LDA #3 (00) (003)16 (01)16 (0)16 (003)16 Instruction: C +LDT #4096 (74) (01000)16 (75)16 (1)16 (01000)16 Extended Format Instruction: CLOOP +JSUB RDREC (48) (01036)16 (4B)16 (1)16 (01036)16 (17)16 (2)16 (02D)16 PC is advanced after each instruction is fetched and before it is executed. That is, PC contains the address of the next instruction. disp = (0030)16-(0003)16 = (002D)16 Choice of Addressing Modes 1) Programmer must specify the extended format (4-byte) by using the prefix + 2) If not, assembler first attempts PC-relative 3) If the required displacement is out of range, use base relative addressing 4) Otherwise, generate an error message Why Program Relocation It is desirable to load and run several programs at the same time To increase the productivity of the machine Want to load and run several programs at the same time (multiprogramming) Must be able to load programs into memory wherever there is room Actual starting address of the program is not known until load time Relocatable Program 10

11 What Needs to be Relocated Example: The only parts of the program that require modification at load time are those that specify direct addresses The rest of the instructions need not be modified Not a memory address (immediate addressing) PC-relative, Base-relative From the object program, it is not possible to distinguish the address and constant The assembler must keep some information to tell the loader The object program that contains the modification record is called a relocatable program The way to solve the relocation problem For an address label, its address is assigned relative to the start of the program (START 0) Produce a Modification record to store the starting location and the length of the address field to be modified. The command for the loader must also be a part of the object program Modification record One modification record for each address to be modified The length is stored in half-bytes (4 bits) The starting location is the location of the byte containing the leftmost bits of the address field to be modified. If the field contains an odd number of half- bytes, the starting location begins in the middle of the first byte. Format of Modification record Col. 1 M Col. 2-7 Starting location of the address field to be modified, relative to the beginning of the program (Hex) Col. 8-9 Length of the address field to be modified, in half-bytes (Hex) 1.6 Machine-Independent Assembler Features More related to issues about: Programmer convenience & Software environment Outline Literals Symbol Defining Statement Expressions Program Blocks Control Sections and Program Linking Literals Literal is equivalent to: Define a constant explicitly and assign an address label for it Use the label as the instruction operand Why use literals: To avoid defining the constant somewhere and making up a label for it Instead, to write the value of a constant operand as a part of the instruction How to use literals: A literal is identified with the prefix =, followed by a specification of the literal value Literal vs. Immediate Addressing Same: Operand field contains constant values Difference: Immediate addressing: the assembler put the constant value as part of the machine instruction Literal: the assembler store the constant value elsewhere and put that address as part of the machine instruction 11

12 Literal Pool All of the literal operands are gathered together into one or more literal pools. Where is the literal pool: At the end of the object program, generated immediately following the END statement At the location where the LTORG directive is encountered To keep the literal operand close to the instruction that uses it Duplicate Literals The same literal used more than once in the program Only one copy of the specified value needs to be stored For example, =X 05 in the example program How to recognize the duplicate literals Compare the character strings defining them Easier to implement, but has potential problem (see next) E.g., =X 05 Compare the generated data value Better, but will increase the complexity of the assembler E.g., =C EOF and =X 454F46 Implementation of Literal Data structure: a literal table LITTAB Literal name Operand value and length Address LITTAB is often organized as a hash table, using the literal name or value as the key Pass 1 As each literal operand is recognized Search the LITTAB for the specified literal name or value If the literal is already present, no action is needed Otherwise, the literal is added to LITTAB (store the name, value, and length, but not address) As LTORG or END is encountered Scan the LITTAB F or each literal with empty address field, assign the address and update the LOCCTR accordingly Pass 2 As each literal operand is recognized Search the LITTAB for the specified literal name or value If the literal is found, use the associated address as the operand of the instruction or Otherwise, error (should not happen) As LTORG or END is encountered insert the data values of the literals in the object program Modification record is generated if necessary Symbol-Defining Statements How to define symbols and their values Address label The label is the symbol name and the assigned address is its value FIRST STL RETADR Assembler directive EQU symbol EQU value This statement enters the symbol into SYMTAB and assigns to it the value specified The value can be a constant or an expression Assembler directive ORG ORG value Use of EQU T o improve the program readability, avoid using the magic numbers, make it easier to find and change constant values Replace +LDT #4096 with MAXLEN EQU LDT #MAXLEN Use of ORG Indirect value assignment: ORG value When ORG is encountered, the assembler resets its LOCCTR to the specified value ORG will affect the values of all labels defined until the next ORG If the previous value of LOCCTR can be automatically remembered, we can return to the normal use of LOCCTR by simply write ORG Expressions A single term as an instruction operand can be replaced by an expression. STAB RESB 1100 STAB RESB 11*100 STAB RESB (6+3+2)*MAXENTRIES The assembler has to evaluate the expression to produce a single operand address or value. Expressions consist of Operator +,-,*,/ (division is usually defined to produce an integer result) Individual terms Constants User-defined symbols Special terms, e.g., *, the current value of LOCCTR 12

13 1.6.4 Program Blocks Allow the generated machine instructions and data to appear in the object program in a different order Separating blocks for storing code, data, stack, and larger data block Example Program blocks v.s. Control sections Program blocks Segments of code that are rearranged within a single object program unit Control sections Segments of code that are translated into independent object program units Assembler directive USE for Program Block : USE [block name] At the beginning, statements are assumed to be part of the unnamed (default) block If no USE statements are included, the entire program belongs to this single block Each program block may actually contain several separate segments of the source program Assembler rearranges these segments to gather together the pieces of each block and assign address Separate the program into blocks in a particular order Large buffer area is moved to the end of the object program Program readability is better if data areas are placed in the source program close to the statements that reference them. Three blocks are used default: executable instructions CDATA: all data areas that are less in length CBLKS: all data areas that consists of larger blocks of memory 13

14 Why Program Blocks To satisfy the contradictive goals: Separate the program into blocks in a particular order Large buffer area is moved to the end of the object program Using the extended format instructions or base relative mode may be reduced. (lines 15, 35, and 65) Placement of literal pool is easier: simply put them before the large data area, CDATA block. (line 253) Data areas are scattered Program readability is better if data areas are placed in the source program close to the statements that reference them. How to Rearrange Codes into Program Blocks Pass 1 Maintain a separate LOCCTR for each program block initialized to 0 when the block is first begun saved when switching to another block restored when resuming a previous block Assign to each label an address relative to the start of the block that contains it Store the block name or number in the SYMTAB along with the assigned relative address of the label Indicate the block length as the latest value of LOCCTR for each block at the end of Pass1 Assign to each block a starting address in the object program by concatenating the program blocks in a particular order Pass 2 Calculate the address for each symbol relative to the start of the object program by adding the location of the symbol relative to the start of its block the assigned starting address of this block Object Program It is not necessary to physically rearrange the generated code in the object program to place the pieces of each program block together. The a ssembler just simply insert the proper load address in each Text record. Program Blocks Loaded in Memory Not present in object same order Rearrangement through loading Control sections can be loaded and relocated independently of the other control sections are most often used for subroutines or other logical subdivisions of a program the programmer can assemble, load, and manipulate each of these control sections separately because of this, there should be some means for linking control sections together assembler directive: CSECT secname CSECT separate location counter for each control section Program Linking in Control Sections Program linking is used to link together logically related control sections 14

15 Problem: The assembler does not know where any other control section will be located at execution time. When an instruction needs to refer to instructions or data located in another control section, the assembler is unable to process this reference. The assembler has to generate information for such kind of references, called external references, that will allow the loader to perform the required linking. As sembler Directives for Control Section START: start the first control section set program name as the control section name define the control section name as an external symbol CSECT: start a new control section specify the control section name define the control section name as an external symbol EXTDEF: define external symbols EXTREF: name symbols defined in other control sections How to Handle External References CLOOP +JSUB RDREC 4B The operand RDREC is an external reference. The assembler has no idea where RDREC is inserts an address of zero can only use extended format to provide enough room (that is, relative addressing for external reference is invalid) passes information to the loader MAXLEN WORD BUFEND-BUFFER There are two external references in the expression, BUFEND and BUFFER. The assembler inserts a value of zero passes information to the loader Add to this data area the address of BUFEND Subtract from this data area the address of BUFFER On line 107, BUFEND and BUFFER are defined i n the same control section and the expression can be calculated immediately MAXLEN EQU BUFEND-BUFFER How to Handle Control Sections The assembler processes each control section independently establishes a separate LOCCTR (initialized to 0) for each control section stores in SYMTAB the control section in which a symbol is defined allow the same symbol to be used in different control sections reports an error when attempting to refer to a symbol in another control section, unless the symbol is defined as an external reference generates information in the object program for external references New Records for External References The assembler must include information in the object program that will cause the loader to insert proper values where they are required Define record (EXTDEF) Col. 1 D Col. 2-7 Name of external symbol defined in this control section Col Relative address within this control section (hexadeccimal) Co l Repeat information in Col for other external symbols Refer record (EXTREF) Col. 1 R Col. 2-7 Name of external symbol referred to in this control section Col Name of other external reference symbols Revised Modification Record Col. 1 M Col. 2-7 Starting address of the field to be modified (hexiadecimal) Col. 8-9 Length of the field to be modified, in half- symbol whose value is to be bytes (hexadeccimal) Col External added to or subtracted from the indicated field Control section name is automatically an external symbol, i.e. it is available for use in Modification records. 15