Lecture 9. INC and DEC. INC/DEC Examples ADD. ADD Examples SUB. INC adds one to a single operand DEC decrements one from a single operand
|
|
- Brook Marsh
- 6 years ago
- Views:
Transcription
1 Lecture 9 INC and DEC Arithmetic Operations Shift Instructions Next week s homework! INC adds one to a single operand DEC decrements one from a single operand INC destination DEC destination where destination can be a register or a memory operand INC/DEC Examples ADD inc al ; increment 8-bit register dec bx ; decrement 16-bit register inc membyte ;increment 8-bit dec membyte ; decrement 8-bit inc memword ;increment 16-bit dec memword ;decrement 16-bit ADD adds a source operand to a destination operand of the same size. ADD dest, src ;dest = src+dest sizes must match only one operand (at most) can be a memory location all status flags are affected! ADD Examples SUB add cl, al ;add 8-bit register to register ;cl = cl + al add bx, 1000h ;add immediate to 16-bit ; register bx = bx h add var1, ax ;add 16-bit register to memory ;var1 = var1 + ax add dx, var1 ;add 16-bit memory to register ;dx = dx + var1 add var, 10 ;add immediate value to ;memory var = var + 10 SUB subtracts a source operand from a destination operand. SUB dest, src ;dest = dest src sizes must match only one operand (at most) can be a memory location all status flags are affected inside the CPU, SUB is performed by negating the src operand (using 2 s complement) and added to the dest operand 1
2 SUB Examples sub cl, al ;subtract 8-bit ; register from register ;cl = cl - al sub bx, 1000h ;subtract immediate ;value from 16-bit ;register ; bx = bx h sub var1, ax ;subtract 16-bit register ; from memory ;var1 = var1 - ax sub dx, var1 ;subtract 16-bit ;memory from register ;dx = dx var1 sub var1, 10 ;subtract immediate ;value from memory ;var1 = var1-10 Flags Affected: Zero Zero flag set when the result of an operation is zero. mov ax, 10 sub ax, 10 ;ax = 0, ZF = 1 mov bl, 4Fh add bl, 0B1h ;bl = 00, ZF = 1 mov ax, 0FFFFh ;ax = -1 inc ax ;ZF = 1 mov ax, 1 dec ax ;ZF = 1 Flags Affected: Sign Flags Affected: Carry Sign flag set when the result of an operation is negative. mov bx, 1 sub bx, 2 ;bx = FFFF, SF = 1 Carry flag set when there is a carry out of the left-most bit. mov bl, 4Fh add bl, 0B1h ;bl = 00, = 1 (4F + B1 = 1FFh since we only have eight bits, the 1 is discarded and the carry flag is set) Exception: INC and DEC do not set the carry flag! Flags Affected: flag set when an arithmetic operation generates a signed value that exceeds to storage size of the destination operand. This means that the value placed in the destination operand is incorrect. The CPU sets it by comparing the carry flag to the bit carried into the sign bit of the destination operand. If not equal, overflow is set. How you check for overflow depends on if you are using signed or unsigned operands. The programmer decides if they are using signed or unsigned numbers. The CPU updates both the carry and the overflow flags in order to cover both options. The programmer checks the appropriate flag depending on if they are doing signed or unsigned operations. 2
3 Unsigned During unsigned arithmetic, if the carry flag is set then overflow has occurred: addition: 0FFh + 1 = 100h. If you are only using 8 bits, then only the two lowest digits (00) fit into the destination. Carry is set and overflow has occurred (result will be 00, not 100) subtraction: 1 2 = 01 + FE = FF. If this is treated as unsigned, it is not correct! FF unsigned = 127. In this case, the carry flag is set and overflow has occurred. More on Unsigned Something looks strange about the subtraction: 01 + FE = FF -> where is the carry? For subtraction and negation, the carry flag is set if there is NO carry out of the most significant bit. 1 2 = 01 + FE = FF no carry, so carry bit is set to signify overflow. 2 1 = 02 + FF = 01 there is a carry, and the carry bit is cleared, signifying overflow. Yes, this is a bit counter-intuitive. Signed During signed arithmetic, the overflow flag is set when an out of range value is generated. Of course, the computer doesn t know if your values are signed or unsigned, so what does this really mean? If the carry into the sign bit differs from the carry out of the sign bit, then the overflow flag is set. Signed Examples mov al, 126 add al, = 80h carry into the sign bit is 1 carry out of sign bit is 0 80h = -128, not > overflow More Signed Shift and Rotate mov al, -128 sub al, al = 7Eh = 126, not (2 in 2 s comp) carry in = 0, carry out = 1 -> overflow Shift and rotate instructions provide a way to move bits around in an operand. SHL shift left SHLD double-precision shift left SHR shift right SHRD double-precision shift right SAL shift arithmetic left SAR shift arithmetic right ROL rotate left ROR rotate right RCL rotate carry left RCR rotate carry right 3
4 SHL shift left Each bit in the destination operand is shifted to the left, filling the lowest bit with zero. The high bit is moved to the carry bit, the bit that was in the carry bit is discarded. SHL dest,1 ;1 bit to left SHL dest, CL ;CL holds # of bits SHL dest, immed8 ; shift immed8 ;# of bits SHL continued shl bl, 1 ;shift bl 1 bit to the left ;bl = 05h, new bl = 0Ah shl wordval, 1 ;16-bit memory operand ;wordval = 50A7h, new ;wordval = A14Eh shl al, cl ;shift using count in cl ;al = 4Bh, cl = 4, new al = B0h shl bx, 5 ;shift left 5 ;bx = 50A7h, new bx = 14E0h 0 Uses for SHL SHR shift right The most common use is highspeed multiplication. mov dl, 1 ;dl = 1 shl dl, 1 ;dl = 2 shl dl, 1 ;dl = 4 shl dl, 1 ;dl = 8 etc. Each shift left multiplies by a power of 2! Shifting is much faster than multiplication. Each bit in the destination operand is shifted to the right, replacing the highest bit with a zero. The low bit is copied into the carry flag, and the bit that was in the carry flag is lost. Instruction formats are the same as in SHL. 0 SHR - continued shr bl, 1 ;shift bl 1 bit to the right ;bl = 05h, new bl = 02h shr wordval, 1 ;16-bit memory operand ;wordval = 50A7h, new ;wordval =2853h shr al, cl ;shift using count in cl ;al = 4Bh, cl = 4, new al = 04h shr bx, 5 ;shift right 5 ;bx = 50A7h, new bx = 0285h Uses for SHR You can use SHR to divide a number by 2: mov dl, 32 ; b shr dl, 1 ; b (dl = 16) You can use multiple shifts to divide by larger powers of 2: mov al, b ;al = 64 shr al, 3 ;divide by 8 ; al = b = 8 what numbers can t you divide this way? -> signed numbers! (sign is lost) 4
5 SAR SAR cont. So how do you divide signed numbers? SAR and SAL (shift arithmetic right and shift arithmetic left). SAL is identical to SHL and is included in the instruction set for completeness SAR shifts each bit to the right and makes a copy of the sign bit, preserving the sign of the number. mov al, 0F0h ;al = b ;(-16) sar al, 1 ;al = b ;(-8), = 0 mov dx, 80000h ;dx = ; b ;(-32768) sar dx, 5 ;dx = ; ;(-1024) shifting right 5 times is the same as dividing by 2**5. ROL ROL cont. ROL, rotate left, moves each bit to the left. The highest bit is copied into the carry flag and the lowest bit. In rotate instructions, bits are never lost as they rotate off one end, they rotate back on to the other. mov al, 40h rol al, 1 ;al = b ;al = b rol al, 1 ;al = b ;cf = 1 rol al, 1 ;al = b Example Using ROL ROR Example 1, p233 of Irvine Like ROL, except rotating right. mov al, 01h ;al = b ror al, 1 ;al = ;cf = 1 ror al, 1 ;al = b 5
Lecture 9. INC and DEC. INC/DEC Examples ADD. Arithmetic Operations Overflow Multiply and Divide
Lecture 9 INC and DEC Arithmetic Operations Overflow Multiply and Divide INC adds one to a single operand DEC decrements one from a single operand INC destination DEC destination where destination can
More informationEx : Write an ALP to evaluate x(y + z) where x = 10H, y = 20H and z = 30H and store the result in a memory location 54000H.
Ex : Write an ALP to evaluate x(y + z) where x = 10H, y = 20H and z = 30H and store the result in a memory location 54000H. MOV AX, 5000H MOV DS, AX MOV AL, 20H MOV CL, 30H ADD AL, CL MOV CL, 10H MUL CL
More informationLogic Instructions. Basic Logic Instructions (AND, OR, XOR, TEST, NOT, NEG) Shift and Rotate instructions (SHL, SAL, SHR, SAR) Segment 4A
Segment 4A Logic Instructions Basic Logic Instructions (AND, OR, XOR, TEST, NOT, NEG) Shift and Rotate instructions (SHL, SAL, SHR, SAR) Course Instructor Mohammed Abdul kader Lecturer, EEE, IIUC Basic
More informationChapter 12. Selected Pentium Instructions
Chapter 12 Selected Pentium Instructions 1 2 Chapter 12 12 1 Carry flag indicates out-of-range error for unsigned operations. Chapter 12 3 12 2 Overflow flag indicates out-of-range error for signed operations.
More informationArithmetic and Logic Instructions And Programs
Dec Hex Bin 3 3 00000011 ORG ; FOUR Arithmetic and Logic Instructions And Programs OBJECTIVES this chapter enables the student to: Demonstrate how 8-bit and 16-bit unsigned numbers are added in the x86.
More informationShift and Rotate Instructions
Shift and Rotate Instructions Computer Organization and Assembly Language Computer Science Department National University of Computer and Emerging Sciences Islamabad Shift and Rotate Instructions Computer
More informationLecture (08) x86 programming 7
Lecture (08) x86 programming 7 By: Dr. Ahmed ElShafee 1 Conditional jump: Conditional jumps are executed only if the specified conditions are true. Usually the condition specified by a conditional jump
More informationLab Session 08. To understand the use of Shift and Rotate instructions. To be able to differentiate between Arithmetic shift and Logical shift.
Lab Session 08 Objective: Theory: To understand the use of Shift and Rotate instructions. To be able to differentiate between Arithmetic shift and Logical shift. Shift and Rotate Instructions Along with
More informationQ1: Multiple choice / 20 Q2: Memory addressing / 40 Q3: Assembly language / 40 TOTAL SCORE / 100
16.317: Microprocessor-Based Systems I Summer 2012 Exam 1 July 20, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationChapter 5. Real-Mode 80386DX Microprocessor Programming 1 Part 2. The 80386, 80486, and Prentium Processors,Triebel Prof. Yan Luo, UMass Lowell 1
Chapter 5 Real-Mode 80386DX Microprocessor Programming 1 Part 2 Prof. Yan Luo, UMass Lowell 1 Introduction 5.2 Data-Transfer Instructions 5.3 Arithmetic Instructions 5.4 Logic Instructions 5.5 Shift Instructions
More information8086 Programming. Multiplication Instructions. Multiplication can be performed on signed and unsigned numbers.
Multiplication Instructions 8086 Programming Multiplication can be performed on signed and unsigned numbers. MUL IMUL source source x AL source x AX source AX DX AX The source operand can be a memory location
More informationInstructions moving data
do not affect flags. Instructions moving data mov register/mem, register/mem/number (move data) The difference between the value and the address of a variable mov al,sum; value 56h al mov ebx,offset Sum;
More informationcomplement) Multiply Unsigned: MUL (all operands are nonnegative) AX = BH * AL IMUL BH IMUL CX (DX,AX) = CX * AX Arithmetic MUL DWORD PTR [0x10]
The following pages contain references for use during the exam: tables containing the x86 instruction set (covered so far) and condition codes. You do not need to submit these pages when you finish your
More informationLogical and Bit Operations. Chapter 8 S. Dandamudi
Logical and Bit Operations Chapter 8 S. Dandamudi Outline Logical instructions AND OR XOR NOT TEST Shift instructions Logical shift instructions Arithmetic shift instructions Rotate instructions Rotate
More informationMicroprocessor & Computer Architecture / Lecture
4- Shift and Rotate Instructions Shift and rotate instructions manipulate binary numbers at the binary bit level, as did the AND, OR, Exclusive-OR, and NOT instructions. The microprocessor contains a complete
More informationBasic Assembly SYSC-3006
Basic Assembly Program Development Problem: convert ideas into executing program (binary image in memory) Program Development Process: tools to provide people-friendly way to do it. Tool chain: 1. Programming
More informationInteger Arithmetic. Pu-Jen Cheng. Adapted from the slides prepared by Kip Irvine for the book, Assembly Language for Intel-Based Computers, 5th Ed.
Computer Organization & Assembly Languages Integer Arithmetic Pu-Jen Cheng Adapted from the slides prepared by Kip Irvine for the book, Assembly Language for Intel-Based Computers, 5th Ed. Chapter Overview
More informationComputer Department Chapter 7. Created By: Eng. Ahmed M. Ayash Modified and Presented by: Eng. Eihab S. El-Radie. Chapter 7
Islamic University Of Gaza Assembly Language Faculty of Engineering Discussion Computer Department Chapter 7 Created By: Eng. Ahmed M. Ayash Modified and Presented by: Eng. Eihab S. El-Radie Chapter 7
More information8088/8086 Programming Integer Instructions and Computations
Unit3 reference 2 8088/8086 Programming Integer Instructions and Computations Introduction Up to this point we have studied the software architecture of the 8088 and 8086 microprocessors, their instruction
More informationIntroduction to 8086 Assembly
Introduction to 8086 Assembly Lecture 8 Bit Operations Clock cycle & instruction timing http://www.newagepublishers.com/samplechapter/000495.pdf Clock cycle & instruction timing See 8086: http://www.oocities.org/mc_introtocomputers/instruction_timing.pdf
More informationWeek /8086 Microprocessor Programming I
Week 4 8088/8086 Microprocessor Programming I Example. The PC Typewriter Write an 80x86 program to input keystrokes from the PC s keyboard and display the characters on the system monitor. Pressing any
More informationQ1: Multiple choice / 20 Q2: Protected mode memory accesses
16.317: Microprocessor-Based Systems I Summer 2012 Exam 2 August 1, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationECOM Computer Organization and Assembly Language. Computer Engineering Department CHAPTER 7. Integer Arithmetic
ECOM 2325 Computer Organization and Assembly Language Computer Engineering Department CHAPTER 7 Integer Arithmetic Presentation Outline Shift and Rotate Instructions Shift and Rotate Applications Multiplication
More informationBasic Pentium Instructions. October 18
Basic Pentium Instructions October 18 CSC201 Section 002 Fall, 2000 The EFLAGS Register Bit 11 = Overflow Flag Bit 7 = Sign Flag Bit 6 = Zero Flag Bit 0 = Carry Flag "Sets the flags" means sets OF, ZF,
More information3.1 DATA MOVEMENT INSTRUCTIONS 45
3.1.1 General-Purpose Data Movement s 45 3.1.2 Stack Manipulation... 46 3.1.3 Type Conversion... 48 3.2.1 Addition and Subtraction... 51 3.1 DATA MOVEMENT INSTRUCTIONS 45 MOV (Move) transfers a byte, word,
More informationInteger Arithmetic. Shift and rotate. Overview. Shift and Rotate Instructions
Overview Integer Arithmetic Shift and rotate instructions and their applications Multiplication and division instructions Extended addition and subtraction Computer Organization and Assembly Languages
More informationChapter 7 Integer Arithmetic
Chapter 7 Integer Arithmetic 7.1 Introduction 193 7.2 Shift and Rotate Instructions 194 7.2.1 Logical Shifts and Arithmetic Shifts 194 7.2.2 SHL Instruction 195 7.2.3 SHR Instruction 196 7.2.4 SAL and
More informationInteger Arithmetic. Computer Organization and Assembly Languages Yung-Yu Chuang 2005/11/17. with slides by Kip Irvine
Integer Arithmetic Computer Organization and Assembly Languages Yung-Yu Chuang 2005/11/17 with slides by Kip Irvine Announcements Assignment #2 is due next week. Assignment #3 box filter is online now,
More informationBit Operations. Ned Nedialkov. McMaster University Canada. SE 3F03 February 2014
Bit Operations Ned Nedialkov McMaster University Canada SE 3F03 February 2014 Outline Logical shifts Arithmetic shifts Rotate shifts Where are rotate shifts used? Bitwise operations Bit operations in C
More informationWeek /8086 Microprocessor Programming II
Week 5 8088/8086 Microprocessor Programming II Quick Review Shift & Rotate C Target register or memory SHL/SAL 0 C SHR 0 SAR C Sign Bit 2 Examples Examples Ex. Ex. Ex. SHL dest, 1; SHL dest,cl; SHL dest,
More informationEECE.3170: Microprocessor Systems Design I Spring 2016
EECE.3170: Microprocessor Systems Design I Spring 2016 Exam 1 Solution 1. (20 points, 5 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response
More informationSigned number Arithmetic. Negative number is represented as
Signed number Arithmetic Signed and Unsigned Numbers An 8 bit number system can be used to create 256 combinations (from 0 to 255), and the first 128 combinations (0 to 127) represent positive numbers
More informationKingdom of Saudi Arabia Ministry of Higher Education. Taif University. Faculty of Computers & Information Systems
Kingdom of Saudi Arabia Ministry of Higher Education Taif University Faculty of Computers & Information Systems المملكة العربية السعودية وزارة التعليم العالي جامعة الطاي ف آلية الحاسبات ونظم المعلومات
More informationAssembly Language Lab # 4 Data Transfer & Arithmetic (1)
Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 4 Data Transfer & Arithmetic (1) Eng. Mohammad Elhindi Assembly Language Lab # 4 Data Transfer
More information16.317: Microprocessor Systems Design I Fall 2013
16.317: Microprocessor Systems Design I Fall 2013 Exam 1 Solution 1. (20 points, 5 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response by circling
More informationComputer Architecture and System Programming Laboratory. TA Session 3
Computer Architecture and System Programming Laboratory TA Session 3 Stack - LIFO word-size data structure STACK is temporary storage memory area register points on top of stack (by default, it is highest
More informationJones & Bartlett Learning, LLC NOT FOR SALE OR DISTRIBUTION 80x86 Instructions
80x86 Instructions Chapter 4 In the following sections, we review some basic instructions used by the 80x86 architecture. This Jones is by & no Bartlett means a Learning, complete list LLC of the Intel
More information22 Assembly Language for Intel-Based Computers, 4th Edition. 3. Each edge is a transition from one state to another, caused by some input.
22 Assembly Language for Intel-Based Computers, 4th Edition 6.6 Application: Finite-State Machines 1. A directed graph (also known as a diagraph). 2. Each node is a state. 3. Each edge is a transition
More informationArithmetic Instructions
Segment 3C Arithmetic Instructions This topic covers the following instructions: Addition (ADD, INC, ADC) Subtraction (SUB, DEC, SBB,CMP) Multiplication (MUL, IMUL) Division (DIV, IDIV) BCD Arithmetic
More informationX86 Addressing Modes Chapter 3" Review: Instructions to Recognize"
X86 Addressing Modes Chapter 3" Review: Instructions to Recognize" 1 Arithmetic Instructions (1)! Two Operand Instructions" ADD Dest, Src Dest = Dest + Src SUB Dest, Src Dest = Dest - Src MUL Dest, Src
More informationCMSC 313 Lecture 07. Short vs Near Jumps Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR
CMSC 313 Lecture 07 Short vs Near Jumps Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL, RCR More Arithmetic Instructions NEG, MUL, IMUL, DIV Indexed Addressing:
More informationCode segment Stack segment
Registers Most of the registers contain data/instruction offsets within 64 KB memory segment. There are four different 64 KB segments for instructions, stack, data and extra data. To specify where in 1
More informationLogical and bit operations
Assembler lecture 6 S.Šimoňák, DCI FEEI TU of Košice Logical and bit operations instructions performing logical operations, shifts and rotations logical expressions and bit manipulations strings Logical
More informationEx: Write a piece of code that transfers a block of 256 bytes stored at locations starting at 34000H to locations starting at 36000H. Ans.
INSTRUCTOR: ABDULMUTTALIB A H ALDOURI Conditional Jump Cond Unsigned Signed = JE : Jump Equal JE : Jump Equal ZF = 1 JZ : Jump Zero JZ : Jump Zero ZF = 1 JNZ : Jump Not Zero JNZ : Jump Not Zero ZF = 0
More informationIntel 8086: Instruction Set
IUST-EE (Chapter 6) Intel 8086: Instruction Set 1 Outline Instruction Set Data Transfer Instructions Arithmetic Instructions Bit Manipulation Instructions String Instructions Unconditional Transfer Instruction
More informationDefining and Using Simple Data Types
85 CHAPTER 4 Defining and Using Simple Data Types This chapter covers the concepts essential for working with simple data types in assembly-language programs The first section shows how to declare integer
More information8086 INSTRUCTION SET
8086 INSTRUCTION SET Complete 8086 instruction set Quick reference: AAA AAD AAM AAS ADC ADD AND CALL CBW CLC CLD CLI CMC CMP CMPSB CMPSW CWD DAA DAS DEC DIV HLT IDIV IMUL IN INC INT INTO I JA JAE JB JBE
More informationMnem. Meaning Format Operation Flags affected ADD Addition ADD D,S (D) (S)+(D) (CF) Carry ADC Add with ADC D,C (D) (S)+(D)+(CF) O,S,Z,A,P,C
ARITHMETIC AND LOGICAL GROUPS 6-1 Arithmetic and logical groups: The arithmetic group includes instructions for the addition, subtraction, multiplication, and division operations. The state that results
More informationCC411: Introduction To Microprocessors
CC411: Introduction To Microprocessors OBJECTIVES this chapter enables the student to: Describe the Intel family of microprocessors from 8085 to Pentium. In terms of bus size, physical memory & special
More informationIslamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB
Islamic University Gaza Engineering Faculty Department of Computer Engineering ECOM 2125: Assembly Language LAB Lab # 9 Integer Arithmetic and Bit Manipulation April, 2014 1 Assembly Language LAB Bitwise
More informationAssembly Language LAB
Assembly Language LAB Islamic University Gaza Engineering Faculty Department of Computer Engineering 2013 ECOM 2125: Assembly Language LAB Eng. Ahmed M. Ayash Lab # 3 Data Transfer & Arithmetic February
More informationINSTRUCTOR: ABDULMUTTALIB A. H. ALDOURI
8 Unsigned and Signed Integer Numbers 1. Unsigned integer numbers: each type of integer can be either byte-wide or word-wide. This data type can be used to represent decimal numbers in the range 0 through
More informationLecture 8: Control Structures. Comparing Values. Flags Set by CMP. Example. What can we compare? CMP Examples
Lecture 8: Control Structures CMP Instruction Conditional High Level Logic Structures Comparing Values The CMP instruction performs a comparison between two numbers using an implied subtraction. This means
More informationLecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit
Lecture 5:8086 Outline: 1. introduction 2. execution unit 3. bus interface unit 1 1. introduction The internal function of 8086 processor are partitioned logically into processing units,bus Interface Unit(BIU)
More informationEC 333 Microprocessor and Interfacing Techniques (3+1)
EC 333 Microprocessor and Interfacing Techniques (3+1) Lecture 6 8086/88 Microprocessor Programming (Arithmetic Instructions) Dr Hashim Ali Fall 2018 Department of Computer Science and Engineering HITEC
More informationArithmetic Logic Unit
Arithmetic Logic nit The arithmetic logic unit AL performs arithmetic, logic and shift operations. It is composed of three blocks namely the logic, arithmetic and shift blocks. Each block performs different
More information1-Operand instruction types 1 INC/ DEC/ NOT/NEG R/M. 2 PUSH/ POP R16/M16/SR/F 2 x ( ) = 74 opcodes 3 MUL/ IMUL/ DIV/ DIV R/M
Increment R16 1-Operand instruction types 1 INC/ DEC/ NOT/NEG R/M 4 x (16+48) = 256 opcodes 2 PUSH/ POP R16/M16/SR/F 2 x (8+24+4+1) = 74 opcodes 3 MUL/ IMUL/ DIV/ DIV R/M 4 x (16+48) = 256 opcodes INC
More information16.317: Microprocessor Systems Design I Spring 2014
16.317: Microprocessor Systems Design I Spring 2014 Exam 1 Solution 1. (20 points, 5 points per part) Multiple choice For each of the multiple choice questions below, clearly indicate your response by
More informationCMSC 313 Lecture 05 [draft]
CMSC 313 Lecture 05 [draft] More on Conditional Jump Instructions Short Jumps vs Near Jumps Using Jump Instructions Logical (bit manipulation) Instructions AND, OR, NOT, SHL, SHR, SAL, SAR, ROL, ROR, RCL,
More informationCSC 2400: Computer Systems. Towards the Hardware: Machine-Level Representation of Programs
CSC 2400: Computer Systems Towards the Hardware: Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32)
More informationIntel 8086 MICROPROCESSOR ARCHITECTURE
Intel 8086 MICROPROCESSOR ARCHITECTURE 1 Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 2 20 memory locations (1 MB). It can support up to 64K I/O ports. It provides 14, 16
More informationCSC 8400: Computer Systems. Machine-Level Representation of Programs
CSC 8400: Computer Systems Machine-Level Representation of Programs Towards the Hardware High-level language (Java) High-level language (C) assembly language machine language (IA-32) 1 Compilation Stages
More informationSection 001. Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 3 for Fall Semester,
More informationWeek /8086 Microprocessor Programming
Week 5 8088/8086 Microprocessor Programming Multiplication and Division Multiplication Multiplicant Operand Result (MUL or IMUL) (Multiplier) Byte * Byte AL Register or memory Word * Word AX Register or
More informationSection 001 & 002. Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 3 for Spring Semester,
More informationUNIT 2 PROCESSORS ORGANIZATION CONT.
UNIT 2 PROCESSORS ORGANIZATION CONT. Types of Operand Addresses Numbers Integer/floating point Characters ASCII etc. Logical Data Bits or flags x86 Data Types Operands in 8 bit -Byte 16 bit- word 32 bit-
More informationCS401 Assembly Language Solved MCQS From Midterm Papers
CS401 Assembly Language Solved MCQS From Midterm Papers May 14,2011 MC100401285 Moaaz.pk@gmail.com MC100401285@gmail.com PSMD01(IEMS) Question No:1 ( Marks: 1 ) - Please choose one The first instruction
More informationAPPENDIX C INSTRUCTION SET DESCRIPTIONS
APPENDIX C INSTRUCTION SET DESCRIPTIONS This appendix provides reference information for the 80C186 Modular Core family instruction set. Tables C-1 through C-3 define the variables used in Table C-4, which
More information8086 INTERNAL ARCHITECTURE
8086 INTERNAL ARCHITECTURE Segment 2 Intel 8086 Microprocessor The 8086 CPU is divided into two independent functional parts: a) The Bus interface unit (BIU) b) Execution Unit (EU) Dividing the work between
More informationRead this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University Department of Computer and Information Sciences CSCI 2150 (Tarnoff) Computer Organization TEST 3 for Fall Semester,
More informationComputer Architecture and Assembly Language. Practical Session 3
Computer Architecture and Assembly Language Practical Session 3 Advanced Instructions division DIV r/m - unsigned integer division IDIV r/m - signed integer division Dividend Divisor Quotient Remainder
More informationQ1: Multiple choice / 20 Q2: Memory addressing / 40 Q3: Assembly language / 40 TOTAL SCORE / 100
16.317: Microprocessor-Based Systems I Fall 2012 Exam 1 October 3, 2012 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationInternational Islamic University Chittagong (IIUC) Department of Electrical and Electronic Engineering (EEE)
International Islamic University Chittagong (IIUC) Department of Electrical and Electronic Engineering (EEE) EEE-3506: Microprocessor and Interfacing Sessional Experiment No. 05: Program control instructions
More informationSPRING TERM BM 310E MICROPROCESSORS LABORATORY PRELIMINARY STUDY
BACKGROUND 8086 CPU has 8 general purpose registers listed below: AX - the accumulator register (divided into AH / AL): 1. Generates shortest machine code 2. Arithmetic, logic and data transfer 3. One
More informationChapter Four Instructions Set
Chapter Four Instructions set Instructions set 8086 has 117 instructions, these instructions divided into 6 groups: 1. Data transfer instructions 2. Arithmetic instructions 3. Logic instructions 4. Shift
More informationSection 001. Read this before starting!
Points missed: Student's Name: Total score: /100 points East Tennessee State University -- Department of Computer and Information Sciences CSCI 2150 Computer Organization Final Exam for Spring Semester,
More informationicroprocessor istory of Microprocessor ntel 8086:
Microprocessor A microprocessor is an electronic device which computes on the given input similar to CPU of a computer. It is made by fabricating millions (or billions) of transistors on a single chip.
More informationMarking Scheme. Examination Paper. Module: Microprocessors (630313)
Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 12/06/2017 Section 1 Weighting 40% of
More informationSOEN228, Winter Revision 1.2 Date: October 25,
SOEN228, Winter 2003 Revision 1.2 Date: October 25, 2003 1 Contents Flags Mnemonics Basic I/O Exercises Overview of sample programs 2 Flag Register The flag register stores the condition flags that retain
More informationComputer Architecture and Organization: L04: Micro-operations
Computer Architecture and Organization: L4: Micro-operations By: A. H. Abdul Hafez Abdul.hafez@hku.edu.tr, ah.abdulhafez@gmail.com, hafez@research.iiit.ac.in 1 Outlines 1. Arithmetic microoperation 2.
More informationQ1: Multiple choice / 20 Q2: Data transfers and memory addressing
16.317: Microprocessor Systems Design I Fall 2014 Exam 1 October 1, 2014 Name: ID #: For this exam, you may use a calculator and one 8.5 x 11 double-sided page of notes. All other electronic devices (e.g.,
More informationFaculty of Engineering Computer Engineering Department Islamic University of Gaza Assembly Language Lab # 2 Assembly Language Fundamentals
Faculty of Engineering Computer Engineering Department Islamic University of Gaza 2011 Assembly Language Lab # 2 Assembly Language Fundamentals Assembly Language Lab # 2 Assembly Language Fundamentals
More information9/25/ Software & Hardware Architecture
8086 Software & Hardware Architecture 1 INTRODUCTION It is a multipurpose programmable clock drive register based integrated electronic device, that reads binary instructions from a storage device called
More informationLecture 15 Intel Manual, Vol. 1, Chapter 3. Fri, Mar 6, Hampden-Sydney College. The x86 Architecture. Robb T. Koether. Overview of the x86
Lecture 15 Intel Manual, Vol. 1, Chapter 3 Hampden-Sydney College Fri, Mar 6, 2009 Outline 1 2 Overview See the reference IA-32 Intel Software Developer s Manual Volume 1: Basic, Chapter 3. Instructions
More informationLecture 2 Assembly Language
Lecture 2 Assembly Language Computer and Network Security 9th of October 2017 Computer Science and Engineering Department CSE Dep, ACS, UPB Lecture 2, Assembly Language 1/37 Recap: Explorations Tools assembly
More informationLecture 5: Computer Organization Instruction Execution. Computer Organization Block Diagram. Components. General Purpose Registers.
Lecture 5: Computer Organization Instruction Execution Computer Organization Addressing Buses Fetch-Execute Cycle Computer Organization CPU Control Unit U Input Output Memory Components Control Unit fetches
More informationMicroprocessor and Assembly Language Week-5. System Programming, BCS 6th, IBMS (2017)
Microprocessor and Assembly Language Week-5 System Programming, BCS 6th, IBMS (2017) High Speed Memory Registers CPU store data temporarily in these location CPU process, store and transfer data from one
More informationEXPERIMENT WRITE UP. LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM
EXPERIMENT WRITE UP AIM: Assembly language program for 16 bit BCD addition LEARNING OBJECTIVES: 1. Get hands on experience with Assembly Language Programming 2. Write and debug programs in TASM/MASM TOOLS/SOFTWARE
More informationTYPES OF INTERRUPTS: -
There are 3 types of interrupts. TYPES OF INTERRUPTS: - External Interrupts. Internal Interrupts. Software interrupts. Hardware Interrupts (1) External interrupts come from I/O devices, from a timing device
More informationTransfer of Control. Lecture 10 JMP. JMP Formats. Jump Loop Homework 3 Outputting prompts Reading single characters
Lecture 10 Jump Loop Homework 3 Outputting prompts Reading single characters Transfer of Control The CPU loads and executes programs sequentially. You d like to be able to implement if statements, gotos,
More informationIntel 8086 MICROPROCESSOR. By Y V S Murthy
Intel 8086 MICROPROCESSOR By Y V S Murthy 1 Features It is a 16-bit μp. 8086 has a 20 bit address bus can access up to 2 20 memory locations (1 MB). It can support up to 64K I/O ports. It provides 14,
More informationCS241 Computer Organization Spring 2015 IA
CS241 Computer Organization Spring 2015 IA-32 2-10 2015 Outline! Review HW#3 and Quiz#1! More on Assembly (IA32) move instruction (mov) memory address computation arithmetic & logic instructions (add,
More informationPESIT Bangalore South Campus
INTERNAL ASSESSMENT TEST 2 Date : 02/04/2018 Max Marks: 40 Subject & Code : Microprocessor (15CS44) Section : IV A and B Name of faculty: Deepti.C Time : 8:30 am-10:00 am Note: Note: Answer any five complete
More informationMicroprocessors & Assembly Language Lab 1 (Introduction to 8086 Programming)
Microprocessors & Assembly Language Lab 1 (Introduction to 8086 Programming) Learning any imperative programming language involves mastering a number of common concepts: Variables: declaration/definition
More informationCS24: INTRODUCTION TO COMPUTING SYSTEMS. Spring 2017 Lecture 5
CS24: INTRODUCTION TO COMPUTING SYSTEMS Spring 2017 Lecture 5 LAST TIME Began exploring x86-64 instruction set architecture 16 general-purpose registers Also: All registers are 64 bits wide rax-rdx are
More informationMarking Scheme. Examination Paper Department of CE. Module: Microprocessors (630313)
Philadelphia University Faculty of Engineering Marking Scheme Examination Paper Department of CE Module: Microprocessors (630313) Final Exam Second Semester Date: 02/06/2018 Section 1 Weighting 40% of
More informationWe will first study the basic instructions for doing multiplications and divisions
MULTIPLICATION, DIVISION AND NUMERICAL CONVERSIONS We will first study the basic instructions for doing multiplications and divisions We then use these instructions to 1. Convert a string of ASCII digits
More informationLab 3. The Art of Assembly Language (II)
Lab. The Art of Assembly Language (II) Dan Bruce, David Clark and Héctor D. Menéndez Department of Computer Science University College London October 2, 2017 License Creative Commons Share Alike Modified
More information10-1 C D Pearson Education, Inc. M. Morris Mano & Charles R. Kime LOGIC AND COMPUTER DESIGN FUNDAMENTALS, 4e
10-1 C D E A B 10-2 A B A B C (A B) C D A A B (A B) C E D (A B) C D E (A B) C + D E (A B) C 10-3 Opcode Mode Address or operand 10-4 Memory 250 Opcode Mode PC = 250 251 ADRS 252 Next instruction ACC Opcode:
More informationUNIT II 16 BIT MICROPROCESSOR INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING. The Intel 8086 Instruction Set
UNIT II 16 BIT MICROPROCESSOR INSTRUCTION SET AND ASSEMBLY LANGUAGE PROGRAMMING The Intel 8086 Instruction Set 1.Explain Addressing Modes of 8086? ADDRESSING MODES Implied - the data value/data address
More information