Lecture 9. INC and DEC. INC/DEC Examples ADD. ADD Examples SUB. INC adds one to a single operand DEC decrements one from a single operand

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1 Lecture 9 INC and DEC Arithmetic Operations Shift Instructions Next week s homework! INC adds one to a single operand DEC decrements one from a single operand INC destination DEC destination where destination can be a register or a memory operand INC/DEC Examples ADD inc al ; increment 8-bit register dec bx ; decrement 16-bit register inc membyte ;increment 8-bit dec membyte ; decrement 8-bit inc memword ;increment 16-bit dec memword ;decrement 16-bit ADD adds a source operand to a destination operand of the same size. ADD dest, src ;dest = src+dest sizes must match only one operand (at most) can be a memory location all status flags are affected! ADD Examples SUB add cl, al ;add 8-bit register to register ;cl = cl + al add bx, 1000h ;add immediate to 16-bit ; register bx = bx h add var1, ax ;add 16-bit register to memory ;var1 = var1 + ax add dx, var1 ;add 16-bit memory to register ;dx = dx + var1 add var, 10 ;add immediate value to ;memory var = var + 10 SUB subtracts a source operand from a destination operand. SUB dest, src ;dest = dest src sizes must match only one operand (at most) can be a memory location all status flags are affected inside the CPU, SUB is performed by negating the src operand (using 2 s complement) and added to the dest operand 1

2 SUB Examples sub cl, al ;subtract 8-bit ; register from register ;cl = cl - al sub bx, 1000h ;subtract immediate ;value from 16-bit ;register ; bx = bx h sub var1, ax ;subtract 16-bit register ; from memory ;var1 = var1 - ax sub dx, var1 ;subtract 16-bit ;memory from register ;dx = dx var1 sub var1, 10 ;subtract immediate ;value from memory ;var1 = var1-10 Flags Affected: Zero Zero flag set when the result of an operation is zero. mov ax, 10 sub ax, 10 ;ax = 0, ZF = 1 mov bl, 4Fh add bl, 0B1h ;bl = 00, ZF = 1 mov ax, 0FFFFh ;ax = -1 inc ax ;ZF = 1 mov ax, 1 dec ax ;ZF = 1 Flags Affected: Sign Flags Affected: Carry Sign flag set when the result of an operation is negative. mov bx, 1 sub bx, 2 ;bx = FFFF, SF = 1 Carry flag set when there is a carry out of the left-most bit. mov bl, 4Fh add bl, 0B1h ;bl = 00, = 1 (4F + B1 = 1FFh since we only have eight bits, the 1 is discarded and the carry flag is set) Exception: INC and DEC do not set the carry flag! Flags Affected: flag set when an arithmetic operation generates a signed value that exceeds to storage size of the destination operand. This means that the value placed in the destination operand is incorrect. The CPU sets it by comparing the carry flag to the bit carried into the sign bit of the destination operand. If not equal, overflow is set. How you check for overflow depends on if you are using signed or unsigned operands. The programmer decides if they are using signed or unsigned numbers. The CPU updates both the carry and the overflow flags in order to cover both options. The programmer checks the appropriate flag depending on if they are doing signed or unsigned operations. 2

3 Unsigned During unsigned arithmetic, if the carry flag is set then overflow has occurred: addition: 0FFh + 1 = 100h. If you are only using 8 bits, then only the two lowest digits (00) fit into the destination. Carry is set and overflow has occurred (result will be 00, not 100) subtraction: 1 2 = 01 + FE = FF. If this is treated as unsigned, it is not correct! FF unsigned = 127. In this case, the carry flag is set and overflow has occurred. More on Unsigned Something looks strange about the subtraction: 01 + FE = FF -> where is the carry? For subtraction and negation, the carry flag is set if there is NO carry out of the most significant bit. 1 2 = 01 + FE = FF no carry, so carry bit is set to signify overflow. 2 1 = 02 + FF = 01 there is a carry, and the carry bit is cleared, signifying overflow. Yes, this is a bit counter-intuitive. Signed During signed arithmetic, the overflow flag is set when an out of range value is generated. Of course, the computer doesn t know if your values are signed or unsigned, so what does this really mean? If the carry into the sign bit differs from the carry out of the sign bit, then the overflow flag is set. Signed Examples mov al, 126 add al, = 80h carry into the sign bit is 1 carry out of sign bit is 0 80h = -128, not > overflow More Signed Shift and Rotate mov al, -128 sub al, al = 7Eh = 126, not (2 in 2 s comp) carry in = 0, carry out = 1 -> overflow Shift and rotate instructions provide a way to move bits around in an operand. SHL shift left SHLD double-precision shift left SHR shift right SHRD double-precision shift right SAL shift arithmetic left SAR shift arithmetic right ROL rotate left ROR rotate right RCL rotate carry left RCR rotate carry right 3

4 SHL shift left Each bit in the destination operand is shifted to the left, filling the lowest bit with zero. The high bit is moved to the carry bit, the bit that was in the carry bit is discarded. SHL dest,1 ;1 bit to left SHL dest, CL ;CL holds # of bits SHL dest, immed8 ; shift immed8 ;# of bits SHL continued shl bl, 1 ;shift bl 1 bit to the left ;bl = 05h, new bl = 0Ah shl wordval, 1 ;16-bit memory operand ;wordval = 50A7h, new ;wordval = A14Eh shl al, cl ;shift using count in cl ;al = 4Bh, cl = 4, new al = B0h shl bx, 5 ;shift left 5 ;bx = 50A7h, new bx = 14E0h 0 Uses for SHL SHR shift right The most common use is highspeed multiplication. mov dl, 1 ;dl = 1 shl dl, 1 ;dl = 2 shl dl, 1 ;dl = 4 shl dl, 1 ;dl = 8 etc. Each shift left multiplies by a power of 2! Shifting is much faster than multiplication. Each bit in the destination operand is shifted to the right, replacing the highest bit with a zero. The low bit is copied into the carry flag, and the bit that was in the carry flag is lost. Instruction formats are the same as in SHL. 0 SHR - continued shr bl, 1 ;shift bl 1 bit to the right ;bl = 05h, new bl = 02h shr wordval, 1 ;16-bit memory operand ;wordval = 50A7h, new ;wordval =2853h shr al, cl ;shift using count in cl ;al = 4Bh, cl = 4, new al = 04h shr bx, 5 ;shift right 5 ;bx = 50A7h, new bx = 0285h Uses for SHR You can use SHR to divide a number by 2: mov dl, 32 ; b shr dl, 1 ; b (dl = 16) You can use multiple shifts to divide by larger powers of 2: mov al, b ;al = 64 shr al, 3 ;divide by 8 ; al = b = 8 what numbers can t you divide this way? -> signed numbers! (sign is lost) 4

5 SAR SAR cont. So how do you divide signed numbers? SAR and SAL (shift arithmetic right and shift arithmetic left). SAL is identical to SHL and is included in the instruction set for completeness SAR shifts each bit to the right and makes a copy of the sign bit, preserving the sign of the number. mov al, 0F0h ;al = b ;(-16) sar al, 1 ;al = b ;(-8), = 0 mov dx, 80000h ;dx = ; b ;(-32768) sar dx, 5 ;dx = ; ;(-1024) shifting right 5 times is the same as dividing by 2**5. ROL ROL cont. ROL, rotate left, moves each bit to the left. The highest bit is copied into the carry flag and the lowest bit. In rotate instructions, bits are never lost as they rotate off one end, they rotate back on to the other. mov al, 40h rol al, 1 ;al = b ;al = b rol al, 1 ;al = b ;cf = 1 rol al, 1 ;al = b Example Using ROL ROR Example 1, p233 of Irvine Like ROL, except rotating right. mov al, 01h ;al = b ror al, 1 ;al = ;cf = 1 ror al, 1 ;al = b 5

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