ENE 334 Microprocessors
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1 Page 1 ENE 334 Microprocessors Lecture 10: MCS-51: Logical and Arithmetic : Dejwoot KHAWPARISUTH
2 ENE 334 MCS-51 Logical & Arithmetic Page 2 Logical: Objectives Use byte-level AND, OR, XOR and NOT Boolean instructions. Use bit-level AND, OR, and NOT Boolean instructions. Use bit-level set, clear, and data-moving instructions. Use 8- and 9-bit rotate instructions. Use the A register nibble-swapping instruction.
3 Logical: Intro Single point sensing and control implies a need for byte and bit opcodes that operate on data using Boolean operators. All 8051 RAM areas, both data and SFRs, may be manipulated using byte opcodes. Many of the SFRs, and a unique internal RAM area that is bit addressable, may be operated on at the individual bit level. Bit operators are notably efficient when speed of response is needed. Bit operators yield compact program code that enhances program execution speed. ENE 334 MCS-51 Logical & Arithmetic Page 3
4 ENE 334 MCS-51 Logical & Arithmetic Page 4 Logical: Intro The two data levels, byte or bit, at which the Boolean instructions operate are shown in the following table:
5 ENE 334 MCS-51 Logical & Arithmetic Page 5 Logical: Intro There are also rotate opcodes that operate only on a byte, or a byte and the Carry flag, to permit limited 8- and 9-bit shift-register operations. The following table shows the rotate opcodes:
6 ENE 334 MCS-51 Logical & Arithmetic Page 6 Logical: Byte Level Keep in mind that all such operations are done using each individual bit of the destination and source bytes. These operations, called byte-level Boolean operations because the entire byte is affected, are listed in the following table: Note: that no flags are affected by the byte-level logical operations unless the direct RAM address is the PSW
7 Logical: Byte Level ENE 334 MCS-51 Logical & Arithmetic Page 7
8 ENE 334 MCS-51 Logical & Arithmetic Page 8 Logical: Byte Level Many of these byte-level operations use a direct address, which can include the port SFR addresses, as a destination. The normal source of data from a port are the port pin; the normal destination for port data is the port latch. When the destination of a logical operation is the direct address of a port, the latch register, not the pins, is used both as the source for the original data and then the destination for the altered byte of data.
9 ENE 334 MCS-51 Logical & Arithmetic Page 9 Logical: Byte Level Any port operation that must first read the source data, logically operate on it, and then write it back to the source (now the destination) must use the latch. Logical operations that use the port as a source, but not as a destination, use the pins of the port as the source of the data.
10 ENE 334 MCS-51 Logical & Arithmetic Page 10 Logical: Byte Level For example, the port 0 latch contains FFh, but the pins are all driving transistor bases and are close to ground level. The logical operation ANL P0,#0Fh which is designed to turn the upper nibble transistors off, reads FFh from the latch, ANDs it with 0Fh to produce 0Fh as a result, and then writes it back to the latch to turn these transistors off.
11 ENE 334 MCS-51 Logical & Arithmetic Page 11 Logical: Byte Level Reading the pins produces the result 00h, turning all transistors off, in error. But, the operation ANL A,P0 produces A = 00h by using the port 0 pin data, which is 00h.
12 ENE 334 MCS-51 Logical & Arithmetic Page 12 Logical: Byte Level The following table shows byte-level logical operation examples:
13 ENE 334 MCS-51 Logical & Arithmetic Page 13 Logical: Byte Level Note that instructions that can use the SFR port latches as destinations are ANL, ORL, and XRL.
14 ENE 334 MCS-51 Logical & Arithmetic Page 14 Logical: Bit Level The bit-level Boolean logical opcodes operate on any addressable RAM or SFR bit. The Carry flag (C) in the PSW special-function register is the destination for most of the opcodes because the flag can be tested and the program flow changed using instructions covered in Chapter 8.
15 ENE 334 MCS-51 Logical & Arithmetic Page 15 Logical: Bit Level The following table lists the Boolean bit-level operations: Note: that no flags, other than the C flag, are affected, unless the flag is an addressed bit.
16 ENE 334 MCS-51 Logical & Arithmetic Page 16 Logical: Bit Level As is the case for byte-logical operations when addressing ports as destinations, a port bit used as a destination for a logical operation is part of the SFR latch, not the pin. A port bit used as a source only is a pin, not the latch. The bit instructions that can use a SFR latch bit are: CLR, CPL, MOV, and SETB.
17 ENE 334 MCS-51 Logical & Arithmetic Page 17 Logical: Bit Level Bit-level logical operation examples are shown in the following table:
18 Logical: Bit Level ENE 334 MCS-51 Logical & Arithmetic Page 18
19 Logical: Rotate and Swap The ability to rotate data is useful for inspecting bits of a byte without using individual bit opcodes. The A register can be rotated one bit position to the left or right with or without including the C flag in the rotation. If the C flag is not included, then the rotation involves the eight bits of the A register. If the C flag is included, then nine bits are involved in the rotation. Including the C flag enables the programmer to construct rotate operations involving any number of bytes. ENE 334 MCS-51 Logical & Arithmetic Page 19
20 ENE 334 MCS-51 Logical & Arithmetic Page 20 Logical: Rotate and Swap The SWAP instruction can be thought of as a rotation of nibbles in the A register. Figure diagrams the rotate and swap operations, which are given in the following table:
21 Logical: Rotate and Swap ENE 334 MCS-51 Logical & Arithmetic Page 21
22 ENE 334 MCS-51 Logical & Arithmetic Page 22 Logical: Rotate and Swap The following table shows examples of rotate and swap operations.
23 Logical: Rotate and Swap ENE 334 MCS-51 Logical & Arithmetic Page 23
24 ENE 334 MCS-51 Logical & Arithmetic Page 24 Logical: Example The programs in this section are written using only opcodes covered to this point in the book. The challenge is to minimize the number of lines of code.
25 Logical: Example 6.1 Double the number in register R2, and put the result in registers R3 (high byte) and R4 (low byte). Thoughts on the Problem: The largest number in R2 is FFh; the largest result is 1FEh. There are at least three ways to solve this problem: Use the MUL instruction (multiply, covered in Chapter 7), add R2 to itself, or shift R2 left one time. The solution that shifts R2 left is as follows: ENE 334 MCS-51 Logical & Arithmetic Page 25
26 Logical: Example 6.1 ENE 334 MCS-51 Logical & Arithmetic Page 26
27 Logical: Example 6.2 OR the contents of ports 1 and 2; put the result in external RAM location 0100h. Thoughts on the Problem The ports should be input ports for this problem to make any physical sense; otherwise, we would not know whether to use the pin data or the port SFR latch data. The solution is as follows: ENE 334 MCS-51 Logical & Arithmetic Page 27
28 Logical: Example 6.2 ENE 334 MCS-51 Logical & Arithmetic Page 28
29 Logical: Example 6.3 Find a number that, when XORed to the A register, results in the number 3Fh in A. Thoughts on the Problem Any number can be in A, so we will work backwards: 3Fh = A XOR N A XOR 3Fh = A XOR A XOR N = N The solution is as follows: ENE 334 MCS-51 Logical & Arithmetic Page 29
30 Logical: Example 6.3 ENE 334 MCS-51 Logical & Arithmetic Page 30
31 ENE 334 MCS-51 Logical & Arithmetic Page 31 Logical: Summary Boolean logic, rotate, and swap instructions are covered in this chapter. Byte-level operations involve each individual bit of a source byte operating on the same bit position in the destination byte; the results are put in the destination, while the source is not changed:
32 ENE 334 MCS-51 Logical & Arithmetic Page 32 Logical: Summary ANL destination, source ORL destination, source XRL destination, source CLRA CPLA RRA RLA RRCA RLCA SWAP A
33 ENE 334 MCS-51 Logical & Arithmetic Page 33 Logical: Summary Bit-level operations involve individual bits found in one area of internal RAM and certain SFRs that may be addressed both by the assigned direct-byte address and eight individual bit addresses. The following Boolean logical operations may be done on each of these addressable bits:
34 ENE 334 MCS-51 Logical & Arithmetic Page 34 Logical: Summary ANL bit ORL bit CLR bit CPL bit SETB bit MOV C, source bit MOV destination bit, C
35 ENE 334 MCS-51 Logical & Arithmetic Page 35 Lecture 10: MCS-51: Arithmetic operations
36 ENE 334 MCS-51 Logical & Arithmetic Page 36 Arithmetic: Objectives Use instructions to increment and decrement the contents of registers and RAM. Do signed and unsigned addition and subtraction. Do unsigned multiplication and division. Do BCD addition.
37 ENE 334 MCS-51 Logical & Arithmetic Page 37 Arithmetic: Intro The 24 arithmetic opcodes are grouped into the following types:
38 ENE 334 MCS-51 Logical & Arithmetic Page 38 Arithmetic: Intro The addressing modes for the destination and source are immediate, register, direct, and indirect. The 8051 has four arithmetic flags: the Carry (C), Auxiliary Carry (AC), Overflow (OV), and Parity (P).
39 ENE 334 MCS-51 Logical & Arithmetic Page 39 Arithmetic: Intro Instructions Affecting Flags The C, AC, and OV flags are arithmetic flags. They are set to 1 or cleared to 0 automatically, depending on the outcomes of the following instructions. The following instruction set includes all instructions that modify the flags and is not confined to arithmetic instructions:
40 Arithmetic: Intro ENE 334 MCS-51 Logical & Arithmetic Page 40
41 ENE 334 MCS-51 Logical & Arithmetic Page 41 Arithmetic: Intro The Parity flag is affected by every instruction executed. The P flag will be set to a 1 if the number of 1 s in the A register is odd and will be set to 0 if the number of 1 s is even.
42 Arithmetic: Inc & Dec Register, direct, and indirect addresses may be INCremented or DECremented. No math flags (C, AC, OV) are affected. The following table lists the increment and decrement mnemonics: Note: that increment and decrement instructions that operate on a port direct address alter the latch for that port. ENE 334 MCS-51 Logical & Arithmetic Page 42
43 Arithmetic: Inc & Dec ENE 334 MCS-51 Logical & Arithmetic Page 43
44 ENE 334 MCS-51 Logical & Arithmetic Page 44 Arithmetic: Inc & Dec The following table shows examples of increment and decrement arithmetic operations:
45 Arithmetic: Inc & Dec ENE 334 MCS-51 Logical & Arithmetic Page 45
46 ENE 334 MCS-51 Logical & Arithmetic Page 46 Arithmetic: Addition The following table lists the addition mnemonics:
47 ENE 334 MCS-51 Logical & Arithmetic Page 47 Arithmetic: Addition Note: that the C flag is set to 1 if there is a carry out of bit position 7; it is cleared to 0 otherwise. The AC flag is set to 1 if there is a carry out of bit position 3, it is cleared otherwise. The OV flag is set to 1 if there is a carry out of bit position 7, but not bit position 6 or if there is a carry out of bit position 6 but not bit position 7, which may be expressed as the logical operation OV = C7 XOR C6
48 ENE 334 MCS-51 Logical & Arithmetic Page 48 Arithmetic: Unsigned & Signed Unsigned Addition Signed Addition
49 ENE 334 MCS-51 Logical & Arithmetic Page 49 Arithmetic: Unsigned & Signed If positive numbers are added, there is the possibility that the sum will exceed + 127d, as demonstrated in the following example:
50 ENE 334 MCS-51 Logical & Arithmetic Page 50 Arithmetic: Unsigned & Signed Ignoring the sign of the result, the magnitude is seen to be +22d, which would be correct if we had some way of accounting for the +128d, which, unfortunately, is larger than a single byte can hold. There is no carry from bit 7 (the Carry flag is 0); there is a carry from bit 6 so the OV flag is 1.
51 ENE 334 MCS-51 Logical & Arithmetic Page 51 Arithmetic: Unsigned & Signed An example of adding two positive numbers that do not exceed the positive limit is this: Note: that there are no carries from bits 6 or 7 of the sum; the Carry and OV flags are both 0.
52 Arithmetic: Unsigned & Signed The result of adding two negative numbers together for a sum that does not exceed the negative limit is shown in this example: Here, there is a carry from bit 7 and the Carry flag is 1; there is a carry from bit 6 and the OV flag is 0. These are the same flags as the case for adding unlike numbers; no corrections are needed for the sum. ENE 334 MCS-51 Logical & Arithmetic Page 52
53 ENE 334 MCS-51 Logical & Arithmetic Page 53 Arithmetic: Unsigned & Signed When adding two negative numbers whose sum does exceed -128d, we have: Or, the magnitude can be interpreted as -12d, which is the remainder after a carry out of -128d. In this example, there is a carry from bit position 7, and no carry from bit position 6, so the Carry and the OV flags are set to 1. The magnitude of the sum is correct the sign bit must be changed to a 1.
54 ENE 334 MCS-51 Logical & Arithmetic Page 54 Arithmetic: Unsigned & Signed From these examples the programming actions needed for the C and OV flags are as follows:
55 ENE 334 MCS-51 Logical & Arithmetic Page 55 Arithmetic: Unsigned & Signed A general rule is that if the OV flag is set, then complement the sign. The OV flag also signals that the sum exceeds the largest positive or negative numbers thought to be needed in the program.
56 ENE 334 MCS-51 Logical & Arithmetic Page 56 Arithmetic: Unsigned & Signed The following table lists the add with carry mnemonics: Note: that the C, AC, and OV flags behave exactly as they do for the ADD commands.
57 ENE 334 MCS-51 Logical & Arithmetic Page 57 Arithmetic: Unsigned & Signed The following table shows examples of ADD and ADDC multiple-byte signed arithmetic operations:
58 Arithmetic: Unsigned & Signed ENE 334 MCS-51 Logical & Arithmetic Page 58
59 ENE 334 MCS-51 Logical & Arithmetic Page 59 Arithmetic: Subtraction The following table lists the subtract mnemonics:
60 ENE 334 MCS-51 Logical & Arithmetic Page 60 Arithmetic: Subtraction Note: that the C flag is set if a borrow is needed into bit 7 and reset otherwise. The AC flag is set if a borrow is needed into bit 3 and reset otherwise. The OV flag is set if there is a borrow into bit 7 and not bit 6 or if there is a borrow into bit 6 and not bit 7. As in the case for addition, the OV flag is the XOR of the borrows into bit positions 7 and 6.
61 ENE 334 MCS-51 Logical & Arithmetic Page 61 Arithmetic: Unsigned Unsigned Subtraction The following example demonstrates subtraction of a larger number from a smaller number: The C flag is set to 1, and the OV flag is set to 0. The two s complement of the result is 085d.
62 ENE 334 MCS-51 Logical & Arithmetic Page 62 Arithmetic: Unsigned & Signed The reverse of the example yields the following result: The C flag is set to 0, and the OV flag is set to 0. The magnitude of the result is in true form.
63 ENE 334 MCS-51 Logical & Arithmetic Page 63 Arithmetic: Signed Signed Subtraction There is a borrow into bit positions 7 and 6; the Carry flag is set to 1, and the OV flag is cleared.
64 ENE 334 MCS-51 Logical & Arithmetic Page 64 Arithmetic: Signed The following example demonstrates using two negative numbers: There are no borrows into bit positions 6 or 7, so the OV and Carry flags are cleared to 0.
65 ENE 334 MCS-51 Logical & Arithmetic Page 65 Arithmetic: Signed An overflow is possible when subtracting numbers of opposite sign because the situation becomes one of adding numbers of like signs, as can be demonstrated in the following example:
66 Arithmetic: Signed Here, there is a borrow into bit position 6 but not into bit position 7, the OV flag is set to 1, and the Carry flag is cleared to 0. Because the OV flag is set to 1, the result must be adjusted. In this case, the magnitude can be interpreted as the two s complement of 71d, the remainder after a carry out of 128d from 199d. The magnitude is correct, and the sign needs to be corrected to a 1. ENE 334 MCS-51 Logical & Arithmetic Page 66
67 ENE 334 MCS-51 Logical & Arithmetic Page 67 Arithmetic: Signed The following example shows a positive overflow: There is a borrow from bit position 7, and no borrow from bit position 6; the OV flag and the Carry flag are both set to 1. Again the answer must be adjusted because the OV flag is set to 1. The magnitude can be interpreted as a +011d, the remainder from a carry out of 128d. The sign must be changed to a binary 0 and the OV condition dealt with.
68 ENE 334 MCS-51 Logical & Arithmetic Page 68 Arithmetic: Signed The general rule is that if the OV flag is set to 1, then complement the sign bit. The OV flag also signals that the result is greater than -128d or + 127d. Note that for all the examples in this section, it is assumed that the Carry flag = 0 before the SUBB. The Carry flag must be 0 before any SUBB operation that depends on C = 0 is done.
69 ENE 334 MCS-51 Logical & Arithmetic Page 69 Arithmetic: Signed The following table lists examples of SUBB multiple-byte signed arithmetic operations:
70 Arithmetic: Signed ENE 334 MCS-51 Logical & Arithmetic Page 70
71 ENE 334 MCS-51 Logical & Arithmetic Page 71 Arithmetic: Mul & Div The 8051 has the capability to perform 8-bit integer multiplication and division using the A and B registers. Multiplication and division treat the numbers in registers A and B as unsigned. The programmer must devise ways to handle signed numbers.
72 ENE 334 MCS-51 Logical & Arithmetic Page 72 Arithmetic: Multiplication Multiplication operations use registers A and B as both source and destination addresses for the operation. The unsigned number in register A is multiplied by the unsigned number in register B, as indicated in the following table:
73 ENE 334 MCS-51 Logical & Arithmetic Page 73 Arithmetic: Multiplication The OV flag will be set if A x B > FFh. Setting the OV flag does not mean that an error has occurred. Rather, it signals that the number is larger than 8 bits, and the programmer needs to inspect register B for the highorder byte of the multiplication operation. The Carry flag is always cleared to 0.
74 ENE 334 MCS-51 Logical & Arithmetic Page 74 Arithmetic: Multiplication The following list gives examples of MUL multiple-byte arithmetic operations:
75 ENE 334 MCS-51 Logical & Arithmetic Page 75 Arithmetic: Division Division operations use registers A and B as both source and destination addresses for the operation. The unsigned number in register A is divided by the unsigned number in register B, as indicated in the following table:
76 ENE 334 MCS-51 Logical & Arithmetic Page 76 Arithmetic: Division The OV flag is cleared to 0 unless B holds 00h before the DIV. Then the OV flag is set to 1 to show division by 0. The contents of A and B, when division by 0 is attempted, are undefined. The Carry flag is always reset.
77 ENE 334 MCS-51 Logical & Arithmetic Page 77 Arithmetic: Division Division always results in integer quotients and remainders, as shown in the following example: When done in hex:
78 ENE 334 MCS-51 Logical & Arithmetic Page 78 Arithmetic: Division The following table lists examples of DIV multiple-byte arithmetic operations:
79 ENE 334 MCS-51 Logical & Arithmetic Page 79 Arithmetic: Decimal The opcode that adjusts the result of BCD addition is the decimal adjust A for addition (DA A) command, as shown in the following table:
80 ENE 334 MCS-51 Logical & Arithmetic Page 80 Arithmetic: Decimal The C flag is set to 1 if the adjusted number exceeds 99BCD and set to 0 otherwise. The DA A instruction makes use of the AC flag and the binary sums of the individual binary nibbles to adjust the answer to BCD. The AC flag has no other use to the programmer and no instructions other than a MOV or a direct bit operation to the PSW affect the AC flag.
81 ENE 334 MCS-51 Logical & Arithmetic Page 81 Arithmetic: Decimal The following table gives examples of BCD multiple-byte arithmetic operations:
82 Arithmetic: Decimal ENE 334 MCS-51 Logical & Arithmetic Page 82
83 ENE 334 MCS-51 Logical & Arithmetic Page 83 Arithmetic: Example 7.1 Add the unsigned numbers found in internal RAM locations 25h, 26h, and 27h together and put the result in RAM locations 31h (MSB) and 30h (LSB). Thoughts on the Problem The largest number possible is FFh + FFh + FFh = 02FDh so that 2 bytes will hold the largest possible number. The MSB will be set to 0 and any carry bit added to it for each byte addition.
84 ENE 334 MCS-51 Logical & Arithmetic Page 84 Arithmetic: Example 7.1 To solve this problem, use an ADD instruction for each addition and an ADDC to the MSB for each carry that might be generated. The first ADD will adjust any Carry flag that exists before the program starts.
85 ENE 334 MCS-51 Logical & Arithmetic Page 85 Arithmetic: Example 7.1 The complete program is shown in the following table:
86 Arithmetic: Example 7.1 ENE 334 MCS-51 Logical & Arithmetic Page 86
87 Arithmetic: Example 7.2 Repeat problem 7.1 using BCD numbers. Thoughts on the Problem The numbers in the RAM locations must be in BCD before the problem begins. The largest number possible is 99d + 99d = 198d + 99d = 297d, so that up to two carries can be added to the MSB. The solution to this problem is identical to that for unsigned numbers, except a DA A must be added after each ADD instruction. If more bytes were added so that the MSB could exceed 09d, then a DA A would also be necessary after the ADDC opcodes. ENE 334 MCS-51 Logical & Arithmetic Page 87
88 ENE 334 MCS-51 Logical & Arithmetic Page 88 Arithmetic: Example 7.2 The complete program is shown in the following table:
89 Arithmetic: Example 7.2 ENE 334 MCS-51 Logical & Arithmetic Page 89
90 ENE 334 MCS-51 Logical & Arithmetic Page 90 Arithmetic: Example 7.3 Multiply the unsigned number in register R3 by the unsigned number on port 2 and put the result in external RAM locations 10h (MSB) and 11h (LSB). Thoughts on the Problem The MUL instruction uses the A and B registers; the problem consists of MOVes to A and B followed by MOVes to the external RAM. The complete program is shown in the following table:
91 Arithmetic: Example 7.3 ENE 334 MCS-51 Logical & Arithmetic Page 91
92 Arithmetic: Example 7.3 ENE 334 MCS-51 Logical & Arithmetic Page 92
93 ENE 334 MCS-51 Logical & Arithmetic Page 93 Arithmetic: Summary The 8051 can perform all four arithmetic operations: addition, subtraction, multiplication, and division. Signed and unsigned numbers may be used in addition and subtraction; an OV flag is provided to signal programmer errors in estimating signed number magnitudes needed and to adjust signed number results. Multiplication and division use unsigned numbers. BCD arithmetic may be done using the DA A and ADD or ADDC instructions.
94 ENE 334 MCS-51 Logical & Arithmetic Page 94 Arithmetic: Summary The following table lists the arithmetic mnemonics:
95 Hw: ENE 334 MCS-51 Logical & Arithmetic Page 95
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