# MIPS Assembly Programming

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1 COMP 212 Computer Organization & Architecture COMP 212 Fall 2008 Lecture 8 Cache & Disk System Review MIPS Assembly Programming Comp 212 Computer Org & Arch 1 Z. Li, 2008 Comp 212 Computer Org & Arch 2 Z. Li, 2008 Cache System More on addressing Cache system: Typically» SRAM for cache CPU Cache (SRAM) access time t 1 =10ns For a 2-level cache/mem system Mem word address is W (e.g 8) bit, then we can address 2 W =256 words. If we group 2 B word into a block, then we have» DRAM for memory Memory / Cache Organization» Memory into blocks» Cache into lines size S 1 =500K Memory (DRAM) access time t 2 =100ns total 2 W-B blocks, e.g., 4 word a block, we have 2 6 =64 blocks. Cache organized into cache line, each accommodate a mem block. If we have 2 M cache lines, then we need M bits as cache line address... 2 M =16 Cache lines Address mapping:» Mem address W is mapped to cache line location, and tags Size S 2 =2500K» E.g, 16 cache lines, need 4 bits. We have more memory blocks than cache lines, e.g, 64>16. So cache addressing is to find ways to map mem blocks into cache lines. 2 W-B =64 blocks Comp 212 Computer Org & Arch 3 Z. Li, 2008 Comp 212 Computer Org & Arch 4 Z. Li, 2008

3 Integer Conversion between Binary and Decimal Systems Numbers and Arithmetic in Computer (a0) (a1) (a2) (a3) N N = ( a n 1 a / 2 = ( a (12)10 = (a3 a2 a1 a0)2 = (1100)2, n 2 n 1... a a 1 n 1 0 ) 2 + a n 2 n a 1 ( a a 1 + a ) / 2 n 2 n 3 0 n 1 + an a1 ) + 0 Quotient Remainder 0 Comp 212 Computer Org & Arch 9 Z. Li, 2008 Comp 212 Computer Org & Arch 10 Z. Li, 2008 Fraction Conversion between Decimal and Binary Systems Multiply Method N =.( a 1 a 2 N =.( a = a a m 1 +.( a ) a a a m m m+ 1 ) m ) Exercise 2: Decimal to Binary (28.59)10= (? )2 (Calculate up to 5 bits for fraction) Integer (0.7)10 = (? )2 Procedure: 0.7 x 2 = x 2 = x 2 = Fraction (0.7)10 = 0.(101 )2 Comp 212 Computer Org & Arch 11 Z. Li, 2008 Comp 212 Computer Org & Arch 12 Z. Li, 2008

4 Binary Addition and Subtraction Binary Multiplications and Divisions Relatively straight forward: Addition Rules: 0+0= sum-0 carry = sum-0 carry = sum-0 carry carry Subtraction Rules: 0-0 = 1-1 = = = 1 with a borrow of borrows Multiplication: X If multiplicate by 1, copy the row If multiplicate by 0, copy all zero Add them together Comp 212 Computer Org & Arch 13 Z. Li, 2008 Comp 212 Computer Org & Arch 14 Z. Li, / 11? Division: Binary Divisions Sign + Magnitude : Rarely used Signed Integers 2 s Complement (n bit) : -X = [X] 2 = 2 n (X) 2 Simple Two Steps: -X = [X] + 1, [] is the Boolean complement operator, flipping each bit. 1. Take the complement of each bit of N ( 0 1, 1 0 ) given: 0011,1100 Flipping each bit: 1100, Add The complement: 1100,0100 (sum: 1,000,0000) Solution: Quotient = 13= (1101) 2, remainder = 4 = (100) 2. Comp 212 Computer Org & Arch 15 Z. Li, 2008 Comp 212 Computer Org & Arch 16 Z. Li, 2008

5 2 s complement arithmetic 2 s complement arithmetic examples Addition very much the same as un-signed A-B = A+[B] 2 Overflow: iff A and B are the same sign while result not the same sign Pad 1 to the negative number, and 0 to the positive number: Eg. (-18) 10 = = (+18) 10 = = Comp 212 Computer Org & Arch 17 Z. Li, 2008 Comp 212 Computer Org & Arch 18 Z. Li, 2008 Floating Point Representation For the 32 bit example in Fig. 9.18: Floating Point Representation For the 32 bit example in Fig. 9.18: What is the sign, exponent, and significand of the following number? Eg.: 30.25? (1)Integer part: 30 = = (2) Fraction part: 0.25 = 0.01 (3) = , need to normalize s.t. the point is next to the msb 1. (4) = ( )x2 4, sign = 0 (positive), exponent = 4+bias = 4+127=131 = Signifcand = What is the sign, exponent, and significand of the following number? (2) ? Integer part: 45 = Fraction part: = = , need to normalize s.t. the point is next to the msb = ( )x2 5, sign = 1 (negative), exponent = 5+bias = 5+127=132 = Signifcand = Comp 212 Computer Org & Arch 19 Z. Li, 2008 Comp 212 Computer Org & Arch 20 Z. Li, 2008

6 About Mid-term Mid-term Cover Page Coverage: Only covers materials in lectures 1~5 Account for 25% of the final assessment, Quiz-1 will not be counted. Time & Venu: Oct 30 th, 2008, 8:30am-10:50am Lecture Room N 001, the COMP 212 class room. Rules: Close book, close notes NO calculator Do it independently, no discussion Violation of Rules may result in zero marks for the mid-term. Comp 212 Computer Org & Arch 21 Z. Li, 2008 Comp 212 Computer Org & Arch 22 Z. Li, 2008 MIPS simulator on PC: SPIM from Univ of Wisconsin: Reference Materials MIPS Assembly Programming Contains a lot of useful info, check it out and download the simulator. MIPS Assembly Programming R. L. Britton Optional but very useful See to be available for download at:» Comp 212 Computer Org & Arch 23 Z. Li, 2008 Comp 212 Computer Org & Arch 24 Z. Li, 2008

7 Outline MIPS Architecture Introduction to MIPS architecture MIPS Assembly Language Arithmetic & Logic Ops Arithmetic:» add, sub, addi, addu, addiu, subu Program Control Data movement :» lw, sw, lbu, sb, lui, ori Program Control:» Branch, jump, stacks and procedure calls MIPS programming examples Comp 212 Computer Org & Arch 25 Z. Li, 2008 Comp 212 Computer Org & Arch 26 Z. Li, 2008 About MIPS What is MIPS? Microprocessor w/o Interlocked Pipeline Stages It is a RISC MIPS register file Total 32 registers Each 32 bit In MIPS programming, named as \$0~\$31, or : as compared with CISC processor like Pentium Very successful, 1/3 RISC chip is MIPS based. Used in SGI stations, CISCO routers, Motorola Set-Top Boxes, SONY Play station, PSP, Nintendo 64.etc. Comp 212 Computer Org & Arch 27 Z. Li, 2008 Comp 212 Computer Org & Arch 28 Z. Li, 2008

8 MIPS Assembly Programs Example: add rd, rs, rt MIPS instructions and data Instructions are given in.text segments» A MIPS program can have multiple.text segments Data are defined in.data segments using MIPS assembly directives».word, for example, defines the following numbers in successive memory words Assembly Programs One instruction one line (32 bit) Use readable symbols instead of 32 bits patterns Comp 212 Computer Org & Arch 29 Z. Li, 2008 Comp 212 Computer Org & Arch 30 Z. Li, 2008 addi rt, rs, imm Arithmetic Instructions Additions: Add rd, rs, rt # rd=rs+rt, signed int Addu rd, rs, rt # rd=rs+rt, unsigned I Type (Immediate) instruction: rt = rt+rs+imm 5 bits to specify one of the 32 registers 16 bit for immediate number (signed) Addi rt, rs, imm # rt = rs + imm Addiu rt, rs, imm # rt = rs + imm, unsigned Subtraction: Sub rd, rs, rt # rd = rs rt Subu rd, rs, rt # rd = rs - rt Comp 212 Computer Org & Arch 31 Z. Li, 2008 Comp 212 Computer Org & Arch 32 Z. Li, 2008

10 Example of Load/Save Data Program 3 students grades are saved in the memory, compute its sum and store at the end of array: Grades = [ ], store at Total Use store register value to mem: Sw \$s1, 12(\$s2) # store s1 to mem start at s2, with offset 12.text signal the start of program.data signal the start of data definitions Data labels, grades, total has a mem addr. Comp 212 Computer Org & Arch 37 Z. Li, 2008 Comp 212 Computer Org & Arch 38 Z. Li, 2008 Execution in SPIM Address Mode Why this weird way of address memory? To support array operation which is very typical A register offers base, or start of array address Immediate number provides the offset! Notice that word address increment by 4, so element k in the array has offset 4*k: Comp 212 Computer Org & Arch 39 Z. Li, 2008 Comp 212 Computer Org & Arch 40 Z. Li, 2008

12 While Loop: While (\$a1 < \$a2) do { \$a1 = \$a1 +1 \$a2 = \$sa - 1 } MIPS implementation: While Loop Control String copy in C: Example: String Copy Copy contents from mem location X to Y String by def are 0 terminated. X = [12, 3, 2, 19, 0], Y = [ 23, 4, 5, 0], then after strcpy(x, y) X = [23, 4, 5, 0] Comp 212 Computer Org & Arch 45 Z. Li, 2008 Comp 212 Computer Org & Arch 46 Z. Li, 2008 Example: String Copy MIPS implementation MIPS implementation: Load/store byte from memory:» lb \$t0, 0(\$s2) # load byte to address in (\$s2)» sb \$t0, 0(\$s3) # store byte to address in (\$s3) Increment/Decrement register by 1, as byte address are incremented by 1» addi \$s0, \$s0, 1 #s0++» addi \$s0, \$s0, -1 # s0-- System call to print a string to the console:» li \$v0, 4» la \$a0, str» syscall Comp 212 Computer Org & Arch 47 Z. Li, 2008 Comp 212 Computer Org & Arch 48 Z. Li, 2008

13 Subroutine Calls Goal: A segment of code for certain functions that can be called by others, Example: multiply, y = mult(x1, x2) Issues: How to call a subroutine?» How to pass parameters, e.g. x1, x2» How to get return values?, eg. Y? How to write a subroutine?» Where to look for parameters?» Save registers, return value» Return to the caller. Register usage convention \$a0~\$a4: registers for passing arguments \$v0, \$v1: return values \$ra: return address register, sub routine should return to when finishing up the operation. Use stack to implement Before calling the subroutine, save PC+4 to \$ra,» Use jump & link: jal mult_subroutine Return by calling jr \$ra Comp 212 Computer Org & Arch 49 Z. Li, 2008 Comp 212 Computer Org & Arch 50 Z. Li, 2008 Save registers What if sub routines need to use registers? Temp registers are ok \$t0~\$t7, no need to save their value Need to save before use: \$s0~\$s7 Usually done by push to stack and pop out later before jr \$ra An example Compute the sum of an array: int sum(*x, n) Psuedo code: Sum=0; For k=1:n Sum=sum+x(k); End parameters:» \$a0 : *x, array address, \$a1: n» Return: \$v0 Comp 212 Computer Org & Arch 51 Z. Li, 2008 Comp 212 Computer Org & Arch 52 Z. Li, 2008

15 MIPS Summary A RISC architecture 32 registers Instructions: Data movement Arithmetic Program Control Subroutine and System Calls Comp 212 Computer Org & Arch 57 Z. Li, 2008

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