The UNIVERSITY of NORTH CAROLINA at CHAPEL HILL

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1 The UNIVERSITY of NORTH CAROLINA at CHAPEL HILL Comp 4 Computer Organization Fall 26 Solutions for Problem Set #7 Problem. Bits of Floating-Point Represent the following in single-precision IEEE floating point. Give your answers in hexadecimal: (2 pts each) a) = = x43cd8 b) = = x42cd8 c) = = x3d8 d) (Hint: ) = = x4b7fffff e) (Hint: 2 24 ) = = x4b8 Convert the following single-precision floating point numbers (given in hexadecimal) to decimal: (2 pts each) f) x449a4 = = 234 g) x45a4 = = 2468 h) xbf6 = = i) x3f6 = =.875 j) x4e = = 7. Comp 4 - Fall Problem Set #7

2 Problem 2. Floating-Point Arithmetic Given the following two single-precision IEEE floating-point numbers: x = x46d8 and y = xbee x = = = y = = = Compute the following showing all work: a) x + y (5 pts) The first step in addition is to denormalize the smaller of the two numbers so that they share a common exponent. In this case, this requires shifting y by 6 places. The significands are then either added or subtracted depending on their signs. In practice, subtractions would be done using twos-complement arithmetic. - = + significand. +.. x46d7ff2 = b) x y (5 pts) When multiplying the the sign-bits are exclusive-ored, the exponents are added, and the two significands are multiplied. The bias value (27) is then subtracted from the exponent, which can be accomplished by adding the two s complement of 27 (). If the significand s product is two or greater it must be renormalized and the exponent readjusted xc63d = c) x y (5 pts) Addition is similar to addition. The smaller of the two numbers is denormalized so that they share a common exponent. The significands are then either added or subtracted depending on their signs. In practice, subtractions would be done using twos-complement arithmetic x46d8e = Comp 4 - Fall Problem Set #7

3 Problem 3. Half-Precision Certain modern graphics cards have adopted a new floating format called half precision. Halfprecision numbers are stored in 6-bits (2-bytes), and they use the following format: S EEEEE FFFFFFFFFF Where S is the sign-bit, E indicates bits of the exponent, which are represented in bias-5, and F is a -bit fractional component of an -bit significand with a hidden. The exponent values of 2 and 2 are reserved, and the values x and x8 are interpreted as. and -. respectively. a) Represent the number in half-precision. Give your answer in hexadecimal = = xa8 (2 pts) b) What value does x2bad represent? = (2 pts) c) What is the largest positive number representable as a normalized number in halfprecision format? x7bff = = - 247/ = 6554 (3 pts) d) What is the smallest number greater than zero that is representable as a normalized number in this format? x4 = = = / (3 pts) Problem 4. Floating-Point Division Most floating-point units perform division iteratively using the following process. The expression, A/B is computed by multiplying A times X = /B, which is approximated using the following iteration formula. X i+ = X i (2 B X i ) This approach requires an initial guess, X. If we assume that B is between. and 2., as would be the case for the significand in IEEE floating point, we can start with X = (3 B) / 2. a) Compute X, X, X 2, and X 3 when B =.25 (5 pts) B =.25 X = (3.25)/2 =.875 X =.875(2.25 *.875) =.793 X2 =.793(2.25 *.793) = X3 = (2.25 *.79994) = b) Compute X, X, X 2, and X 3 when B =.5 (5 pts) B =.5 X = (3.5)/2 =.75 X =.75(2.5 *.75) = X2 = (2.5 *.65625) = X3 = c) The number can be represented as , and the inverse of the significand can be computed as in part a). How should one adjust the exponent? Compute /. using 3 iterations. Make sure your result is of the form, a number between. and 2. multiplied by a power of 2. (5 pts) The exponent of the result is the negation of the denominator, -3 in this case, prior to renormalization. As in part a) three iterations with.25 gives , and the computed inverse would be / = * 2-3 = * Comp 4 - Fall Problem Set #7

4 d) An alternative method for initializing X is to use a look-up table based on a few of the most significant bits of B s significand (Note: Errors in a table like this one were the cause of the Intel Pentium FDIV bug). Assume the following table for the first 2 bits (note the B values are given in binary, whereas X is given in decimal): B X.xxx xxx xxx xxx Repeat part b), with X initialized from this table. Compare the accuracy of the results after one iteration. (5 pts) B =.5 = (in binary). * 2 From lookup table, X =.65384, and after one iteration, X = X(.5 * X) = compared to for the original. After one iteration, two significant digits of the approximation match the true value of , compared to only one in the original. Problem 5. The Real Y2K Immediately following an unusually useful Comp 4 lecture, Lee Hart races back to his parttime job at the upstart Mod-3 Calendar Corporation. Central to all products in the Mod-3 s product line is a patented circuit that determines if a given calendar year (e.g. 26) is divisible by 3. The year is entered into Mod-3 s products as an unsigned integer, one bit at a time. In Mod- 3 s prototype system, this function was accomplished with a shift register and a look-up table using the circuit shown below. Divisible by 3 Lookup Table (ROM) D3 Year D Q D Q D Q D Q D Q D Q D Q D Q D Q D Q D Q Clk A) Lee has been told that the look-up table has been careful determined and programmed into a ROM. Based on the circuit shown above, how many bits are in this ROM? (4 pts) Rom Size = 2 = 248 bits. B) If each register has the following timing specs, t pd = 3 ns, t s = 2 ns, and t h = ns, and the ROM s specs are t pd = ns, what is the minimum value of t cd that allows the circuit to operate properly? (3 pts) In this design, register outputs are connected directly to the other register s D-inputs. Thus, the register s contamination delay must be depended upon to satisfy the register s hold time, implying Reg(t CD ) > Reg(t H ) = ns. Comp 4 - Fall Problem Set #7

5 C) What is the fastest rate which Mod-3 s patented circuit can be clocked and still operate as intended? (3 pts) tclk(min) = tpd,reg + ts + tpd,rom = ( ) ns = 6 ns. Lee has warned the management at Mod-3 of a real looming Y2K problem associated with the current design, and in an effort to humor him they have assigned him the task of improving the circuit s design. Lee recalls a simple state machine specification from Comp 4. The state transition diagram of the circuit is shown below. S S S2 He recalls from lecture that this state machine also determines if a given unsigned integer input is divisible by 3, when entered least significant bit first. D) Verify the operation the behavior of the state transition diagram given in class by determining its final state for each of the following input sequences following a reset {,,,, } ( pts) Input = = 23 Input = = 2 Input = = 492 Current Input Next Output Current Input Next Output Current Input Next Output S S S S S S S S S S2 S S S S S2 S S S S S S S2 S S2 S S S2 S2 S2 S2 S S2 S2 S S2 S S2 S2 S S S S S2 S2 S S S S S2 S2 S S S S S2 S2 S S S S S2 S2 S S S S Input = = 776 Input = = 962 Current Input Next Output Current Input Next Output S S S S S S S S S S S S2 S S S2 S2 S S S2 S S S S S S S S S S S S S S S S S S S S S S S S S Comp 4 - Fall Problem Set #7

6 Convinced that the circuit performs as specified, Lee hastily sets out to implement the state machine. He cleverly assigns the following state encodings, S =, S =, and S2 =. This allows the most significant bit of the state encoding to serve double duty as the divisible by three output, D3. E) Recreate Lee s state machine using a ROM and a 2-bit state register. What is the size of the ROM. Write out a table showing the new ROM s contents? ( pts) The ROM has 3 address bit, one for the input and 2 for state bits. The ROM can have either 3 or 2 outputs. It is possible for a state bit to do double duty as the output, thus requiring only ROM 2 outputs. The total ROM size is 8 3 = 24 or 8 2 = 6 bits. Possible, ROM contents are: Address (A, B, Input) Contents (A/Output, B) Next S2 S S2 S2 S S2 S S S S S S?? S?? S F) After completing his FSM design, Lee closely examines the behavior of the original circuit only to realize that the original circuit expects the year input to be entered most significant bit first. Feeling slightly demoralized, he decides to go ahead and substitute his version on the circuit into a working Mod-3 prototype. Much to his surprise, the prototype system operates just as before. Explain how this is possible. (2 pts) Reversing digits of a number doesn t change its divisibility by 3. Note n = 3k is the 2k (k shifted by ) + k. G) Why is this new divisible-by-3 circuit immune to the Y2K problem foreseen by Lee? Is it likely to be faster than the original design? Is it likely to be less expensive than the original (explain why)? (3 pts) () Older design will only work for New design has no limitation on input length. (2) Every new bit passes through ROM in Newer design, hence it is slower. (3) New design has a smaller ROM and fewer registers, hence is cheaper. Comp 4 - Fall Problem Set #7

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