Computer Organization Question Bank
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1 Id 1 Question Mass produced first working machine (50 copies) was invented by A C D Answer Wilhelm Schickhard laise Pascal Gottfried Liebniz Charles abbage Id 2 Question Father of Modern Computer A Wilhelm Schickhard laise Pascal C Gottfried Liebniz D Charles abbage Id 3 Question Performance measures are A Hardware Software Interface Processor Clock C Performance Metrics Id 4 Question Any Program is set of Instructions A True False Id 5 Question Von Neumann machine consist of A CPU, Keyboard, and Printer. Memory, i/o devices and Processor. C Monitor, Scanner, CPU and Keyboard. D Control Unit, ALU, i/o devices and Memory. Id 6
2 Question The data on which operation is to be performed is called as A Opcode Operand C Instruction D Processsor Id 7 Question The timing signals for data transfers is given by A Memory Control Unit C ALU D i/o devices Id 8 Question The instructions are stored in A Memory Control Unit C ALU D i/o devices Id 9 Question The amount of data that can be simultaneously transferred between the processor and memory is given by the A Processor Size Computer Size C us Size D Memory Size Id 10 Question The Von Neumann System uses A Program input from the user No Program C Stored Program Concept D None of these Id 11
3 Question The Von Neumann System uses A Same memory for data and storage Different memory for program and data C Separate code memory, data memory, and Stack Memory D None of these Id 12 Question Execution of a Program in the Von Neumann system is done A Concurrently Sequentially C Randomly D None of these Id 13 Question Which register points to the first instruction to be executed when the processor starts A Accumulator Program Counter C Data Register D Instruction Register Id 14 Question Program Counter always incremented by A 1 2 C 3 D 4 Id 15 Question Which register gives the address to MAR for fetching the instruction A Accumulator Program Counter C Data Register D Instruction Register
4 Id 16 Question Which control signal is enabled by the control unit when fetching the instruction? A Read Write C Ready D None of the above Id 17 Question The reason for branch can be.. A Sign of the result Whether result is zero C Whether there is arithmetic flow Id 18 Question A data bus is A idirectional Provides path for moving data between system modules C Transfers bits of a word in parallel Id 19 Question The Von Neumann ottleneck refers to A I / O Memory speed disparity CPU Memory speed disparity C CPU and I / O speed disparity Id 20 Question Speedup techniques of a computer include A Cache Pipelining C Superscalar
5 Id 21 Question The Von Neumann architecture is mostly used in. ased Machines. A Microcontroller Microprocessor C Mainframe D oth and C Id 22 Question This device made by laise Pascal was called as A Computer Typewriter C Pascaline D None of above Id 23 Question The speed of ENIAC was A 50 additions per second 500 additions per second C 5000 additions per second D additions per second Id 24 Question A Control Signal can be A Memory Read Memory Write C I / O Read Id 25 Question The disadvantage of Single bus structure over multi-bus is A ottleneck because of the bus capacity Propagation delay C oth A and D Neither A and Id 26
6 Question What is Octal equivalent to the binary number A C 572 D 573 Id 27 Question Floating Point representation consists of A C D Answer Mantissa Exponent oth A and Neither A and C Id 28 Question The representation of -12 in 2 s Complement form is A C D Marks 2 Id 29 Question ooths algorithm uses. Method for signed representation A C D Answer 1 s Complement 2 s Complement Sign Magnitude None of these Id 30 Question In ooths algorithm, what is Stored in Accumulator or Register A A C Multiplier Multiplicand Zero
7 D None of above Computer Organization Question ank Id 31 Question IEEE double precision of floating point representation has. its A C 128 D None of above Answer 1 Id 32 Question How many address instruction is MULT C? A 0 1 C 2 D 3 Id 33 Question Which addressing mode is used for the initialization of the variable? A Immediate Addressing Mode Direct Addressing Mode C Register Addressing Mode D Indexed Addressing Mode Id 34 Question Which addressing mode is used for the Push and Pop instructions? A Auto Index Mode Direct Addressing Mode C Register addressing Mode D Indexed addressing Mode
8 Id 35 Question The instruction MOV R0, 300 is an example of A Immediate Addressing Mode Direct Addressing Mode C Register Addressing Mode D Indexed Addressing Mode Id 36 Question Factor to be considered while deciding the instruction length A Memory Size Memory Organization C Data bus size D All the above Id 37 Question The.. flag is set when there is a carry out of the lowest nibble of the result A Carry Flag Auxiliary Carry Flag C Overflow Flag D Sign Flag Id 38 Question Which is the default segment for string source? A CS DS C ES D SS Id 39 Question The length of an instruction depends on A Memory Size Memory Organization C Memory transfer length
9 Id 40 Question Select the index register A SI DI C SP D oth A and Id 41 Question The instruction prefix consists of A Lock Prefix Repeat Prefixes C oth A and D None of the above Id 42 Question General Purpose registers can be used for A Holding data Holding address C oth A and D None of these Id 43 Question Intel i7 processor is based on A 64 bit architecture 32 bit architecture C 16 bit architecture D 128 bit architecture Id 44 Question X87 FPU consists of A Eight 80 bit registers Ten 80 bit registers C Eight 90 bit registers D Ten 90 bit registers
10 Id 45 Question The size of the opcode field of an instruction in Intel machine is.. A One byte Two bytes C Either A and D None of these Id 46 Question How many address instruction is STORE D? A 0 1 C 2 D 3 Id 47 Question How many address instruction is MULT A,? A 0 1 C 2 D 3 Id 48 Question What is not true about RISC? A A large number of addressing modes. Simple instruction C Hardwired control unit D A single chip processor Id 49 Question An instruction is made up of A Programs Subroutines C OPCODE and Operands D None of these above
11 Id 50 Question How many extra fetch cycles are required for Auto Index addressing Mode? A C 1 D 1.5
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