Final Examination Semester 3 / Year 2008

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1 Southern College Kolej Selatan 南方学院 Final Examination Semester 3 / Year 2008 COURSE : COMPUTER ORGANIZATION & OPERATING SYSTEM COURSE CODE : CSIS2053 CLASS : CS06-C, CS07-B,CS07-C TIME : 2 ½ HOURS DEPARTMENT : COMPUTER SCIENCE LECTURER : HUI SENG KHEONG Student s ID : Batch No. : Notes to candidates: 1. The question paper consists of 7 pages (including this page). 2. The questions are divided into two parts. (a) Part 1 consists of 10 multiple choice questions. Students are required to answer ALL questions (b) Part 2 consists of 4 short and essay questions. Students are required to answer ALL questions. 3. Return the question paper with your answer booklet.

2 Part 1: Multiple Choice Questions (2 marks x 10) Students are required to answer ALL questions 1. Following are the main components of any general-purpose computer except a. main memory b. control unit c. arithmetic and logic unit (ALU) d. serial port 2. Follwing are memory mappings except a. direct b. associative c. set associative d. raid 3. The figure below shows multiple interrupt with priorities. Choose the combination of devices from lowest priority to highest priority a. printer, disk, communication b. communication, disk, printer c. disk, communication, printer d. printer,communication, disk 4. The access time for register, cache and memory should be in which order? a. shortest, medium, longest b. medium, shortest, longest c. longest, medium, shortest d. longest, shortest, medium 5. A bus is used as the primary connection between a processor and an I/O device, and that all operations on a bus must use the paradigm. a. fetch-store 1/6

3 b. fetch-save c. fetch-decode d. fetch-throw 6. requires the processor to repeatedly ask the device whether an operation has completed before the processor starts the next operation. a. interrupt b. polling c. DMA d.networking 7. The is firmware that contains the computer's startup instructions. a. BIOS b. POST c. kernel d. CMOS 8. Modern BIOS are commonly stored in. a. PROM b. EPROM c. EEPROM d. Flash memory 9. The three steps in the running of a program on a computer are performed in this specific order. a. fetch, execute, and decode b. decode, execute, and fetch c. fetch, decode, and execute d. decode, fetch, and execute 10.In the method to synchronize the operation of the CPU with the I/O device, a large block of data can be passed from an I/O device to memory directly. a. programmed I/O b. interrupt-driven I/O c. DMA d. isolated I/O 2/6

4 Part 2: Short and essay questions Students are required to answer ALL questions 1. Figure 1: Direct Mapped Cache and its corresponding main memory format Refer to figure 1, answer following questions (i) What is the block size based on the memory format presented above? (ii) Why the cache can hold up to 65,536 bytes (64K)? (iii) During initialization state, what happens to the valid bit of each cache entry? (iv) Suppose the first memory request the CPU makes is for a byte of data from location 3115E 16. At what line of cache will the request go for? Will it be a cache hit or cache miss? Why? (6 marks) (v) Suppose a cache miss happened in (iv). How many bytes will the system transfer from main memory to cache and from cache to CPU? What are the range of these main memory? (4 marks) (vi) Assume the system is implementing a write back as the write policy. If a dirty bit is set to 1, what is that meant? (vii) One of the disadvantages of direct mapped cache is collision. What is collision? 3/6

5 2. Consider a machine with a byte addressable main memory of 2 16 bytes and block size of 8 bytes. Assume that a direct mapped cache consisting of 32 lines is used with this machine. (i) How is a 16-bit memory address divided into tag, line number, and byte number? (3 marks) (ii) Into what line would bytes with each of the following addresses be stored? (4 marks) (iii) Suppose the byte with address is stored in the cache. What are the addreses of the other bytes stored along with it?(7 marks) (iv) How many total bytes of memory can be stored in the cache? (3 marks) (v) Why is the tag also stored in the cache? (3 marks) 3. (i) What are the key properties of semiconductor memory? (5 marks) (ii) What are the differences among EPROM, EEPROM, and flash memory? (10 marks) (iii) Consider a dynamic RAM that must be given a refresh cycle 64 times per ms. Each refresh operation requires 150 ns; a memory cycle requires 250 ns. What percentage of the memory s total operating time must be given to refreshes? (5 marks) 4. Using the instruction set of the simple computer in appendix 1 and assumptions made in appendix 2, write the code for a program that performs the following calculation: D A + B + C A, B, C, and D are integers in two s complement format. The user types the value of A, B, and, C, and the value of D is displayed on the monitor. (20 marks) 4/6

6 Appendix 1 COMPUTER ORGANIZATION & OPERATING SYSTEM 5/6

7 Appendix 2 COMPUTER ORGANIZATION & OPERATING SYSTEM 6/6

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