CS 406/534 Compiler Construction Putting It All Together

Transcription

1 CS 406/534 Compiler Construction Putting It All Together Prof. Li Xu Dept. of Computer Science UMass Lowell Fall 2004 Part of the course lecture notes are based on Prof. Keith Cooper, Prof. Ken Kennedy and Dr. Linda Torczon s teaching materials at Rice University. All rights reserved. 1

2 Administravia Last lecture today Lab2 and lab3 graded Final exam now handed out, due 12/20 Deadline is firm: late exam will not be graded Extra credit lab3 presentation today CS406/534 Fall 2004, Prof. Li Xu 2 2

3 What We Did Last Time Program analysis and optimization Overview of compiler optimization Local optimization DAG Value numbering Control flow analysis CFG, DOM tree, natural loops Data flow analysis SSA Generic framework Typical data flow problems AVAIL, REACH, LIVE CS406/534 Fall 2004, Prof. Li Xu 3 3

4 Today s Goals Summary of the subjects we ve covered Perspectives and final remarks How will you use /534 knowledge? CS406/534 Fall 2004, Prof. Li Xu 4 4

5 High-level View Source code Compiler Machine code Errors Definitions Compiler consumes source code & produces target code usually translate high-level language programs into machine code Interpreter consumes executables & produces results virtual machine for the input code CS406/534 Fall 2004, Prof. Li Xu 5 5

6 Why Study Compilers? Compilers are important Enabling technology for languages, software development Allow programmers to focus on problem solving, hiding the hardware complexity Responsible for good system performance Compilers are useful Language processing is broadly applicable Compilers are fun Combine theory and practice Overlap with other CS subjects Hard problems Engineering and trade-offs Got a taste in the labs! CS406/534 Fall 2004, Prof. Li Xu 6 6

7 Structure of Compilers Front Middle End Back End 7 Register Allocation Instruction Scheduling Instruction Selection IR Optimization n Optimization 2 Optimization 1 IR CSA Parser Scanner Infrastructure: symbol tables, trees, graphs, intermediate representations, sets, tuples CS406/534 Fall 2004, Prof. Li Xu 7 Analysis

8 The Front-end Front Middle End Back End 8 Register Allocation Instruction Scheduling Instruction Selection IR Optimization n Optimization 2 Optimization 1 IR CSA Parser Scanner Infrastructure: symbol tables, trees, graphs, intermediate representations, sets, tuples CS406/534 Fall 2004, Prof. Li Xu 8 Analysis

9 Scanner Lexical Analysis Maps character stream into tokens Automate scanner construction Define tokens using Regular Expressions Construct NFA (Nondeterministic Finite Automata) to recognize REs Transform NFA to DFA Convert NFA to DFA through subset construction DFA minimization (set split) Building scanners from DFA Tools ANTLR, lex CS406/534 Fall 2004, Prof. Li Xu 9 9

10 Syntax Analysis Parsing language using CFG (context-free grammar) CFG grammar theory Derivation Parse tree Grammar ambiguity Parsing Top-down parsing recursive descent table-driven LL(1) Bottom-up parsing LR(1) shift reduce parsing CS406/534 Fall 2004, Prof. Li Xu 10 10

11 Top-down Predictive Parsing Basic idea Build parse tree from root. Given A α β, use look-ahead symbol to choose between α & β Recursive descent Table-driven LL(1) Left recursion elimination CS406/534 Fall 2004, Prof. Li Xu 11 11

12 Bottom-up Shift-Reduce Parsing Build reverse rightmost derivation The key is to find handle (rhs of production) All active handles include top of stack (TOS) Shift inputs until TOS is right end of a handle Language of handles is regular (finite) Build a handle-recognizing DFA ACTION & GOTO tables encode the DFA CS406/534 Fall 2004, Prof. Li Xu 12 12

13 Semantic Analysis Analyze context and semantics types and other semantic checks Attribute grammar associate evaluation rules with grammar production Ad-hoc build symbol table CS406/534 Fall 2004, Prof. Li Xu 13 13

14 Intermediate Representation Front Middle End Back End 14 Register Allocation Instruction Scheduling Instruction Selection IR Optimization n Optimization 2 Optimization 1 IR CSA Parser Scanner Infrastructure: symbol tables, trees, graphs, intermediate representations, sets, tuples CS406/534 Fall 2004, Prof. Li Xu 14 Analysis

15 Intermediate Representation Front-end translates program into IR format for further analysis and optimization IR encodes the compiler s knowledge of the program Largely machine-independent Move closer to standard machine model AST Tree: high-level Linear IR: low-level ILOC 3-address code Assembly-level operations Expose control flow, memory addressing unlimited virtual registers CS406/534 Fall 2004, Prof. Li Xu 15 15

16 Procedure Abstraction Procedure is key language construct for building large systems Name Space Caller-callee interface: linkage convention Control transfer Context protection Parameter passing and return value Run-time support for nested scopes Activation record, access link, display Inheritance and dynamic dispatch for OO multiple inheritance virtual method table CS406/534 Fall 2004, Prof. Li Xu 16 16

17 The Back-end Front Middle End Back End 17 Register Allocation Instruction Scheduling Instruction Selection IR Optimization n Optimization 2 Optimization 1 IR CSA Parser Scanner Infrastructure: symbol tables, trees, graphs, intermediate representations, sets, tuples CS406/534 Fall 2004, Prof. Li Xu 17 Analysis

18 Instruction selection Mapping IR into assembly code The Back-end Assumes a fixed storage mapping & code shape Combining operations, using address modes Instruction scheduling Reordering operations to hide latencies Assumes a fixed program (set of operations) Changes demand for registers Register allocation Deciding which values will reside in registers Changes the storage mapping, may add false sharing Concerns about placement of data & memory operations CS406/534 Fall 2004, Prof. Li Xu 18 18

19 Expressions Code Generation Recursive tree walk on AST Direct integration with parser Assignment Array reference Boolean & Relational Values If-then-else Case Loop Procedure call CS406/534 Fall 2004, Prof. Li Xu 19 19

20 Instruction Selection Hand-coded tree-walk code generator Automatic instruction selection Pattern matching Peephole Matching Tree-pattern matching through tiling CS406/534 Fall 2004, Prof. Li Xu 20 20

21 The Problem Instruction Scheduling Given a code fragment for some target machine and the latencies for each individual operation, reorder the operations to minimize execution time Build Precedence Graph List scheduling NP-complete problem Heuristics work well for basic blocks forward list scheduling backward list scheduling Scheduling for larger regions EBB and cloning Trace scheduling CS406/534 Fall 2004, Prof. Li Xu 21 21

22 Register Allocation Local register allocation top-down bottom-up Global register allocation Find live-range Build an interference graph G I Construct a k-coloring of interference graph Map colors onto physical registers CS406/534 Fall 2004, Prof. Li Xu 22 22

23 Web-based Live Ranges Connect common defs and uses Solve the Reaching data-flow problem! l1 def x def y def y def x use y l4 use x use y l3 use x def x l2 use x CS406/534 Fall 2004, Prof. Li Xu 23 23

24 Interference Graph The interference graph, G I Nodes in G I represent live ranges Edges in G I represent individual interferences For x, y G I, <x,y> iff x and y interfere A k-coloring of G I can be mapped into an allocation to k registers 3-colorable CS406/534 Fall 2004, Prof. Li Xu 24 24

25 Key Observation on Coloring Any vertex n that has fewer than k neighbors in the interference graph (n < k) can always be colored! Remove nodes n < k for G I, coloring for G I is also coloring for G I. CS406/534 Fall 2004, Prof. Li Xu 25 25

26 Chaitin s Algorithm 1. While vertices with < k neighbors in G I > Pick any vertex n such that n < k and put it on the stack > Remove that vertex and all edges incident to it from G I This will lower the degree of n s neighbors 2. If G I is non-empty (all vertices have k or more neighbors) then: > Pick a vertex n (using some heuristic) and spill the live range associated with n > Remove vertex n from G I, along with all edges incident to it and put it on the stack > If this causes some vertex in G I to have fewer than k neighbors, then go to step 1; otherwise, repeat step 2 3. If no spill, successively pop vertices off the stack and color them in the lowest color not used by some neighbor; otherwise, insert spill code, recompute G I and start from step 1 CS406/534 Fall 2004, Prof. Li Xu 26 26

27 Brigg s Improvement Nodes can still be colored even with > k neighbors if some neighbors have same color 1. While vertices with < k neighbors in G I > Pick any vertex n such that n < k and put it on the stack > Remove that vertex and all edges incident to it from G I This may create vertices with fewer than k neighbors 2. If G I is non-empty (all vertices have k or more neighbors) then: > Pick a vertex n (using some heuristic condition), push n on the stack and remove n from G I, along with all edges incident to it > If this causes some vertex in G I to have fewer than k neighbors, then go to step 1; otherwise, repeat step 2 3. Successively pop vertices off the stack and color them in the lowest color not used by some neighbor > If some vertex cannot be colored, then pick an uncolored vertex to spill, spill it, and restart at step 1 CS406/534 Fall 2004, Prof. Li Xu 27 27

28 The Middle-end: Optimizer Front Middle End Back End 28 Register Allocation Instruction Scheduling Instruction Selection IR Optimization n Optimization 2 Optimization 1 IR CSA Parser Scanner Infrastructure: symbol tables, trees, graphs, intermediate representations, sets, tuples CS406/534 Fall 2004, Prof. Li Xu 28 Analysis

29 Principles of Compiler Optimization safety Does applying the transformation change the results of executing the code? profitability Is there a reasonable expectation that applying the transformation will improve the code? opportunity Can we efficiently and frequently find places to apply optimization Optimizing compiler Program Analysis Program Transformation CS406/534 Fall 2004, Prof. Li Xu 29 29

30 Control-flow analysis Data-flow analysis Program Analysis CS406/534 Fall 2004, Prof. Li Xu 30 30

31 Control Flow Analysis Basic blocks Control flow graph Dominator tree Natural loops Dominance frontier the join points for SSA insert Ф node CFG DOM Tree CS406/534 Fall 2004, Prof. Li Xu 31 31

32 Data Flow Analysis compile-time reasoning about the runtime flow of values represent effects of each basic block propagate facts around control flow graph CS406/534 Fall 2004, Prof. Li Xu 32 32

33 DFA: The Big Picture Set up a set of equations that relate program properties at different program points in terms of the properties at "nearby" program points B IN(B) local(b) OUT(B) Transfer function Forward analysis: compute OUT(B) in terms IN(B) Available expressions Reaching definition Backward analysis: compute IN(B) in terms of OUT(B) Variable liveness Very busy expressions Meet function for join points Forward analysis: combine OUT(p) of predecessors to form IN(B) Backward analysis: combine IN(s) of successors to form OUT(B) CS406/534 Fall 2004, Prof. Li Xu 33 33

34 Available Expression Basic block b IN(b): expressions available at b s entry OUT(b): expressions available at b s exit Local sets : expressions defined in b and available on exit : expressions killed in b An expression is killed in b if operands are assigned in b Transfer function Meet function CS406/534 Fall 2004, Prof. Li Xu 34 34

35 More Data Flow Problems AVAIL Equations More data flow problems Reaching Definition Liveness CS406/534 Fall 2004, Prof. Li Xu 35 35

36 Compiler Optimization Local optimization DAG CSE Value numbering Global optimization enabled by DFA Global CSE (AVAIL) Constant propagation (Def-Use) Dead code elimination (Use-Def) Advanced topic: SSA CS406/534 Fall 2004, Prof. Li Xu 36 36

37 Perspective Front End Middle End Back End Scanner Parser CSA IR Optimization 1 Optimization 2 Analysis Optimization n IR Instruction Selection Instruction Scheduling Register Allocation Infrastructure: symbol tables, trees, graphs, intermediate representations, sets, tuples Front end: essentially solved problem Middle end: domain-specific language Back end: new architecture Verifying compiler, reliability, security CS406/534 Fall 2004, Prof. Li Xu 37 37

38 Interesting Stuff We Skipped Interprocedural analysis Alias (pointer) analysis Garbage collection Check the literature reference in EaC CS406/534 Fall 2004, Prof. Li Xu 38 38

39 How will you use /534 knowledge? As informed programmer As informed small language designer As informed hardware engineer As compiler writer CS406/534 Fall 2004, Prof. Li Xu 39 39

40 Informed Programmer Knowledge is power Compiler is no longer a black box Know how compiler works Implications Use of language features Avoid those can cause problem Give compiler hints Code optimization Don t optimize prematurely Don t write complicated code Debugging Understand the compiled code CS406/534 Fall 2004, Prof. Li Xu 40 40

41 Solving Problem the Compiler Way Solve problems from language/compiler perspective Implement simple language Extend language CS406/534 Fall 2004, Prof. Li Xu 41 41

42 Informed Hardware Engineer Compiler support for programmable hardware pervasive computing new back-ends for new processors Design new architectures what can compiler do and not do how to expose and use compiler to manage hardware resources CS406/534 Fall 2004, Prof. Li Xu 42 42

43 Compiler Writer Make a living by writing compilers! Theory Algorithms Engineering We have built: scanner parser AST tree builder, type checker register allocator instruction scheduler Used compiler generation tools ANTLR, lex, yacc, etc On track to jump into compiler development! CS406/534 Fall 2004, Prof. Li Xu 43 43

44 Compiler construction Theory Implementation Final Remarks How to use what you learned in /534? As informed programmer As informed small language designer As informed hardware engineer As compiler writer and live happily ever after CS406/534 Fall 2004, Prof. Li Xu 44 44

45 CS406/534 Fall 2004, Prof. Li Xu 45 45