# Computer Architecture Set Four. Arithmetic

Save this PDF as:

Size: px
Start display at page:

## Transcription

1 Computer Architecture Set Four Arithmetic

2 Arithmetic Where we ve been: Performance (seconds, cycles, instructions) Abstractions: Instruction Set Architecture Assembly Language and Machine Language What s up ahead: Implementing the Architecture Operation a 32 ALU 32 Result b 32

3 Numbers Bits are just bits (no inherent meaning) conventions define relationship between bits and numbers Binary numbers (base 2) decimal: n 1 Of course, it gets more complicated: numbers are finite (overflow) fractions and real numbers negative numbers e.g., no M IPS subi instruction; addi can add a negative number) How do we represent negative numbers? i.e., which bit patterns will represent which numbers?

4 Possible Representations Sign Magnitude One s Complement Two s Complement 000 = = = = = = = = = = = = = = = = = = = = = = = = 1 Issues: balance, number of zeros, ease of operations Which one is best? Why?

5 MIPS 32 bit signed numbers: two = 0ten two = + 1 ten two = + 2 ten two = + 2,147,483,646 ten two = + 2,147,483,647 ten two = 2,147,483,648 ten two = 2,147,483,647 ten two = 2,147,483,646 ten two = 3 ten two = 2 ten maxint minint two = 1 ten

6 Two s Complement Operations Negating a two s complement number: invert all bits and add 1 remember: negate and invert are quite different! Converting n bit numbers into numbers with more than n bits: M IPS 16 bit immediate gets converted to 32 bits for arithmetic copy the most significant bit (the sign bit) into the other bits 0010 > > "sign extension" (lbu vs. lb)

7 Addition & Subtraction Just like in grade school (carry/borrow 1s) Two s complement operations easy subtraction using addition of negative numbers Overflow (result too large for finite computer word): e.g., adding two n bit numbers does not yield an n bit number note that overflow term is somewhat misleading, 1000 it does not mean a carry overflowed

8 Detecting Overflow No overflow when adding a positive and a negative number No overflow when signs are the same for subtraction Overflow occurs when the value affects the sign: overflow when adding two positives yields a negative or, adding two negatives gives a positive or, subtract a negative from a positive and get a negative or, subtract a positive from a negative and get a positive Consider the operations A + B, and A B Can overflow occur if B is 0? Can overflow occur if A is 0?

9 Effects of Overflow An exception (interrupt) occurs Control jumps to predefined address for exception Interrupted address is saved for possible resumption Details based on software system / language example: flight control vs. homework assignment Don t always want to detect overflow new MIPS nstructions: addu, addiu, subu note: addiu still sign extends! note: sltu, sltiu for unsigned comparisons

10 Review: Boolean Algebra & Gates Problem: Consider a logic function with three inputs: A, B, and C. Output D is true if at least one input is true Output E is true if exactly two inputs are true Output F is true only if all three inputs are true Show the truth table for these three functions. Show the Boolean equations for these three functions. Show an implementation consisting of inverters, AND, and OR gates.

11 An ALU (arithmetic logic unit) Let s build an ALU to support the andi and ori instructions we ll just build a 1 bit ALU, and use 32 of them operation Op A B Res a b result Possible Implementation (sum of products):

12 Review: The Multiplexor Selects one of the inputs to be the output, based on a control input S A B 0 1 C note: we call this a 2 input mux even though it has 3 inputs! Lets build our ALU using a MUX:

13 Different Implementations Not easy to decide the best way to build something Don t want too many inputs to a single gate Dont want to have to go through too many gates for our purposes, ease of comprehension is important Let s look at a 1 bit ALU for addition: Carry In a b Sum cout = a b + a cin + b cin sum = a xor b xor cin Carry Out How could we build a 1 bit ALU for add, and, and or? How could we build a 32 bit ALU?

14 Building a 32 bit ALU Operation Operation a0 b0 ALU0 CarryOut Result0 a 0 a1 b1 ALU1 CarryOut Result1 1 Result b 2 a2 b2 ALU2 CarryOut Result2 CarryOut a31 b31 ALU31 Result31

15 What about subtraction (a b)? Two s complement approch: just negate b and add. How do we negate? A very clever solution: Binvert Operation a 0 1 Result b CarryOut

16 Tailoring the ALU to the MIPS Need to support the set on less than instruction (slt) remember: slt is an arithmetic instruction produces a 1 if rs < rt and 0 otherwise use subtraction: (a b) < 0 implies a < b Need to support test for equality (beq \$t5, \$t6, \$t7) use subtraction: (a b) = 0 implies a = b

17 Supporting slt Binvert Operation a 0 Can we figure out the idea? 1 b Result Less 3 a. CarryOut Binvert Operation a 0 1 b 0 2 Result 1 Less 3 Set b. Overflow detection Overflow

18 Binvert Operation a0 b0 ALU0 Less CarryOut Result0 a1 b1 0 ALU1 Less CarryOut Result1 a2 b2 0 ALU2 Less CarryOut Result2 a31 b31 0 ALU31 Less Set Result31 Overflow

19 Test for equality Notice control lines: Bnegate Operation 000 = and 001 = or 010 = add 110 = subtract 111 = slt a0 b0 a1 b1 0 ALU0 Less CarryOut ALU1 Less CarryOut Result0 Result1 Zero a2 b2 0 ALU2 Less CarryOut Result2 Note: zero is a 1 when the result is zero! a31 b31 0 ALU31 Less Result31 Set Overflow

20 Conclusion We can build an ALU to support the MIPS instruction set key idea: use multiplexor to select the output we want we can efficiently perform subtraction using two s complement we can replicate a 1 bit ALU to produce a 32 bit ALU Important points about hardware all of the gates are always working the speed of a gate is affected by the number of inputs to the gate the speed of a circuit is affected by the number of gates in series (on the critical path or the deepest level of logic ) Our primary focus: comprehension, however, Clever changes to organization can improve performance (similar to using better algorithms in software) we ll look at two examples for addition and multiplication

21 Problem: ripple carry adder is slow Is a 32 bit ALU as fast as a 1 bit ALU? Is there more than one way to do addition? two extremes: ripple carry and sum of products Can you see the ripple? How could you get rid of it? c1 = b0c0 + a0c0 + a0b0 c2 = b1c1 + a1c1 + a1b1 c2 = c3 = b2c2 + a2c2 + a2b2 c3 = c4 = b3c3 + a3c3 + a3b3 c4 =

22 Problem: ripple carry adder is slow Two extremes: ripple carry and sum of products Can you see the ripple? How could you get rid of it? By successive substitutions of c i+1 by c i c1 = b0c0 + a0c0 + a0b0 c2 = b1c1 + a1c1 + a1b1 c 2 = (b 0 c 0 + a 0 c 0 + a 0 b 0 ) b 1 + (b 0 c 0 + a 0 c 0 + a 0 b 0 ) a 1 + a 1 b 1 = b 0 c 0 b 1 + a 0 c 0 b 1 + a 0 b 0 b 1 + b 0 c 0 a 1 + a 0 c 0 a 1 + a 0 b 0 a 1 + a 1 b 1 c 3 = b 2 c 2 + a 2 c 2 + a 2 b 2 c 3 = c4 = b3c3 + a3c3 + a3b3 c4 = Not feasible! Why?

23 Carry lookahead adder An approach in between our two extremes Motivation: If we didn t know the value of carry in, what could we do? When would we always generate a carry? g i = a i b i When would we propagate the carry? pi = ai + bi Did we get rid of the ripple? c1 = g0 + p0c0 c 2 = g 1 + p 1 c 1 c 2 = c 3 = g 2 + p 2 c 2 c 3 = c 4 = g 3 + p 3 c 3 c 4 = Feasible! Why?

24 Use principle to build bigger adders a0 b0 a1 b1 a2 b2 a3 b3 ALU0 P0 G0 C1 pi gi ci + 1 Result0 3 Carry lookahead unit a4 b4 a5 b5 a6 b6 a7 b7 a8 b8 a9 b9 a10 b10 a11 b11 ALU1 P1 G1 ALU2 P2 G2 C2 C3 pi + 1 gi + 1 ci + 2 pi + 2 gi + 2 ci + 3 Result4 7 Result8 11 Can t build a 16 bit adder this way... (too big) Could use ripple carry of 4 bit CLA adders Better: use the CLA principle again! a12 b12 a13 b13 a14 b14 a15 b15 ALU3 P3 G3 C4 pi + 3 gi + 3 ci + 4 Result12 15 CarryOut

25 Multiplication More complicated than addition accomplished via shifting and addition More time and more area Let s look at 3 versions based on gradeschool algorithm 0010 (multiplicand) x_1011 (multiplier) Negative numbers: convert and multiply there are better techniques, we won t look at them

26 Multiplication: Implementation Start Multiplier0 = 1 1. Test Multiplier0 Multiplier0 = 0 Multiplicand 64 bits Shift left 1a. Add multiplicand to product and place the result in Product register 64 bit ALU Multiplier Shift right 32 bits 2. Shift the Multiplicand register left 1 bit Product 64 bits Write Control test 3. Shift the Multiplier register right 1 bit 32nd repetition? No: < 32 repetitions Yes: 32 repetitions Done

27 Multiplication: Implementation Multiplicant Controller CNT ALU Accumulator Multiplier

28 Multiplication: Algorithm

29 State Control Machine

30 Division Algo Acc A Divide 14=1110 by 3=11. B contains step 1: Shift step 2: subtract step 3: result negative; set quotient bit to step 4: restore step 1: shift step 2: subtract step 3: result non negative; set quotient bit to step 1: shift step 2: subtract step 3: result is negative; set quotient bit step 4: restore step 1: shift step 2: subtract step 3: result is negative; set quotient bit to step 4: restore; Quot = 0100, Remaider = 00010

31 Array Multiplier x x x y y y x 0 y x 0 y x 0 y x 1 y x 1 y x 1 y x 2 y x 2 y x 2 y

32 AND Array y 0 y 1 y 2 x 2 x 2 y 0 x 2 y 1 x 2 y 2 x 1 x 1 y 0 x1 y 1 x 1 y 2 x 0 x 0 y 0 x 0 y 1 x 0 y 2

33 Array Multiplier (Cont.) x y x y 2 0 x y x 2 y 2 x 1 y 2 x 1 y 0 Adder Adder x 0 y 1 x 0 y 2 x 0 y 0 Adder Adder Adder Adder z 0 z 1 z 2 z 3 z 4 z 5

34 Array Multiplier Basics Multiplication Time for n bit numbers = 2(n 1) D + D where D and D are the propagation delays of an Adder and an AND gate. Component cost ~ n 2 ANDs and Adders can combine into a single cell.

35 Carry Save Adder 2 Stages x y x y x y x y z z z z 3 c c 1 2 c s s s s w w w 1 3 w

36 Carry Save Adder: Basics The n bit Carry Save Adder consists of n disjoint Adders Inputs: 3 n bit numbers to be added Outputs: n sum bits (s k ) ; n carry bits (c k ) No carry propagation within adder m >= 3 numbers may be added together by using a tree structure of carry save adders.

37 Floating Point (a brief look) We need a way to represent numbers with fractions, e.g., very small numbers, e.g., very large numbers, e.g., Representation: sign, exponent, significand: ( 1) sign significand 2 exponent more bits for significand gives more accuracy more bits for exponent increases range IEEE 754 floating point standard: single precision: 8 bit exponent, 23 bit significand double precision: 11 bit exponent, 52 bit significand

38 IEEE 754 floating point standard Leading 1 bit of significand is implicit Exponent is biased to make sorting easier all 0s is smallest exponent all 1s is largest bias of 127 for single precision and 1023 for double precision summary: ( 1) sign (1+significand) 2exponent bias Example: decimal:.75 = 3/4 = 3/2 2 binary:.11 = 1.1 x 2 1 floating point: exponent = 126 = IEEE single precision:

39 Floating Point Adder A = a 2 p B = b 2 q A B = a 2 p b 2 q = c 2 r r = max p,q t = p q min p,q Algorithm Compare p and q ; Shift Right fraction of min exponent min(p,q) by t Add shifted fraction Count # of zeros, say u ; shift left leading zero to norm Shift Right = Divide by 2 Shift Left = Multiply by 2

41 Floating Point Complexities Operations are somewhat more complicated (see text) In addition to overflow we can have underflow Accuracy can be a big problem IEEE 754 keeps two extra bits, guard and round four rounding modes positive divided by zero yields infinity zero divide by zero yields not a number other complexities Implementing the standard can be tricky Not using the standard can be even worse see text for description of 80x86 and Pentium bug!

42 Summary Computer arithmetic is constrained by limited precision Bit patterns have no inherent meaning but standards do exist two s complement IEEE 754 floating point Computer instructions determine meaning of the bit patterns Performance and accuracy are important so there are many complexities in real machines (i.e., algorithms and implementation). We are ready to move on (and implement the processor) you may want to look back (Section 4.12 is great reading!)

### Chapter 3 Arithmetic for Computers

Chapter 3 Arithmetic for Computers 1 Arithmetic Where we've been: Abstractions: Instruction Set Architecture Assembly Language and Machine Language What's up ahead: Implementing the Architecture operation

### Part I: Translating & Starting a Program: Compiler, Linker, Assembler, Loader. Lecture 4

Part I: a Program: Compiler, Linker, Assembler, Loader Lecture 4 Program Translation Hierarchy C program Com piler Assem bly language program Assem bler Object: Machine language module Object: Library

### Floating Point Arithmetic

Floating Point Arithmetic CS 365 Floating-Point What can be represented in N bits? Unsigned 0 to 2 N 2s Complement -2 N-1 to 2 N-1-1 But, what about? very large numbers? 9,349,398,989,787,762,244,859,087,678

### Tailoring the 32-Bit ALU to MIPS

Tailoring the 32-Bit ALU to MIPS MIPS ALU extensions Overflow detection: Carry into MSB XOR Carry out of MSB Branch instructions Shift instructions Slt instruction Immediate instructions ALU performance

### Chapter 3 Arithmetic for Computers (Part 2)

Department of Electr rical Eng ineering, Chapter 3 Arithmetic for Computers (Part 2) 王振傑 (Chen-Chieh Wang) ccwang@mail.ee.ncku.edu.tw ncku edu Depar rtment of Electr rical Eng ineering, Feng-Chia Unive

### Number Systems and Computer Arithmetic

Number Systems and Computer Arithmetic Counting to four billion two fingers at a time What do all those bits mean now? bits (011011011100010...01) instruction R-format I-format... integer data number text

### Computer Architecture. Chapter 3: Arithmetic for Computers

182.092 Computer Architecture Chapter 3: Arithmetic for Computers Adapted from Computer Organization and Design, 4 th Edition, Patterson & Hennessy, 2008, Morgan Kaufmann Publishers and Mary Jane Irwin

### Outline. EEL-4713 Computer Architecture Multipliers and shifters. Deriving requirements of ALU. MIPS arithmetic instructions

Outline EEL-4713 Computer Architecture Multipliers and shifters Multiplication and shift registers Chapter 3, section 3.4 Next lecture Division, floating-point 3.5 3.6 EEL-4713 Ann Gordon-Ross.1 EEL-4713

### CS/COE 0447 Example Problems for Exam 2 Spring 2011

CS/COE 0447 Example Problems for Exam 2 Spring 2011 1) Show the steps to multiply the 4-bit numbers 3 and 5 with the fast shift-add multipler. Use the table below. List the multiplicand (M) and product

### Module 2: Computer Arithmetic

Module 2: Computer Arithmetic 1 B O O K : C O M P U T E R O R G A N I Z A T I O N A N D D E S I G N, 3 E D, D A V I D L. P A T T E R S O N A N D J O H N L. H A N N E S S Y, M O R G A N K A U F M A N N

### The ALU consists of combinational logic. Processes all data in the CPU. ALL von Neuman machines have an ALU loop.

CS 320 Ch 10 Computer Arithmetic The ALU consists of combinational logic. Processes all data in the CPU. ALL von Neuman machines have an ALU loop. Signed integers are typically represented in sign-magnitude

### COMP 303 Computer Architecture Lecture 6

COMP 303 Computer Architecture Lecture 6 MULTIPLY (unsigned) Paper and pencil example (unsigned): Multiplicand 1000 = 8 Multiplier x 1001 = 9 1000 0000 0000 1000 Product 01001000 = 72 n bits x n bits =

### Arithmetic. Chapter 3 Computer Organization and Design

Arithmetic Chapter 3 Computer Organization and Design Addition Addition is similar to decimals 0000 0111 + 0000 0101 = 0000 1100 Subtraction (negate) 0000 0111 + 1111 1011 = 0000 0010 Over(under)flow For

### Arithmetic for Computers. Hwansoo Han

Arithmetic for Computers Hwansoo Han Arithmetic for Computers Operations on integers Addition and subtraction Multiplication and division Dealing with overflow Floating-point real numbers Representation

### Floating Point. The World is Not Just Integers. Programming languages support numbers with fraction

1 Floating Point The World is Not Just Integers Programming languages support numbers with fraction Called floating-point numbers Examples: 3.14159265 (π) 2.71828 (e) 0.000000001 or 1.0 10 9 (seconds in

### EC2303-COMPUTER ARCHITECTURE AND ORGANIZATION

EC2303-COMPUTER ARCHITECTURE AND ORGANIZATION QUESTION BANK UNIT-II 1. What are the disadvantages in using a ripple carry adder? (NOV/DEC 2006) The main disadvantage using ripple carry adder is time delay.

### Homework 3. Assigned on 02/15 Due time: midnight on 02/21 (1 WEEK only!) B.2 B.11 B.14 (hint: use multiplexors) CSCI 402: Computer Architectures

Homework 3 Assigned on 02/15 Due time: midnight on 02/21 (1 WEEK only!) B.2 B.11 B.14 (hint: use multiplexors) 1 CSCI 402: Computer Architectures Arithmetic for Computers (2) Fengguang Song Department

### Computer Architecture and Organization

3-1 Chapter 3 - Arithmetic Computer Architecture and Organization Miles Murdocca and Vincent Heuring Chapter 3 Arithmetic 3-2 Chapter 3 - Arithmetic Chapter Contents 3.1 Fixed Point Addition and Subtraction

### Computer Arithmetic Ch 8

Computer Arithmetic Ch 8 ALU Integer Representation Integer Arithmetic Floating-Point Representation Floating-Point Arithmetic 1 Arithmetic Logical Unit (ALU) (2) (aritmeettis-looginen yksikkö) Does all

### Computer Arithmetic Ch 8

Computer Arithmetic Ch 8 ALU Integer Representation Integer Arithmetic Floating-Point Representation Floating-Point Arithmetic 1 Arithmetic Logical Unit (ALU) (2) Does all work in CPU (aritmeettis-looginen

### Basic Arithmetic (adding and subtracting)

Basic Arithmetic (adding and subtracting) Digital logic to show add/subtract Boolean algebra abstraction of physical, analog circuit behavior 1 0 CPU components ALU logic circuits logic gates transistors

### Data Representation Type of Data Representation Integers Bits Unsigned 2 s Comp Excess 7 Excess 8

Data Representation At its most basic level, all digital information must reduce to 0s and 1s, which can be discussed as binary, octal, or hex data. There s no practical limit on how it can be interpreted

### CO Computer Architecture and Programming Languages CAPL. Lecture 13 & 14

CO20-320241 Computer Architecture and Programming Languages CAPL Lecture 13 & 14 Dr. Kinga Lipskoch Fall 2017 Frame Pointer (1) The stack is also used to store variables that are local to function, but

### Fast Arithmetic. Philipp Koehn. 19 October 2016

Fast Arithmetic Philipp Koehn 19 October 2016 1 arithmetic Addition (Immediate) 2 Load immediately one number (s0 = 2) li \$s0, 2 Add 4 (\$s1 = \$s0 + 4 = 6) addi \$s1, \$s0, 4 Subtract 3 (\$s2 = \$s1-3 = 3)

### Chapter 03: Computer Arithmetic. Lesson 09: Arithmetic using floating point numbers

Chapter 03: Computer Arithmetic Lesson 09: Arithmetic using floating point numbers Objective To understand arithmetic operations in case of floating point numbers 2 Multiplication of Floating Point Numbers

### 3.5 Floating Point: Overview

3.5 Floating Point: Overview Floating point (FP) numbers Scientific notation Decimal scientific notation Binary scientific notation IEEE 754 FP Standard Floating point representation inside a computer

### Arithmetic Logic Unit

Arithmetic Logic Unit A.R. Hurson Department of Computer Science Missouri University of Science & Technology A.R. Hurson 1 Arithmetic Logic Unit It is a functional bo designed to perform "basic" arithmetic,

### Floating Point COE 308. Computer Architecture Prof. Muhamed Mudawar. Computer Engineering Department King Fahd University of Petroleum and Minerals

Floating Point COE 38 Computer Architecture Prof. Muhamed Mudawar Computer Engineering Department King Fahd University of Petroleum and Minerals Presentation Outline Floating-Point Numbers IEEE 754 Floating-Point

Addition and multiplication Arithmetic is the most basic thing you can do with a computer, but it s not as easy as you might expect! These next few lectures focus on addition, subtraction, multiplication

### COMP MIPS instructions 2 Feb. 8, f = g + h i;

Register names (save, temporary, zero) From what I have said up to now, you will have the impression that you are free to use any of the 32 registers (\$0,..., \$31) in any instruction. This is not so, however.

### Inf2C - Computer Systems Lecture 2 Data Representation

Inf2C - Computer Systems Lecture 2 Data Representation Boris Grot School of Informatics University of Edinburgh Last lecture Moore s law Types of computer systems Computer components Computer system stack

### Two-Level CLA for 4-bit Adder. Two-Level CLA for 4-bit Adder. Two-Level CLA for 16-bit Adder. A Closer Look at CLA Delay

Two-Level CLA for 4-bit Adder Individual carry equations C 1 = g 0 +p 0, C 2 = g 1 +p 1 C 1,C 3 = g 2 +p 2 C 2, = g 3 +p 3 C 3 Fully expanded (infinite hardware) CLA equations C 1 = g 0 +p 0 C 2 = g 1

### Numeric Encodings Prof. James L. Frankel Harvard University

Numeric Encodings Prof. James L. Frankel Harvard University Version of 10:19 PM 12-Sep-2017 Copyright 2017, 2016 James L. Frankel. All rights reserved. Representation of Positive & Negative Integral and

### Chapter 10 - Computer Arithmetic

Chapter 10 - Computer Arithmetic Luis Tarrataca luis.tarrataca@gmail.com CEFET-RJ L. Tarrataca Chapter 10 - Computer Arithmetic 1 / 126 1 Motivation 2 Arithmetic and Logic Unit 3 Integer representation

### Floating Point Numbers

Floating Point Numbers Summer 8 Fractional numbers Fractional numbers fixed point Floating point numbers the IEEE 7 floating point standard Floating point operations Rounding modes CMPE Summer 8 Slides

### Principles of Computer Architecture. Chapter 3: Arithmetic

3-1 Chapter 3 - Arithmetic Principles of Computer Architecture Miles Murdocca and Vincent Heuring Chapter 3: Arithmetic 3-2 Chapter 3 - Arithmetic 3.1 Overview Chapter Contents 3.2 Fixed Point Addition

### CO Computer Architecture and Programming Languages CAPL. Lecture 9

CO20-320241 Computer Architecture and Programming Languages CAPL Lecture 9 Dr. Kinga Lipskoch Fall 2017 A Four-bit Number Circle CAPL Fall 2017 2 / 38 Functional Parts of an ALU CAPL Fall 2017 3 / 38 Addition

### Microcomputers. Outline. Number Systems and Digital Logic Review

Microcomputers Number Systems and Digital Logic Review Lecture 1-1 Outline Number systems and formats Common number systems Base Conversion Integer representation Signed integer representation Binary coded

### Lecture 14: Recap. Today s topics: Recap for mid-term No electronic devices in midterm

Lecture 14: Recap Today s topics: Recap for mid-term No electronic devices in midterm 1 Modern Trends Historical contributions to performance: Better processes (faster devices) ~20% Better circuits/pipelines

### 1. NUMBER SYSTEMS USED IN COMPUTING: THE BINARY NUMBER SYSTEM

1. NUMBER SYSTEMS USED IN COMPUTING: THE BINARY NUMBER SYSTEM 1.1 Introduction Given that digital logic and memory devices are based on two electrical states (on and off), it is natural to use a number

### MIPS Assembly Programming

COMP 212 Computer Organization & Architecture COMP 212 Fall 2008 Lecture 8 Cache & Disk System Review MIPS Assembly Programming Comp 212 Computer Org & Arch 1 Z. Li, 2008 Comp 212 Computer Org & Arch 2

### Assembly Programming

Designing Computer Systems Assembly Programming 08:34:48 PM 23 August 2016 AP-1 Scott & Linda Wills Designing Computer Systems Assembly Programming In the early days of computers, assembly programming

### CS61C L10 MIPS Instruction Representation II, Floating Point I (6)

CS61C L1 MIPS Instruction Representation II, Floating Point I (1) inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture #1 Instruction Representation II, Floating Point I 25-1-3 There is one

### Lecture 5. Other Adder Issues

Lecture 5 Other Adder Issues Mark Horowitz Computer Systems Laboratory Stanford University horowitz@stanford.edu Copyright 24 by Mark Horowitz with information from Brucek Khailany 1 Overview Reading There

### UC Berkeley College of Engineering, EECS Department CS61C: Combinational Logic Blocks

2 Wawrzynek, Garcia 2004 c UCB UC Berkeley College of Engineering, EECS Department CS61C: Combinational Logic Blocks 1 Introduction Original document by J. Wawrzynek (2003-11-15) Revised by Chris Sears

### Chapter 2. Data Representation in Computer Systems

Chapter 2 Data Representation in Computer Systems Chapter 2 Objectives Understand the fundamentals of numerical data representation and manipulation in digital computers. Master the skill of converting

### Floating Point Numbers. Lecture 9 CAP

Floating Point Numbers Lecture 9 CAP 3103 06-16-2014 Review of Numbers Computers are made to deal with numbers What can we represent in N bits? 2 N things, and no more! They could be Unsigned integers:

### Arithmetic and Logical Operations

Arithmetic and Logical Operations 2 CMPE2c x +y + sum Or in tabular form Binary Addition Carry Out Sum B A Carry In Binary Addition And as a full adder a b co ci sum 4-bit Ripple-Carry adder: Carry values

### HW2 solutions You did this for Lab sbn temp, temp,.+1 # temp = 0; sbn temp, b,.+1 # temp = -b; sbn a, temp,.+1 # a = a (-b) = a + b;

HW2 solutions 3.10 Pseuodinstructions What is accomplished Minimum sequence of Mips Move \$t5, \$t3 \$t5=\$t3 Add \$t5, \$t3, \$0 Clear \$t5 \$t5=0 Xor \$t5, \$t5, \$t5 Li \$t5, small \$t5=small Addi \$t5, \$0, small

### ECE 2020B Fundamentals of Digital Design Spring problems, 6 pages Exam Two 26 February 2014

Instructions: This is a closed book, closed note exam. Calculators are not permitted. If you have a question, raise your hand and I will come to you. Please work the exam in pencil and do not separate

### ECE 550D Fundamentals of Computer Systems and Engineering. Fall 2017

ECE 550D Fundamentals of Computer Systems and Engineering Fall 2017 Combinational Logic Prof. John Board Duke University Slides are derived from work by Profs. Tyler Bletsch and Andrew Hilton (Duke) Last

### CS61C : Machine Structures

inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures \$2M 3D camera Lecture 8 MIPS Instruction Representation I Instructor: Miki Lustig 2014-09-17 August 25: The final ISA showdown: Is ARM, x86, or

### BINARY SYSTEM. Binary system is used in digital systems because it is:

CHAPTER 2 CHAPTER CONTENTS 2.1 Binary System 2.2 Binary Arithmetic Operation 2.3 Signed & Unsigned Numbers 2.4 Arithmetic Operations of Signed Numbers 2.5 Hexadecimal Number System 2.6 Octal Number System

### Floating-Point Data Representation and Manipulation 198:231 Introduction to Computer Organization Lecture 3

Floating-Point Data Representation and Manipulation 198:231 Introduction to Computer Organization Instructor: Nicole Hynes nicole.hynes@rutgers.edu 1 Fixed Point Numbers Fixed point number: integer part

### Chapter 2 Float Point Arithmetic. Real Numbers in Decimal Notation. Real Numbers in Decimal Notation

Chapter 2 Float Point Arithmetic Topics IEEE Floating Point Standard Fractional Binary Numbers Rounding Floating Point Operations Mathematical properties Real Numbers in Decimal Notation Representation

### EE 109 Unit 6 Binary Arithmetic

EE 109 Unit 6 Binary Arithmetic 1 2 Semester Transition Point At this point we are going to start to transition in our class to look more at the hardware organization and the low-level software that is

### CS61C : Machine Structures

inst.eecs.berkeley.edu/~cs61c CS61C : Machine Structures Lecture #10 Instruction Representation II, Floating Point I 2005-10-03 Lecturer PSOE, new dad Dan Garcia www.cs.berkeley.edu/~ddgarcia #9 bears

### CO Computer Architecture and Programming Languages CAPL. Lecture 15

CO20-320241 Computer Architecture and Programming Languages CAPL Lecture 15 Dr. Kinga Lipskoch Fall 2017 How to Compute a Binary Float Decimal fraction: 8.703125 Integral part: 8 1000 Fraction part: 0.703125

### ENCM 369 Winter 2013: Reference Material for Midterm #2 page 1 of 5

ENCM 369 Winter 2013: Reference Material for Midterm #2 page 1 of 5 MIPS/SPIM General Purpose Registers Powers of Two 0 \$zero all bits are zero 16 \$s0 local variable 1 \$at assembler temporary 17 \$s1 local

### NODIA AND COMPANY. GATE SOLVED PAPER Computer Science Engineering Digital Logic. Copyright By NODIA & COMPANY

No part of this publication may be reproduced or distributed in any form or any means, electronic, mechanical, photocopying, or otherwise without the prior permission of the author. GATE SOLVED PAPER Computer

### UNIT IV: DATA PATH DESIGN

UNIT IV: DATA PATH DESIGN Agenda Introduc/on Fixed Point Arithme/c Addi/on Subtrac/on Mul/plica/on & Serial mul/plier Division & Serial Divider Two s Complement (Addi/on, Subtrac/on) Booth s algorithm

### D I G I T A L C I R C U I T S E E

D I G I T A L C I R C U I T S E E Digital Circuits Basic Scope and Introduction This book covers theory solved examples and previous year gate question for following topics: Number system, Boolean algebra,

### Chapter 4. Combinational Logic

Chapter 4. Combinational Logic Tong In Oh 1 4.1 Introduction Combinational logic: Logic gates Output determined from only the present combination of inputs Specified by a set of Boolean functions Sequential

### Lec-6-HW-3-ALUarithmetic-SOLN

Lec-6-HW-3-ALUarithmetic-SOLN Reading, PP, Chp 2: 2.1 (Bits and datatypes) 2.2 (signed and unsigned integers) 2.3 (2's complement) 2.4 (positional notation) 2.5 (int. add/sub, signed/unsigned overflow)

### Design of Arithmetic Units ECE152B AU 1

Design of Arithmetic Units ECE152B AU 1 Design of Arithmetic Units We will discuss the design of Adders/Substractors Multipliers/Dividers li id and analyze algorithms & methods to perform the desired d

### Signed umbers. Sign/Magnitude otation

Signed umbers So far we have discussed unsigned number representations. In particular, we have looked at the binary number system and shorthand methods in representing binary codes. With m binary digits,

### ECE232: Hardware Organization and Design. Computer Organization - Previously covered

ECE232: Hardware Organization and Design Part 6: MIPS Instructions II http://www.ecs.umass.edu/ece/ece232/ Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Computer Organization

### Floating-Point Arithmetic

Floating-Point Arithmetic if ((A + A) - A == A) { SelfDestruct() } L11 Floating Point 1 What is the problem? Many numeric applications require numbers over a VERY large range. (e.g. nanoseconds to centuries)

### Lecture 19: Arithmetic Modules 14-1

Lecture 19: Arithmetic Modules 14-1 Syllabus Objectives Addition and subtraction Multiplication Division Arithmetic and logic unit 14-2 Objectives After completing this chapter, you will be able to: Describe

### CS429: Computer Organization and Architecture

CS429: Computer Organization and Architecture Dr. Bill Young Department of Computer Sciences University of Texas at Austin Last updated: September 18, 2017 at 12:48 CS429 Slideset 4: 1 Topics of this Slideset

### Digital Arithmetic. Digital Arithmetic: Operations and Circuits Dr. Farahmand

Digital Arithmetic Digital Arithmetic: Operations and Circuits Dr. Farahmand Binary Arithmetic Digital circuits are frequently used for arithmetic operations Fundamental arithmetic operations on binary

### 1010 2?= ?= CS 64 Lecture 2 Data Representation. Decimal Numbers: Base 10. Reading: FLD Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9

CS 64 Lecture 2 Data Representation Reading: FLD 1.2-1.4 Decimal Numbers: Base 10 Digits: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 Example: 3271 = (3x10 3 ) + (2x10 2 ) + (7x10 1 ) + (1x10 0 ) 1010 10?= 1010 2?= 1

### unused unused unused unused unused unused

BCD numbers. In some applications, such as in the financial industry, the errors that can creep in due to converting numbers back and forth between decimal and binary is unacceptable. For these applications

### Logic, Words, and Integers

Computer Science 52 Logic, Words, and Integers 1 Words and Data The basic unit of information in a computer is the bit; it is simply a quantity that takes one of two values, 0 or 1. A sequence of k bits

### EE878 Special Topics in VLSI. Computer Arithmetic for Digital Signal Processing

EE878 Special Topics in VLSI Computer Arithmetic for Digital Signal Processing Part 6b High-Speed Multiplication - II Spring 2017 Koren Part.6b.1 Accumulating the Partial Products After generating partial

### CPS 104 Computer Organization and Programming

CPS 104 Computer Organization and Programming Lecture 9: Integer Arithmetic. Robert Wagner CPS104 IMD.1 RW Fall 2000 Overview of Today s Lecture: Integer Multiplication and Division. Read Appendix B CPS104

### Lecture 5. Computer Arithmetic. Ch 9 [Stal10] Integer arithmetic Floating-point arithmetic

Lecture 5 Computer Arithmetic Ch 9 [Stal10] Integer arithmetic Floating-point arithmetic ALU ALU = Arithmetic Logic Unit (aritmeettis-looginen yksikkö) Actually performs operations on data Integer and

### CS101 Lecture 04: Binary Arithmetic

CS101 Lecture 04: Binary Arithmetic Binary Number Addition Two s complement encoding Briefly: real number representation Aaron Stevens (azs@bu.edu) 25 January 2013 What You ll Learn Today Counting in binary

### ecture 25 Floating Point Friedland and Weaver Computer Science 61C Spring 2017 March 17th, 2017

ecture 25 Computer Science 61C Spring 2017 March 17th, 2017 Floating Point 1 New-School Machine Structures (It s a bit more complicated!) Software Hardware Parallel Requests Assigned to computer e.g.,

### Floating point. Today! IEEE Floating Point Standard! Rounding! Floating Point Operations! Mathematical properties. Next time. !

Floating point Today! IEEE Floating Point Standard! Rounding! Floating Point Operations! Mathematical properties Next time! The machine model Chris Riesbeck, Fall 2011 Checkpoint IEEE Floating point Floating

### MIPS PROJECT INSTRUCTION SET and FORMAT

ECE 312: Semester Project MIPS PROJECT INSTRUCTION SET FORMAT This is a description of the required MIPS instruction set, their meanings, syntax, semantics, bit encodings. The syntax given for each instruction

### UNIVERSITY OF MASSACHUSETTS Dept. of Electrical & Computer Engineering. Digital Computer Arithmetic ECE 666

UNIVERSITY OF MASSACHUSETTS Dept. of Electrical & Computer Engineering Digital Computer Arithmetic ECE 666 Part 6b High-Speed Multiplication - II Israel Koren ECE666/Koren Part.6b.1 Accumulating the Partial

### Number Systems. Both numbers are positive

Number Systems Range of Numbers and Overflow When arithmetic operation such as Addition, Subtraction, Multiplication and Division are performed on numbers the results generated may exceed the range of

### Floating Point Arithmetic

Floating Point Arithmetic Clark N. Taylor Department of Electrical and Computer Engineering Brigham Young University clark.taylor@byu.edu 1 Introduction Numerical operations are something at which digital

### IEEE Standard for Floating-Point Arithmetic: 754

IEEE Standard for Floating-Point Arithmetic: 754 G.E. Antoniou G.E. Antoniou () IEEE Standard for Floating-Point Arithmetic: 754 1 / 34 Floating Point Standard: IEEE 754 1985/2008 Established in 1985 (2008)

### Project 3: RPN Calculator

ECE267 @ UIC, Spring 2012, Wenjing Rao Project 3: RPN Calculator What to do: Ask the user to input a string of expression in RPN form (+ - * / ), use a stack to evaluate the result and display the result

### Introduction to Digital Logic Missouri S&T University CPE 2210 Multipliers/Dividers

Introduction to Digital Logic Missouri S&T University CPE 2210 Multipliers/Dividers Egemen K. Çetinkaya Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science

### Chapter 2 Data Representations

Computer Engineering Chapter 2 Data Representations Hiroaki Kobayashi 4/21/2008 4/21/2008 1 Agenda in Chapter 2 Translation between binary numbers and decimal numbers Data Representations for Integers

### MIPS Instruction Reference

Page 1 of 9 MIPS Instruction Reference This is a description of the MIPS instruction set, their meanings, syntax, semantics, and bit encodings. The syntax given for each instruction refers to the assembly

### ICS 233 COMPUTER ARCHITECTURE. MIPS Processor Design Multicycle Implementation

ICS 233 COMPUTER ARCHITECTURE MIPS Processor Design Multicycle Implementation Lecture 23 1 Add immediate unsigned Subtract unsigned And And immediate Or Or immediate Nor Shift left logical Shift right

### CS 31: Intro to Systems Digital Logic. Kevin Webb Swarthmore College February 2, 2016

CS 31: Intro to Systems Digital Logic Kevin Webb Swarthmore College February 2, 2016 Reading Quiz Today Hardware basics Machine memory models Digital signals Logic gates Circuits: Borrow some paper if

### Grading: 3 pts each part. If answer is correct but uses more instructions, 1 pt off. Wrong answer 3pts off.

Department of Electrical and Computer Engineering University of Wisconsin Madison ECE 552 Introductions to Computer Architecture Homework #2 (Suggested Solution) 1. (10 points) MIPS and C program translations

### Five classic components

CS/COE0447: Computer Organization and Assembly Language Chapter 3 modified by Bruce Childers original slides by Sangyeun Cho Dept. of Computer Science Five classic components I am like a control tower

### Floating-Point Arithmetic

Floating-Point Arithmetic if ((A + A) - A == A) { SelfDestruct() } Reading: Study Chapter 4. L12 Multiplication 1 Why Floating Point? Aren t Integers enough? Many applications require numbers with a VERY

### Computer Organization and Levels of Abstraction

Computer Organization and Levels of Abstraction Announcements PS8 Due today PS9 Due July 22 Sound Lab tonight bring machines and headphones! Binary Search Today Review of binary floating point notation

### Real Digital Problem Set #6

Real igital Problem et #6. (2 points) ketch a block diagram for a magnitude comparator bit-slice circuit. Create K-maps to define the bit-slice circuit, and use them to find optimal logic equations. ketch