Implement a C language function that computes the factorial of a number, recursively, according to the following prototype:

Size: px
Start display at page:

Download "Implement a C language function that computes the factorial of a number, recursively, according to the following prototype:"

Transcription

1 McGill University Department of Electrical and Computer Engineering ECSE-221 Introduction to Computer Engineering Assignment 5 Assembly and Datapaths Due Date: Monday, November 30 th 2009 at 11:59PM Question 1 Implement a C language function that computes the factorial of a number, recursively, according to the following prototype: void factorial (long argument, long *result); If you are unsure how to proceed, try Googling on the keywords recursive and factorial; the function is relatively straightforward to write. Demonstrate your function by writing an interactive test program that operates as follows: % factorial 6 6! = 720 Question 2 Translate your C function into MIPS assembly, passing arguments on the stack according to the following call convention (assume, below, that the argument is in $10, and that the data is to be returned to location data_return in the data segment): addi $sp, $sp, -8 sw $10, 0($sp) la $11, data_return sw $11, 4($sp) jal factorial addi $sp, $sp, 8 Using the SPIM console I/O functions, write a simple interactive program to query a value from the user and print the factorial of the value as output, e.g., Enter data > 6 6! = 120

2 Question The figure shown above shows a datapath for a 4-bit x 4-bit unsigned binary multiplier adapted from the one shown in Patterson and Hennessy. The corresponding algorithm, taken literally from the text, is reproduced below. 0. Init. Place Multiplicand in Multiplicand register. Place Multiplier in lower half of Product register. Clear upper half of Product register 1. Test and Update. If the LSB of Product register is 1, add Multiplicand register to upper half of Product register and place result back in the upper half of Product register. 2. Shift. Product register shifted right one 1 bit. 3. Count. If 4th repetition then done else goto step 1.

3 Do the following: 1. Implement the datapath shown on the previous page in LogicWorks. The Multiplicand and Multiplier inputs are supplied using Hex keypads (i.e. there is no need for an explicit Multiplicand register). The Product register can be implemented using the Shift Reg-4 component and the ALU with the Adder-4. Since the multiplication is unsigned, you will need to take care of the carry out generated by the ALU. Logic will also have to be provided for initializing the Product register at the start of the sequence as well as latching the final product for display. Clearly identify your control lines. 2. A total of 9 clock pulses are necessary to compute the product from the 4-bit multiplier and multiplicand. You will need to synthesize a controller to supply the correct states for your control lines for each of the 9 clock pulses. Start by drawing the state diagram corresponding to this controller, and then produce the state transition table that will be used to generate the ROM program. Implement your controller and validate it with an appropriate LogicWorks simulation. 3. Combine your controller with the datapath and verify that the system functions correctly. Produce 4 examples tracing the clock and the outputs of the product register. 4. Assume the following parameters: Tsu (reg) = 0.1 ns, Th (reg) = 0 ns, Tpd (reg) = 1 ns, Ta (ROM) = 5 ns, Tpd (ALU) = 10 ns, Tpd (all gates) = 0.1 ns. Determine the maximum frequency of operation of the circuit and produce a simulation, to scale, that validates the maximum clock frequency.

4 Question 1 /* */ /* Program Name: factorial */ /* Function: Computes the factorial of a command line */ /* argument. */ /* Usage: % factorial [long] */ /* Author: F.P. Ferrie */ /* Date: March 28, 2008 */ /* */ #include <stdio.h> void factorial (long argument, long *result); int main (int argc, char *argv[]) { long argument, result; if (argc!= 2) { printf("usage: factorial [long]\n"); return(0); } sscanf(argv[1],"%ld",&argument); factorial(argument,&result); printf("%ld! = %ld\n",argument,result); return(0); } /* */ /* Recursive factorial function */ /* void factorial (long argument, long *result) */ /* */ void factorial (long argument, long *result) { long temp; if (argument < 2) *result=1; else { factorial(argument-1,result); *result=argument*(*result); } } C:\Users\ferrie\221\lcc\lcc>factorial 0 0! = 1 C:\Users\ferrie\221\lcc\lcc>factorial 1 1! = 1 C:\Users\ferrie\221\lcc\lcc>factorial 2 2! = 2 C:\Users\ferrie\221\lcc\lcc>factorial 3 3! = 6 C:\Users\ferrie\221\lcc\lcc>factorial 4 4! = 24 C:\Users\ferrie\221\lcc\lcc>factorial 5 5! = 120 C:\Users\ferrie\221\lcc\lcc>factorial 6 6! = 720 C:\Users\ferrie\221\lcc\lcc>factorial 7 7! = 5040

5 Question 2 # Program Name: factorial # Function: Computes the factorial of a command line # argument. # Usage: % factorial [long] # Author: F.P. Ferrie # Date: March 28, 2008.text # Factorial: computes factorial of a number. Arguments passed # on stack according to the convention below. ##SP+4: return (reference) # SP argument (value) factorial: # Context save addi $sp, $sp, -20 sw $10, 0($sp) # Argument sw $11, 4($sp) # Return pointer sw $12, 8($sp) # Scratch sw $fp, 12($sp) # Frame pointer sw $31, 16($sp) # Linkage register # Argument fetch addi $fp, $sp, 20 # Set frame pointer lw $10, 0($fp) # Get factorial argument lw $11, 4($fp) # Get pointer to return # Termination condition for recursion slti $12, $10, 2 # Argument < 2? beq $12, $0, fl10 # No, do recursion li $12, 1 # Yes, set return value sw $12, 0($11) # Store at pointer location b fl20 # To restore context fl10: addi $sp, $sp, -8 # Set up stack for call addi $10, $10, -1 # Set arg to arg-1 sw $10, 0($sp) # Argument on stack sw $11, 4($sp) # Return on stack jal factorial # Execute call addi $sp, $sp, 8 # Restore sp addi $10, $10, 1 # Restore argument for next step lw $12, 0($11) # Get (n-1)! mul $12, $10, $12 # Compute argument x result sw $12, 0($11) # Return n x (n-1)! fl20: lw $10, 0($sp) # Restore context lw $11, 4($sp) lw $12, 8($sp) lw $fp, 12($sp) lw $31, 16($sp) addi $sp, $sp, 20

6 jr $31 # Return # Main program.globl main main: la $4, prompt # Do prompt - Enter value > li $2, 4 syscall li $2, 5 # Get number from console syscall addi $sp, $sp, -8 # Set up function call sw $2, 0($sp) la $4, return sw $4, 4($sp) jal factorial # Do it addi $sp, $sp, 8 move $4, $2 # Print result li $2, 1 syscall la $4, excl li $2, 4 syscall la $4, return lw $4, 0($4) li $2, 1 syscall la $4, crlf li $2, 4 syscall b main # Data Segment.data prompt:.asciiz "Enter value > " excl:.asciiz "! = " crlf:.asciiz "\n".align 2 return:.word 0 7/36 Console ========================= Enter value > 0 0! = 1 Enter value > 1 1! = 1 Enter value > 2 2! = 2 Enter value > 3 3! = 6 Enter value > 4 4! = 24 Enter value > 5 5! = 120 Enter value > 6 6! = 720 Enter value > 7

7 7! = 5040 Enter value > 8 8! = Enter value > 9 9! = Enter value > 10 10! = Enter value >

8 Question 3 a) Datapath implementation using parts from the standard LogicWorks library. There are 2 datapath control signals, Init and Ld, both of which are active 0. When Init is asserted (i.e. 0), the upper product register is cleared and the lower product register is loaded with the multiplier (lower hex keypad). Init is asserted on the first clock pulse, and de-asserted (1) for the remainder of the cycle. The Ld signal determines whether the product register shifts or loads. Ld is asserted on the first clock pulse (initialization), and then at each ALU operation (pulses 0, 1, 3, 5, 7). An additional D- FF is needed to save the carry out so that it can be shifted in to the product register on the subsequent clock pulse. By connecting P0 to the select line of the multiplicand register (i.e. the hex keypad), adding 0 or adding the multiplicand is handled automatically. Finally, we observe that the Init signal marks

9 both the end of the current cycle and the start of a new one. Hence the Init signal is used to load the two display registers which latch the result from the product register. b) Finite State Machine

10 State Transition Table Implementation:

11 b) Multiplier Implementation

12 d) Timing Analysis and Demonstration Tclock = Tsu(max) + Tpd(max) + Tcl = 0.1 ns + 1 ns + Tcl Tcl = Tpd(Add) + Tpd(AND) = 10.1 ns Tclock = 11.2 ns Fmax = Mhz Simulation: Scale by 10. Show correct function with Tclock = 112 units, and incorrect with 111. Correct answer F x F = E1 with Tclock = 112 units

13 Incorrect answer F X F = C5 with Tclock = 111 units

McGill University Faculty of Engineering FINAL EXAMINATION Fall 2007 (DEC 2007)

McGill University Faculty of Engineering FINAL EXAMINATION Fall 2007 (DEC 2007) McGill University Faculty of Engineering FINAL EXAMINATION Fall 2007 (DEC 2007) VERSION 1 Examiner: Professor T.Arbel Signature: INTRODUCTION TO COMPUTER ENGINEERING ECSE-221A 6 December 2007, 1400-1700

More information

COMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture

COMP 303 Computer Architecture Lecture 3. Comp 303 Computer Architecture COMP 303 Computer Architecture Lecture 3 Comp 303 Computer Architecture 1 Supporting procedures in computer hardware The execution of a procedure Place parameters in a place where the procedure can access

More information

MIPS function continued

MIPS function continued MIPS function continued Review Functions Series of related instructions one after another in memory Called through the jal instruction Pointed to by a label like any other Returns by calling Stack Top

More information

Department of Electrical and Computer Engineering Introduction to Computer Engineering I (ECSE-221) Assignment 3: Sequential Logic

Department of Electrical and Computer Engineering Introduction to Computer Engineering I (ECSE-221) Assignment 3: Sequential Logic Available: February 16, 2009 Due: March 9, 2009 Department of Electrical and Computer Engineering (ECSE-221) Assignment 3: Sequential Logic Information regarding submission and final deposition time can

More information

ECE260: Fundamentals of Computer Engineering

ECE260: Fundamentals of Computer Engineering Supporting Nested Procedures James Moscola Dept. of Engineering & Computer Science York College of Pennsylvania Based on Computer Organization and Design, 5th Edition by Patterson & Hennessy Memory Layout

More information

Lecture 5: Procedure Calls

Lecture 5: Procedure Calls Lecture 5: Procedure Calls Today s topics: Procedure calls and register saving conventions 1 Example Convert to assembly: while (save[i] == k) i += 1; i and k are in $s3 and $s5 and base of array save[]

More information

ECE331: Hardware Organization and Design

ECE331: Hardware Organization and Design ECE331: Hardware Organization and Design Lecture 8: Procedures (cont d), Binary Numbers and Adders Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Review: Procedure Calling Steps

More information

MODULE 4 INSTRUCTIONS: LANGUAGE OF THE MACHINE

MODULE 4 INSTRUCTIONS: LANGUAGE OF THE MACHINE MODULE 4 INSTRUCTIONS: LANGUAGE OF THE MACHINE 1 ARCHITECTURE MODEL The basic instruction set of a computer is comprised of sequences of REGISTER TRANSFERS. Example: Add A, B, C Register B # A

More information

EN164: Design of Computing Systems Lecture 11: Processor / ISA 4

EN164: Design of Computing Systems Lecture 11: Processor / ISA 4 EN164: Design of Computing Systems Lecture 11: Processor / ISA 4 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Brown University

More information

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont )

Chapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont ) Chapter 2 Computer Abstractions and Technology Lesson 4: MIPS (cont ) Logical Operations Instructions for bitwise manipulation Operation C Java MIPS Shift left >>> srl Bitwise

More information

Function Calls. 1 Administrivia. Tom Kelliher, CS 240. Feb. 13, Announcements. Collect homework. Assignment. Read

Function Calls. 1 Administrivia. Tom Kelliher, CS 240. Feb. 13, Announcements. Collect homework. Assignment. Read Function Calls Tom Kelliher, CS 240 Feb. 13, 2002 1 Administrivia Announcements Collect homework. Assignment Read 3.7 9. From Last Time SPIM lab. Outline 1. Function calls: stack execution model, memory

More information

ECE232: Hardware Organization and Design

ECE232: Hardware Organization and Design ECE232: Hardware Organization and Design Lecture 6: Procedures Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Overview Procedures have different names in different languages Java:

More information

CENG3420 Computer Organization and Design Lab 1-2: System calls and recursions

CENG3420 Computer Organization and Design Lab 1-2: System calls and recursions CENG3420 Computer Organization and Design Lab 1-2: System calls and recursions Wen Zong Department of Computer Science and Engineering The Chinese University of Hong Kong wzong@cse.cuhk.edu.hk Overview

More information

Function Calls. Tom Kelliher, CS 220. Oct. 24, SPIM programs due Wednesday. Refer to homework handout for what to turn in, and how.

Function Calls. Tom Kelliher, CS 220. Oct. 24, SPIM programs due Wednesday. Refer to homework handout for what to turn in, and how. Function Calls Tom Kelliher, CS 220 Oct. 24, 2011 1 Administrivia Announcements Assignment SPIM programs due Wednesday. Refer to homework handout for what to turn in, and how. From Last Time Outline 1.

More information

Computer Science 2500 Computer Organization Rensselaer Polytechnic Institute Spring Topic Notes: MIPS Programming

Computer Science 2500 Computer Organization Rensselaer Polytechnic Institute Spring Topic Notes: MIPS Programming Computer Science 2500 Computer Organization Rensselaer Polytechnic Institute Spring 2009 Topic Notes: MIPS Programming We spent some time looking at the MIPS Instruction Set Architecture. We will now consider

More information

2B 52 AB CA 3E A1 +29 A B C. CS120 Fall 2018 Final Prep and super secret quiz 9

2B 52 AB CA 3E A1 +29 A B C. CS120 Fall 2018 Final Prep and super secret quiz 9 S2 Fall 28 Final Prep and super secret quiz 9 ) onvert 8-bit (2-digit) 2 s complement hex values: 4-29 inary: Hex: x29 2) onvert 8-bit 2 s complement hex to decimal: x3 inary: xe5 Decimal: 58 Note 3*6+

More information

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero

Do-While Example. In C++ In assembly language. do { z--; while (a == b); z = b; loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero Do-While Example In C++ do { z--; while (a == b); z = b; In assembly language loop: addi $s2, $s2, -1 beq $s0, $s1, loop or $s2, $s1, $zero 25 Comparisons Set on less than (slt) compares its source registers

More information

MIPS ISA and MIPS Assembly. CS301 Prof. Szajda

MIPS ISA and MIPS Assembly. CS301 Prof. Szajda MIPS ISA and MIPS Assembly CS301 Prof. Szajda Administrative HW #2 due Wednesday (9/11) at 5pm Lab #2 due Friday (9/13) 1:30pm Read Appendix B5, B6, B.9 and Chapter 2.5-2.9 (if you have not already done

More information

MIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions

MIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions Representing Instructions Instructions are encoded in binary Called machine code MIPS instructions Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register

More information

Branch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015

Branch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015 Branch Addressing Branch instructions specify Opcode, two registers, target address Most branch targets are near branch Forward or backward op rs rt constant or address 6 bits 5 bits 5 bits 16 bits PC-relative

More information

Lecture 14: Recap. Today s topics: Recap for mid-term No electronic devices in midterm

Lecture 14: Recap. Today s topics: Recap for mid-term No electronic devices in midterm Lecture 14: Recap Today s topics: Recap for mid-term No electronic devices in midterm 1 Modern Trends Historical contributions to performance: Better processes (faster devices) ~20% Better circuits/pipelines

More information

Control Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary

Control Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary Control Instructions Computer Organization Architectures for Embedded Computing Thursday, 26 September 2013 Many slides adapted from: Computer Organization and Design, Patterson & Hennessy 4th Edition,

More information

Control Instructions

Control Instructions Control Instructions Tuesday 22 September 15 Many slides adapted from: and Design, Patterson & Hennessy 5th Edition, 2014, MK and from Prof. Mary Jane Irwin, PSU Summary Previous Class Instruction Set

More information

ICS 233 COMPUTER ARCHITECTURE. MIPS Processor Design Multicycle Implementation

ICS 233 COMPUTER ARCHITECTURE. MIPS Processor Design Multicycle Implementation ICS 233 COMPUTER ARCHITECTURE MIPS Processor Design Multicycle Implementation Lecture 23 1 Add immediate unsigned Subtract unsigned And And immediate Or Or immediate Nor Shift left logical Shift right

More information

ECE 473 Computer Architecture and Organization Lab 4: MIPS Assembly Programming Due: Wednesday, Oct. 19, 2011 (30 points)

ECE 473 Computer Architecture and Organization Lab 4: MIPS Assembly Programming Due: Wednesday, Oct. 19, 2011 (30 points) ECE 473 Computer Architecture and Organization Lab 4: MIPS Assembly Programming Due: Wednesday, Oct. 19, 2011 (30 points) Objectives: Get familiar with MIPS instructions Assemble, execute and debug MIPS

More information

Lecture 7: MIPS Functions Part 2. Nested Function Calls. Lecture 7: Character and String Operations. SPIM Syscalls. Recursive Functions

Lecture 7: MIPS Functions Part 2. Nested Function Calls. Lecture 7: Character and String Operations. SPIM Syscalls. Recursive Functions Part Part Part What if we need to call a function inside of a function? Will this work? int twofun(int a, int b) { int res; res = addfun(a, b) a / ; return res; } twofun: addi $sp, $sp, -4 sw $s0, 0($sp)

More information

2) Using the same instruction set for the TinyProc2, convert the following hex values to assembly language: x0f

2) Using the same instruction set for the TinyProc2, convert the following hex values to assembly language: x0f CS2 Fall 28 Exam 2 Name: ) The Logisim TinyProc2 has four instructions, each using 8 bits. The instruction format is DR SR SR2 OpCode with OpCodes of for add, for subtract, and for multiply. Load Immediate

More information

Procedure Calling. Procedure Calling. Register Usage. 25 September CSE2021 Computer Organization

Procedure Calling. Procedure Calling. Register Usage. 25 September CSE2021 Computer Organization CSE2021 Computer Organization Chapter 2: Part 2 Procedure Calling Procedure (function) performs a specific task and return results to caller. Supporting Procedures Procedure Calling Calling program place

More information

ECE 30 Introduction to Computer Engineering

ECE 30 Introduction to Computer Engineering ECE 30 Introduction to Computer Engineering Study Problems, Set #4 Spring 2015 Note: To properly study and understand the problems below, it is strongly recommended to implement and run your solution (and/or

More information

Chapter 2A Instructions: Language of the Computer

Chapter 2A Instructions: Language of the Computer Chapter 2A Instructions: Language of the Computer Copyright 2009 Elsevier, Inc. All rights reserved. Instruction Set The repertoire of instructions of a computer Different computers have different instruction

More information

Format. 10 multiple choice 8 points each. 1 short answer 20 points. Same basic principals as the midterm

Format. 10 multiple choice 8 points each. 1 short answer 20 points. Same basic principals as the midterm Final Review Format 10 multiple choice 8 points each Make sure to show your work Can write a description to the side as to why you think your answer is correct for possible partial credit 1 short answer

More information

CSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI.

CSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI. CSCI 402: Computer Architectures Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI Recall Big endian, little endian Memory alignment Unsigned

More information

MIPS Functions and Instruction Formats

MIPS Functions and Instruction Formats MIPS Functions and Instruction Formats 1 The Contract: The MIPS Calling Convention You write functions, your compiler writes functions, other compilers write functions And all your functions call other

More information

Signature: 1. (10 points) Basic Microcontroller Concepts

Signature: 1. (10 points) Basic Microcontroller Concepts EE 109 Practice Final Exam Last name: First name: Signature: The practice final is one hour, ten minutes long, closed book, closed notes, calculators allowed. To receive full credit on a question show

More information

S Computer Architecture. Computer architecture assignment E1 A subroutine, which searches for given byte pattern from an byte array.

S Computer Architecture. Computer architecture assignment E1 A subroutine, which searches for given byte pattern from an byte array. S-87.3190 Computer Architecture Computer architecture assignment E1 A subroutine, which searches for given byte pattern from an byte array. Mikko Vestola Student ID: xxxxx Department: xxxx Email: xxxxx

More information

ECE 2035 Programming HW/SW Systems Spring problems, 7 pages Exam One Solutions 4 February 2013

ECE 2035 Programming HW/SW Systems Spring problems, 7 pages Exam One Solutions 4 February 2013 Problem 1 (3 parts, 30 points) Code Fragments Part A (5 points) Write a MIPS code fragment that branches to label Target when register $1 is less than or equal to register $2. You may use only two instructions.

More information

We will study the MIPS assembly language as an exemplar of the concept.

We will study the MIPS assembly language as an exemplar of the concept. MIPS Assembly Language 1 We will study the MIPS assembly language as an exemplar of the concept. MIPS assembly instructions each consist of a single token specifying the command to be carried out, and

More information

King Fahd University of Petroleum and Minerals College of Computer Science and Engineering Computer Engineering Department

King Fahd University of Petroleum and Minerals College of Computer Science and Engineering Computer Engineering Department Page 1 of 13 King Fahd University of Petroleum and Minerals College of Computer Science and Engineering Computer Engineering Department COE 301 COMPUTER ORGANIZATION ICS 233: COMPUTER ARCHITECTURE & ASSEMBLY

More information

ECE550 PRACTICE Midterm

ECE550 PRACTICE Midterm ECE55 PRACTICE Midterm This is a full length practice midterm exam. If you want to take it at exam pace, give yourself 75 minutes to take the entire test. Just like the real exam, each question has a point

More information

Lab 4 : MIPS Function Calls

Lab 4 : MIPS Function Calls Lab 4 : MIPS Function Calls Name: Sign the following statement: On my honor, as an Aggie, I have neither given nor received unauthorized aid on this academic work 1 Objective The objective of this lab

More information

Chapter 2. Instructions:

Chapter 2. Instructions: Chapter 2 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS Arithmetic Instructions We ll be working with

More information

(a) Implement processor with the following instructions: addi, sw, lw, add, sub, and, andi, or, ori, nor, sll, srl, mul

(a) Implement processor with the following instructions: addi, sw, lw, add, sub, and, andi, or, ori, nor, sll, srl, mul Brown University School of Engineering EN1640 Design of Computing Systems Professor Sherief Reda LAB 04 (200 points) Final report due on April 4th (Milestones on March 21 st ) In this lab you are required

More information

Architecture II. Computer Systems Laboratory Sungkyunkwan University

Architecture II. Computer Systems Laboratory Sungkyunkwan University MIPS Instruction ti Set Architecture II Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Making Decisions (1) Conditional operations Branch to a

More information

CSc 256 Midterm 1 Fall 2011

CSc 256 Midterm 1 Fall 2011 CSc 256 Midterm 1 Fall 2011 NAME: Problem 1a: Given the C++ function prototype and variable declarations: int func(int arg0, int *arg1, int *arg2); int *ptr, n, arr[10]; which of the following statements

More information

CSE Lecture In Class Example Handout

CSE Lecture In Class Example Handout CSE 30321 Lecture 07-09 In Class Example Handout Part A: A Simple, MIPS-based Procedure: Swap Procedure Example: Let s write the MIPS code for the following statement (and function call): if (A[i] > A

More information

ECE 30 Introduction to Computer Engineering

ECE 30 Introduction to Computer Engineering ECE 30 Introduction to Computer Engineering Study Problems, Set #3 Spring 2015 Use the MIPS assembly instructions listed below to solve the following problems. arithmetic add add sub subtract addi add

More information

MIPS Assembly (Functions)

MIPS Assembly (Functions) ECPE 170 Jeff Shafer University of the Pacific MIPS Assembly (Functions) 2 Lab Schedule This Week Activities Lab work time MIPS functions MIPS Random Number Generator Lab 11 Assignments Due Due by Apr

More information

SPIM Procedure Calls

SPIM Procedure Calls SPIM Procedure Calls 22C:60 Jonathan Hall March 29, 2008 1 Motivation We would like to create procedures that are easy to use and easy to read. To this end we will discuss standard conventions as it relates

More information

Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University. See P&H 2.8 and 2.12, and A.

Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University. See P&H 2.8 and 2.12, and A. Prof. Kavita Bala and Prof. Hakim Weatherspoon CS 3410, Spring 2014 Computer Science Cornell University See P&H 2.8 and 2.12, and A.5 6 compute jump/branch targets memory PC +4 new pc Instruction Fetch

More information

CS/COE1541: Introduction to Computer Architecture

CS/COE1541: Introduction to Computer Architecture CS/COE1541: Introduction to Computer Architecture Dept. of Computer Science University of Pittsburgh http://www.cs.pitt.edu/~melhem/courses/1541p/index.html 1 Computer Architecture? Application pull Operating

More information

Review of Activation Frames. FP of caller Y X Return value A B C

Review of Activation Frames. FP of caller Y X Return value A B C Review of Activation Frames In general, activation frames are organized like this: HI LO Bookkeeping/preserved registers I/O parameters Locals and temps RA of caller FP of caller Y X Return value A B C

More information

Lecture 5: Procedure Calls

Lecture 5: Procedure Calls Lecture 5: Procedure Calls Today s topics: Memory layout, numbers, control instructions Procedure calls 1 Memory Organization The space allocated on stack by a procedure is termed the activation record

More information

CS3350B Computer Architecture

CS3350B Computer Architecture CS3350B Computer Architecture Winter 2015 Lecture 4.1: MIPS ISA: Introduction Marc Moreno Maza www.csd.uwo.ca/courses/cs3350b [Adapted d from lectures on Computer Organization and Design, Patterson & Hennessy,

More information

Computer Organization and Structure. Bing-Yu Chen National Taiwan University

Computer Organization and Structure. Bing-Yu Chen National Taiwan University Computer Organization and Structure Bing-Yu Chen National Taiwan University Instructions: Language of the Computer Operations and Operands of the Computer Hardware Signed and Unsigned Numbers Representing

More information

ICS DEPARTMENT ICS 233 COMPUTER ARCHITECTURE & ASSEMBLY LANGUAGE. Midterm Exam. First Semester (141) Time: 1:00-3:30 PM. Student Name : _KEY

ICS DEPARTMENT ICS 233 COMPUTER ARCHITECTURE & ASSEMBLY LANGUAGE. Midterm Exam. First Semester (141) Time: 1:00-3:30 PM. Student Name : _KEY Page 1 of 14 Nov. 22, 2014 ICS DEPARTMENT ICS 233 COMPUTER ARCHITECTURE & ASSEMBLY LANGUAGE Midterm Exam First Semester (141) Time: 1:00-3:30 PM Student Name : _KEY Student ID. : Question Max Points Score

More information

COMP 303 Computer Architecture Lecture 6

COMP 303 Computer Architecture Lecture 6 COMP 303 Computer Architecture Lecture 6 MULTIPLY (unsigned) Paper and pencil example (unsigned): Multiplicand 1000 = 8 Multiplier x 1001 = 9 1000 0000 0000 1000 Product 01001000 = 72 n bits x n bits =

More information

CS 61c: Great Ideas in Computer Architecture

CS 61c: Great Ideas in Computer Architecture MIPS Instruction Formats July 2, 2014 Review New registers: $a0-$a3, $v0-$v1, $ra, $sp New instructions: slt, la, li, jal, jr Saved registers: $s0-$s7, $sp, $ra Volatile registers: $t0-$t9, $v0-$v1, $a0-$a3

More information

MIPS Procedure Calls. Lecture 6 CS301

MIPS Procedure Calls. Lecture 6 CS301 MIPS Procedure Calls Lecture 6 CS301 Function Call Steps Place parameters in accessible location Transfer control to function Acquire storage for procedure variables Perform calculations in function Place

More information

CENG3420 Lecture 03 Review

CENG3420 Lecture 03 Review CENG3420 Lecture 03 Review Bei Yu byu@cse.cuhk.edu.hk 2017 Spring 1 / 38 CISC vs. RISC Complex Instruction Set Computer (CISC) Lots of instructions of variable size, very memory optimal, typically less

More information

Instructor: Randy H. Katz hap://inst.eecs.berkeley.edu/~cs61c/fa13. Fall Lecture #7. Warehouse Scale Computer

Instructor: Randy H. Katz hap://inst.eecs.berkeley.edu/~cs61c/fa13. Fall Lecture #7. Warehouse Scale Computer CS 61C: Great Ideas in Computer Architecture Everything is a Number Instructor: Randy H. Katz hap://inst.eecs.berkeley.edu/~cs61c/fa13 9/19/13 Fall 2013 - - Lecture #7 1 New- School Machine Structures

More information

Procedure Call and Return Procedure call

Procedure Call and Return Procedure call Procedures int len(char *s) { for (int l=0; *s!= \0 ; s++) l++; main return l; } void reverse(char *s, char *r) { char *p, *t; int l = len(s); reverse(s,r) N/A *(r+l) = \0 ; reverse l--; for (p=s+l t=r;

More information

MIPS Assembly Language. Today s Lecture

MIPS Assembly Language. Today s Lecture MIPS Assembly Language Computer Science 104 Lecture 6 Homework #2 Midterm I Feb 22 (in class closed book) Outline Assembly Programming Reading Chapter 2, Appendix B Today s Lecture 2 Review: A Program

More information

Winter 2006 FINAL EXAMINATION Auxiliary Gymnasium Tuesday, April 18 7:00pm to 10:00pm

Winter 2006 FINAL EXAMINATION Auxiliary Gymnasium Tuesday, April 18 7:00pm to 10:00pm University of Calgary Department of Electrical and Computer Engineering ENCM 369: Computer Organization Lecture Instructor for L01 and L02: Dr. S. A. Norman Winter 2006 FINAL EXAMINATION Auxiliary Gymnasium

More information

CS 110 Computer Architecture MIPS Instruction Formats

CS 110 Computer Architecture MIPS Instruction Formats CS 110 Computer Architecture MIPS Instruction Formats Instructor: Sören Schwertfeger http://shtech.org/courses/ca/ School of Information Science and Technology SIST ShanghaiTech University Slides based

More information

4.2: MIPS function calls

4.2: MIPS function calls 4.2: MIPS function calls Topics: Nested function calls: poly() and pow() Saving the return address ($31) Saving temporary registers Looking at activation records on the stack Introduction: In CSc 256 lectures,

More information

Today s Lecture. MIPS Assembly Language. Review: What Must be Specified? Review: A Program. Review: MIPS Instruction Formats

Today s Lecture. MIPS Assembly Language. Review: What Must be Specified? Review: A Program. Review: MIPS Instruction Formats Today s Lecture Homework #2 Midterm I Feb 22 (in class closed book) MIPS Assembly Language Computer Science 14 Lecture 6 Outline Assembly Programming Reading Chapter 2, Appendix B 2 Review: A Program Review:

More information

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine

Machine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine Machine Language Instructions Introduction Instructions Words of a language understood by machine Instruction set Vocabulary of the machine Current goal: to relate a high level language to instruction

More information

ECE232: Hardware Organization and Design. Computer Organization - Previously covered

ECE232: Hardware Organization and Design. Computer Organization - Previously covered ECE232: Hardware Organization and Design Part 6: MIPS Instructions II http://www.ecs.umass.edu/ece/ece232/ Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Computer Organization

More information

Implementing Procedure Calls

Implementing Procedure Calls 1 / 39 Implementing Procedure Calls February 18 22, 2013 2 / 39 Outline Intro to procedure calls Caller vs. callee Procedure call basics Calling conventions The stack Interacting with the stack Structure

More information

Review Session 1 Fri. Jan 19, 2:15 pm 3:05 pm Thornton 102

Review Session 1 Fri. Jan 19, 2:15 pm 3:05 pm Thornton 102 Review Session 1 Fri. Jan 19, 2:15 pm 3:05 pm Thornton 102 1. Agenda Announcements Homework hints MIPS instruction set Some PA1 thoughts MIPS procedure call convention and example 1 2. Announcements Homework

More information

COMP2611: Computer Organization MIPS function and recursion

COMP2611: Computer Organization MIPS function and recursion COMP2611 Fall2015 COMP2611: Computer Organization MIPS function and recursion Overview 2 You will learn the following in this lab: how to use MIPS functions in a program; the concept of recursion; how

More information

ECE260: Fundamentals of Computer Engineering

ECE260: Fundamentals of Computer Engineering Accessing and Addressing Memory James Moscola Dept. of Engineering & Computer Science York College of Pennsylvania Based on Computer Organization and Design, 5th Edition by Patterson & Hennessy American

More information

MIPS Assembly Language Programming

MIPS Assembly Language Programming MIPS Assembly Language Programming ICS 233 Computer Architecture and Assembly Language Dr. Aiman El-Maleh College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals [Adapted

More information

ENCM 369 Winter 2013: Reference Material for Midterm #2 page 1 of 5

ENCM 369 Winter 2013: Reference Material for Midterm #2 page 1 of 5 ENCM 369 Winter 2013: Reference Material for Midterm #2 page 1 of 5 MIPS/SPIM General Purpose Registers Powers of Two 0 $zero all bits are zero 16 $s0 local variable 1 $at assembler temporary 17 $s1 local

More information

Computer Architecture. Chapter 2-2. Instructions: Language of the Computer

Computer Architecture. Chapter 2-2. Instructions: Language of the Computer Computer Architecture Chapter 2-2 Instructions: Language of the Computer 1 Procedures A major program structuring mechanism Calling & returning from a procedure requires a protocol. The protocol is a sequence

More information

Procedure Calls Main Procedure. MIPS Calling Convention. MIPS-specific info. Procedure Calls. MIPS-specific info who cares? Chapter 2.7 Appendix A.

Procedure Calls Main Procedure. MIPS Calling Convention. MIPS-specific info. Procedure Calls. MIPS-specific info who cares? Chapter 2.7 Appendix A. MIPS Calling Convention Chapter 2.7 Appendix A.6 Procedure Calls Main Procedure Call Procedure Call Procedure Procedure Calls Procedure must from any call Procedure uses that main was using We need a convention

More information

Machine Instructions - II. Hwansoo Han

Machine Instructions - II. Hwansoo Han Machine Instructions - II Hwansoo Han Conditional Operations Instructions for making decisions Alter the control flow - change the next instruction to be executed Branch to a labeled instruction if a condition

More information

MIPS Assembly Language Programming

MIPS Assembly Language Programming MIPS Assembly Language Programming COE 308 Computer Architecture Prof. Muhamed Mudawar College of Computer Sciences and Engineering King Fahd University of Petroleum and Minerals Presentation Outline Assembly

More information

COE608: Computer Organization and Architecture

COE608: Computer Organization and Architecture Add on Instruction Set Architecture COE608: Computer Organization and Architecture Dr. Gul N. Khan http://www.ee.ryerson.ca/~gnkhan Electrical and Computer Engineering Ryerson University Overview More

More information

CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions

CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions CS 61C: Great Ideas in Computer Architecture More MIPS, MIPS Functions Instructors: John Wawrzynek & Vladimir Stojanovic http://inst.eecs.berkeley.edu/~cs61c/fa15 1 Machine Interpretation Levels of Representation/Interpretation

More information

ECE 331 Hardware Organization and Design. Professor Jay Taneja UMass ECE - Discussion 3 2/8/2018

ECE 331 Hardware Organization and Design. Professor Jay Taneja UMass ECE - Discussion 3 2/8/2018 ECE 331 Hardware Organization and Design Professor Jay Taneja UMass ECE - jtaneja@umass.edu Discussion 3 2/8/2018 Study Jams Leader: Chris Bartoli Tuesday 5:30-6:45pm Elab 325 Wednesday 8:30-9:45pm Elab

More information

Lectures 5. Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS

Lectures 5. Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS Lectures 5 Announcements: Today: Oops in Strings/pointers (example from last time) Functions in MIPS 1 OOPS - What does this C code do? int foo(char *s) { int L = 0; while (*s++) { ++L; } return L; } 2

More information

SPIM Instruction Set

SPIM Instruction Set SPIM Instruction Set This document gives an overview of the more common instructions used in the SPIM simulator. Overview The SPIM simulator implements the full MIPS instruction set, as well as a large

More information

CS 316: Procedure Calls/Pipelining

CS 316: Procedure Calls/Pipelining CS 316: Procedure Calls/Pipelining Kavita Bala Fall 2007 Computer Science Cornell University Announcements PA 3 IS out today Lectures on it this Fri and next Tue/Thu Due on the Friday after Fall break

More information

Computer Organization MIPS Architecture. Department of Computer Science Missouri University of Science & Technology

Computer Organization MIPS Architecture. Department of Computer Science Missouri University of Science & Technology Computer Organization MIPS Architecture Department of Computer Science Missouri University of Science & Technology hurson@mst.edu Computer Organization Note, this unit will be covered in three lectures.

More information

CSE 141 Computer Architecture Spring Lecture 3 Instruction Set Architecute. Course Schedule. Announcements

CSE 141 Computer Architecture Spring Lecture 3 Instruction Set Architecute. Course Schedule. Announcements CSE141: Introduction to Computer Architecture CSE 141 Computer Architecture Spring 2005 Lecture 3 Instruction Set Architecute Pramod V. Argade April 4, 2005 Instructor: TAs: Pramod V. Argade (p2argade@cs.ucsd.edu)

More information

Compiling Techniques

Compiling Techniques Lecture 10: An Introduction to MIPS assembly 18 October 2016 Table of contents 1 Overview 2 3 Assembly program template.data Data segment: constant and variable definitions go here (including statically

More information

COMPUTER ORGANIZATION AND DESIGN

COMPUTER ORGANIZATION AND DESIGN COMPUTER ORGANIZATION AND DESIGN 5 th The Hardware/Software Interface Edition Chapter 2 Instructions: Language of the Computer 2.1 Introduction Instruction Set The repertoire of instructions of a computer

More information

Homework 4 - Solutions (Floating point representation, Performance, Recursion and Stacks) Maximum points: 80 points

Homework 4 - Solutions (Floating point representation, Performance, Recursion and Stacks) Maximum points: 80 points Homework 4 - Solutions (Floating point representation, Performance, Recursion and Stacks) Maximum points: 80 points Directions This assignment is due Friday, Feb. th. Submit your solutions on a separate

More information

Function Calling Conventions 1 CS 64: Computer Organization and Design Logic Lecture #9

Function Calling Conventions 1 CS 64: Computer Organization and Design Logic Lecture #9 Function Calling Conventions 1 CS 64: Computer Organization and Design Logic Lecture #9 Ziad Matni Dept. of Computer Science, UCSB Lecture Outline More on MIPS Calling Convention Functions calling functions

More information

ECE331: Hardware Organization and Design

ECE331: Hardware Organization and Design ECE331: Hardware Organization and Design Lecture 15: Midterm 1 Review Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Basics Midterm to cover Book Sections (inclusive) 1.1 1.5

More information

Chapter 2. Instruction Set. The MIPS Instruction Set. Arithmetic Operations. Instructions: Language of the Computer

Chapter 2. Instruction Set. The MIPS Instruction Set. Arithmetic Operations. Instructions: Language of the Computer COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer

More information

Reduced Instruction Set Computer (RISC)

Reduced Instruction Set Computer (RISC) Reduced Instruction Set Computer (RISC) Reduced Instruction Set Computer (RISC) Focuses on reducing the number and complexity of instructions of the machine. Reduced number of cycles needed per instruction.

More information

Instruction Set Architecture part 1 (Introduction) Mehran Rezaei

Instruction Set Architecture part 1 (Introduction) Mehran Rezaei Instruction Set Architecture part 1 (Introduction) Mehran Rezaei Overview Last Lecture s Review Execution Cycle Levels of Computer Languages Stored Program Computer/Instruction Execution Cycle SPIM, a

More information

CS 61C: Great Ideas in Computer Architecture (Machine Structures) More MIPS Machine Language

CS 61C: Great Ideas in Computer Architecture (Machine Structures) More MIPS Machine Language CS 61C: Great Ideas in Computer Architecture (Machine Structures) More MIPS Machine Language Instructors: Randy H. Katz David A. PaGerson hgp://inst.eecs.berkeley.edu/~cs61c/sp11 1 2 Machine Interpreta4on

More information

Chapter 3. Instructions:

Chapter 3. Instructions: Chapter 3 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS Arithmetic Instructions We ll be working with

More information

Subroutines. int main() { int i, j; i = 5; j = celtokel(i); i = j; return 0;}

Subroutines. int main() { int i, j; i = 5; j = celtokel(i); i = j; return 0;} Subroutines Also called procedures or functions Example C code: int main() { int i, j; i = 5; j = celtokel(i); i = j; return 0;} // subroutine converts Celsius to kelvin int celtokel(int i) { return (i

More information

Introduction to Assembler Language Programming

Introduction to Assembler Language Programming Introduction to Assembler Language Programming Fibonacci # Compute first twelve Fibonacci numbers and put in array, then print.data fibs:.word 0 : 12 # "array" of 12 words to contain fib values size:.word

More information

EE 361 University of Hawaii Fall

EE 361 University of Hawaii Fall C functions Road Map Computation flow Implementation using MIPS instructions Useful new instructions Addressing modes Stack data structure 1 EE 361 University of Hawaii Implementation of C functions and

More information

ECE260: Fundamentals of Computer Engineering

ECE260: Fundamentals of Computer Engineering Accessing and Addressing Memory James Moscola Dept. of Engineering & Computer Science York College of Pennsylvania Based on Computer Organization and Design, 5th Edition by Patterson & Hennessy American

More information