5/17/2012. Recap from Last Time. CSE 2021: Computer Organization. The RISC Philosophy. Levels of Programming. Stored Program Computers
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1 CSE 2021: Computer Organization Recap from Last Time load from disk High-Level Program Lecture-2 Code Translation-1 Registers, Arithmetic, logical, jump, and branch instructions MIPS to machine language mapping Floating-Point (pending) Data Translation Code Translation compiler Assembly Lang (obj) Topic for next few classes Shakil M. Khan (adapted from Profs. Roumani & Asif) Machine Lang (exe) save.exe to disk CSE-2021 May Levels of Programming The RISC Philosophy In this course we will cover MIPS ISA used by NEC, Nintendo, Silicon Graphics, and Sony MIPS is more primitive than higher level languages with a very restrictive set of instructions High-level language program (in C) Assembly language program (for MIPS) Binary machine language program (for MIPS) swap(int v[], int k) {int temp; temp = v[k]; v[k] = v[k+1]; v[k+1] = temp; C compiler swap: muli $2, $5,4 add $2, $4,$2 lw $15, 0($2) lw $16, 4($2) sw $16, 0($2) sw $15, 4($2) jr $31 Assembler MIPS adopts the RISC philosophy very simple instructions so they can execute in one cycle, perhaps with some parallelism Compared to CISC RISC programs tend to be bigger but this is offset by the higher execution speed and the simplicity of the hardware. The latter leads to faster CPU clocks and bigger on-board caches RISC: Reduced Instruction Set Computing CISC: Complex Instruction Set Computing CSE-2021 May CSE-2021 May Design Principles Stored Program Computers The design of the MIPS ISA (Instruction Set Architecture) observes these principles: smaller is faster simplicity favors regularity make the common case fast good design demands good compromises Instructions represented in binary, just like data Instructions and data stored in memory Programs can operate on programs e.g., compilers, linkers, Binary compatibility allows compiled programs to work on different computers Standardized ISAs The BIG Picture CSE-2021 May CSE-2021 May
2 Fetch and Execute Cycle Registers Processor Memory memory for data, programs, compilers, editors, etc. Instructions are fetched and put into a special register Bits in the register control the subsequent actions Data if required is fetched from the memory and placed in other registers Fetch the next instruction and continue (program counter) Registers are memory cells In MIPS, data must be in registers before arithmetic operations can be performed Size of each register is 32 bits, referred to as a word (1 word = 4 bytes = 32 bits) MIPS has a total of 32 registers CSE-2021 May CSE-2021 May Variables > Registers Register Allocation associate a register with each variable Preferred Registers eighteen: t0 t9 and s0 s7 Can also use six more: a0 a3 and v0 v1 But cannot use $0, $ra (reserved for the H/W) $k0, $k1 (reserved the O/S) $gp, $sp, $fp (reserved for addressing) $at (reserved for the assembler) CSE-2021 May Registers (Table) Name Number Usage $zero 0 Constant value of 0 $at 1 reserved for the assembler $v0-$v1 2 3 Values for results and expression evaluation $a0-$a3 4 7 Input arguments to a procedure $t0-$t Not preserved across procedures (temp) $s0-$s Preserved across procedure calls $t8-$t More temporary registers $k0-$k Reserved for OS Kernel $gp 28 Global pointer $sp 29 Stack pointer, points to last location of stack $fp 30 Frame pointer $ra 31 Return address from a procedure call CSE-2021 May Assumptions for Phase I (a simple app.) A single class hence, no instantiation of objects and no linking No Attributes hence no heap and no data segment A single method, main hence no stack needed for method invocation Few integer variables hence no spilling everything fits in registers The Arithmetic Family add/sub slt mult/div CSE-2021 May CSE-2021 May
3 Addition & Subtraction Syntax Meaning Comments Example add rd, rs, rt rd = rs + rt Overflow detected add $s0, $s1, $s2 addi rt, rs, imm rt = rs + SignExtImm Overflow detected addi $s0, $s1, 5 sub rd, rs, rt rd = rs rt Overflow detected sub $s0, $s1, $s2 Why three operands? Why addi but not subi? Editors and SPIM Unix, Windows Demo Our very first assembly program: let s convert the following C code to MIPS: x = 1; y = x + x; CSE-2021 May CSE-2021 May Mapping Variables MIPS Code: step 1: Specify registers containing variables step 2: Express instruction in MIPS $s0 $s1 $s2 $s3 $s4 $s5 $s6 $s7 Set Less Than slt rd, rs, rt rd = (rs < rt)? 1 : 0 slt $s0, $s1, $s2 slti rt, rs, imm rt = (rs < SignExtImm)? 1 : 0 slti $s0, $s1, -5 sltu rd, rs, rt rd = (rs < rt)? 1 : 0 slt $s0, $s1, $s2 sltiu rt, rs, imm rt = (rs < SignExtImm)? 1 : 0 sltiu $s0, $s1, 5 $s0 - $s7 x $t0 $t1 $t2 $t3 $t4 $t5 $t6 $t7 $t8 $t9 Why do we need it? Why sltu? $t0 - $t7 y CSE-2021 May CSE-2021 May Multiplication & Division mult rs, rt {hi,lo = rs*rt mult $s0, $s1 div rs, rt Why two operands? When to ignore hi? lo = rs / rt hi = rs % rt div $s0, $s1 mfhi rd rd = hi mfhi $s3 mflo rd rd = lo mflo $s3 MIPS to Binary Machine Language (1) Example: add $t0,$s1,$s2 Binary Machine Language Equivalent: Can we derive the binary machine language code from the MIPS instruction? MIPS field for arithmetic instructions: op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits opcode 1 st operand 2 nd operand destination shift function CSE-2021 May CSE-2021 May
4 MIPS Fields for Arithmetic Operations (R-type) op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits opcode 1 st operand 2 nd operand destination shift function Example: add $t0, $s1, $s2 opcode = 0 10 = (000000) 2 rs = $s1 = = (10001) 2 rt = $s2 = = (10010) 2 rd = $t0 = 8 10 = (01000) 2 shamt is not used = (00000) 2 funct for add = = (100000) 2 leads to the binary machine language code: CSE-2021 May MIPS Fields for Immediate Arithmetic Operations (I-type) op rs rt constant 6 bits 5 bits 5 bits 16 bits opcode 1 st operand 2 nd operand Memory address (offset) Example: addi $s1, $s2, 23 opcode = 8 10 = (001000) 2 rs = $s2 = = (10010) 2 rt = $s1 = = (10001) 2 constant = = ( ) 2 leads to the binary machine language code: CSE-2021 May The Logical Family (1) and, or, and xor is there an immediate version? nor what about not? sll and srl is there a variable version? sra why do we need it? CSE-2021 May The Logical Family (2) and rd, rs, rt rd = rs & rt and $s3, $s1, $s2 andi rt, rs, imm rt = rs & ZeroExtImm andi $s3, $s1, 5 or rd, rs, rt rd = rs rt or $s3, $s1, $s2 ori rt, rs, imm rt = rs ZeroExtImm ori $s3, $s1, 5 nor rd, rs, rt rd = ~ (rs rt) nor $s0, $s0, $0 sll rd, rt, shamt rd = rt << shamt sll $s1, $s1, 5 srl rd, rt, shamt rd = rt >> shamt srl $s3, $s1, 3 sra rd, rt, shamt rd = rt >>> shamt sra $s3, $s1, 3 sllv rd, rt, rs rd = rt << rs sllv $s1, $s1, $s2 srlv rd, rt, rs rd = rt >> rs srlv $s3, $s1, $s2 srav rd, rt, rs rd = rt >>> rs srav $s3, $s1, $s2 CSE-2021 May The Jump Family MIPS Fields for Jump (J-type) Used for unconditional branching to skip the else fragment of if statements and implement method invocation/return opcode address 6 bits 26 bits j and jr do we need both? jal and jalr do we need both? Syntax j C jr rs jal C jalr rs Meaning PC = JumpAddr PC = rs $ra = PC + 8 PC = JumpAddr $ra = PC + 8 PC = rs Example: j 100 opcode = 2 10 = (000010) 2 address = = ( ) 2 leads to the binary machine language code: CSE-2021 May CSE-2021 May
5 The Branch Family Used for conditional branching to implement if statements and loops beq and bne beq rs, rt, C if( rs==rt) PC = PC+4+BranchAddr beq $s1, $s2, L1 bne rs, rt, C if( rs!=rt) PC = PC+4+BranchAddr bne $s1, $s2, L2 Branch Instructions for if Example: C instructions if (i == j) f = g + h; else f = g - h; Variable Register f $s0 g $s1 h $s2 i $s3 j MIPS Code: $s4 bne $s3,$s4,l1 # go to L1 if i == j add $s0,$s1,$s2 # f = g + h j L2 # go to L2 L1: sub $s0,$s1,$s2 # f = g - h L2: Ex.: write the above code using branch if equal to CSE-2021 May CSE-2021 May General Patterns The u suffix stands for un-trapped for add/sub stands for unsigned for mult, div, and slt Handling immediates 5-bit, zero-extended for shifts 16-bit, zero-extended for logical and lui 26-bit, sign-extended for jump 16-bit, sign-extended for all the rest Large immediates the instruction lui + ori I/O > System Calls Each O/S comes with a host of s also known as interrupts SPIM uses $v0 for the service number see the SPIM Syscall Sheet Service $v0 Send Return Read integer 5 - $v0 Print integer 1 $a0 - Example: #we want to print 99 addi $v0, $0, 1 addi $a0, $0, 99 CSE-2021 May CSE-2021 May Demo (cont d) Another assembly program: read x and y compute and output: z + t*r + 1, where, z = x + y t = max(x,y) r = x y 10 import java.util.*; import java.io.*; Java Code public class First{ public static void main(string[] args){ Scanner input = new Scanner(System.in); PrintStream output = System.out; int x = input.nextint(); // $t0 holds x int y = input.nextint(); // $t1 holds y int z = x + y; int r = x - y - 10; int t = x; if (y > x) t = y; int e = z + t*r + 1; // $t2 holds z // $t3 holds r // $t4 holds t // $t5 holds e output.println(e); CSE-2021 May CSE-2021 May
6 .text main: addi $v0, $0, 5 # v0 = 5 add $t0, $v0, $0 # t0 = x addi $v0, $0, 5 # v0 = 5 add $t1, $0, $v0 # t1 = y $t1=$v0 add $t2, $t0, $t1 # t2 = z $t2=$t0+$t1 Let s Assemble! sub $t3, $t0, $t1 # t3 = x - y addi $t3, $t3, -10 # t3 = t3-10 = r add $t4, $0, $t0 # t4 = x slt $t9, $t0, $t1 # t9 = (x<y)? 1 : 0 beq $t9, $0, skip # if t9=0 go to skip add $t4, $0, $t1 # t4 = y # # t4 = t skip: mult $t4, $t3 # product in Hi Lo mflo $t5 # t5 = t*r add $t5, $t2, $t5 # t5 = z + t*r addi $t5, $t5, 1 # t5 = z + t*r + 1 addi $v0, $0, 1 add $a0, $t5, $0 jr $ra CSE-2021 May for Loops Example: C instructions for (i=0; i<5; i++) k = k+1; Say k => $s0 and let s map i => $t0 MIPS Code: Loop: add $t0,$0,$0 #$t0 = 0 addi $t1,$t1,5 #$t1 = 5 beq $t0,$t1,rest #go to Rest if (i==5) addi $s0,$s0,1 #k = k+1 addi $t0,$t0,1 #i = i+1 j Loop #go to Loop Rest: #rest of the program Example: C instructions while (i!=0){ k = k+1; i = i-1; while Loops Say k => $s0 and i => $t0 MIPS Code: Foo: beq $t0,$0,bar #go to Bar if (i==0) addi $s0,$s0,1 #k = k+1 addi $t0,$t0,-1 #i = i+1 j Foo #go to Foo Bar: CSE-2021 May CSE-2021 May Demo (Exercise) First, write a simple Java/C program add, mult, slt, j, beq, ifs, loops, read 2 ints, multiply them (using both mult and add), compare them, and print 0 if both are same, ±1 otherwise Now, let s translate it to MIPS How about to machine language? Summary Stored program computers Registers Arithmetic and logical instructions Jump and branch I/O () Mapping MIPS assembly language to binary machine language CSE-2021 May CSE-2021 May
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