Introduction to the MIPS. Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University
|
|
- Stella Barber
- 5 years ago
- Views:
Transcription
1 Introduction to the MIPS Lecture for CPSC 5155 Edward Bosworth, Ph.D. Computer Science Department Columbus State University
2 Introduction to the MIPS The Microprocessor without Interlocked Pipeline Stages is a RISC microprocessor architecture developed by MIPS Technologies, Inc, starting in about The first commercial product was the R2000, marketed in For a good historical account, go to MIPS processors are found in a variety of products, such as TiVo, Cisco routers, the Nintendo 64, and Sony PlayStation.
3 MIPS Integer Arithmetic The integer arithmetic used in our version of the MIPS is 32-bit arithmetic. There is a 64-bit version of the MIPS. The range of integers represented in 32 bits Unsigned: 0 to Signed: to All memory addresses are unsigned integers.
4 8-bit example of Signed Integers The number 0 is denoted as Consider the pattern Add one to this The result is The carry-out from the left column is dropped. Thus, the pattern represents the negative number -1. This pattern generalizes to 16 bits, 32 bits, etc.
5 The Two s Complement Recall that the one s complement of a bit pattern is achieved by changing every 0 to a 1 and every 1 to a 0. What is the sum X + X? We have only = 1 and = 1, so X + X = -1. Consider the example. X X Sum If X + X = -1, then X + (X + 1) = 0; -X = X + 1.
6 Register Operands Arithmetic instructions use register operands MIPS has a bit register file Use for frequently accessed data Numbered 0 to bit data called a word Assembler names $t0, $t1,, $t9 for temporary values $s0, $s1,, $s7 for saved variables Design Principle 2: Smaller is faster c.f. main memory: millions of locations 2.3 Operands of the Computer Hardware Chapter 2 Instructions: Language of the Computer 6
7 The MIPS Register Set There are 32 registers, 0-31 Name Register Number Usage $zero 0 Holds the constant value 0. Read only. $at 1 Reserved for use by the assembler. $v0 $v1 2 3 Holds values from functions. $a0 $a3 4 7 Holds arguments sent to functions $t0 $t Temporary registers, not saved in a call $s0 $s Saved registers $t8 $t More temporary registers $k0 $k Reserved for the Operating System $gp 28 Pointer to global variables $sp 29 The stack pointer $fp 30 The frame pointer, useful in the call stack. $ra 31 Return address from functions.
8 Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers had very simple instruction sets Simplified implementation Many modern computers also have simple instruction sets 2.1 Introduction Chapter 2 Instructions: Language of the Computer 8
9 Variables and Labels The idea of a variable is a construct of high level languages only. Each variable is given a type, which determines the operations on it. In assembly language, there are no variables. Labels are used to identify locations only. The operation is determined by the assembly language instruction only.
10 The MIPS Instruction Set Used as the example throughout the book Stanford MIPS commercialized by MIPS Technologies ( Large share of embedded core market Applications in consumer electronics, network/storage equipment, cameras, printers, Typical of many modern ISAs See MIPS Reference Data tear-out card, and Appendixes B and E Chapter 2 Instructions: Language of the Computer 10
11 Arithmetic Operations Add and subtract, three operands Two sources and one destination add a, b, c # a gets b + c All arithmetic operations have this form Design Principle 1: Simplicity favours regularity Regularity makes implementation simpler Simplicity enables higher performance at lower cost 2.2 Operations of the Computer Hardware Chapter 2 Instructions: Language of the Computer 11
12 Arithmetic Example C code: f = (g + h) - (i + j); Compiled MIPS code: add t0, g, h # temp t0 = g + h add t1, i, j # temp t1 = i + j sub f, t0, t1 # f = t0 - t1 NOTE: This is not exactly the MIPS syntax. Chapter 2 Instructions: Language of the Computer 12
13 Register Operand Example C code: f = (g + h) - (i + j); f,, j in $s0,, $s4 Compiled MIPS code: add $t0, $s1, $s2 add $t1, $s3, $s4 sub $s0, $t0, $t1 Chapter 2 Instructions: Language of the Computer 13
14 Memory Operands Main memory used for composite data Arrays, structures, dynamic data To apply arithmetic operations Load values from memory into registers Store result from register to memory Memory is byte addressed Each address identifies an 8-bit byte Words are aligned in memory Address must be a multiple of 4 MIPS is Big Endian Most-significant byte at least address of a word c.f. Little Endian: least-significant byte at least address Chapter 2 Instructions: Language of the Computer 14
15 Big-Endian vs. Little-Endian
16 Memory Dump Note: Powers of 256 are = 1, = 256, = 65536, = 16,777,216 Suppose one has the following memory map as a result of a core dump. The memory is byte addressable. Address 0x200 0x201 0x202 0x203 Contents What is the value of the 32 bit long integer stored at address 0x200? This is stored in the four bytes at addresses 0x200, 0x201, 0x202, and 0x203. Big Endian: Little Endian: The number is 0x Its decimal value is = 33,818,120 The number is 0x Its decimal value is = 134,611,970.
17 Memory Operand Example 1 C code: g = h + A[8]; g in $s1, h in $s2, base address of A in $s3 Compiled MIPS code: Index 8 requires offset of 32 4 bytes per word lw $t0, 32($s3) # load word add $s1, $s2, $t0 offset base register Chapter 2 Instructions: Language of the Computer 17
18 Memory Operand Example 2 C code: A[12] = h + A[8]; h in $s2, base address of A in $s3 Compiled MIPS code: Index 8 requires offset of 32 lw $t0, 32($s3) # load word add $t0, $s2, $t0 sw $t0, 48($s3) # store word Chapter 2 Instructions: Language of the Computer 18
19 Registers vs. Memory Registers are faster to access than memory Operating on memory data requires loads and stores More instructions to be executed Compiler must use registers for variables as much as possible Only spill to memory for less frequently used variables Register optimization is important! Chapter 2 Instructions: Language of the Computer 19
20 Immediate Operands Constant data specified in an instruction addi $s3, $s3, 4 #$s3 = $s3 + 4 No subtract immediate instruction Just use a negative constant addi $s2, $s1, -1 #$s2 = $s1-1 Design Principle 3: Make the common case fast Small constants are common Immediate operand avoids a load instruction Chapter 2 Instructions: Language of the Computer 20
21 The Constant Zero MIPS register 0 ($zero) is the constant 0 Cannot be overwritten Useful for common operations E.g., move between registers add $t2, $s1, $zero Chapter 2 Instructions: Language of the Computer 21
22 Representing Instructions Instructions are encoded in binary Called machine code MIPS instructions Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register numbers, Regularity! Register numbers $t0 $t7 are reg s 8 15 $t8 $t9 are reg s $s0 $s7 are reg s Representing Instructions in the Computer Chapter 2 Instructions: Language of the Computer 22
23 MIPS R-format Instructions op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits Instruction fields op: operation code (opcode) rs: first source register number rt: second source register number rd: destination register number shamt: shift amount (00000 for now) funct: function code (extends opcode) Chapter 2 Instructions: Language of the Computer 23
24 R-format Example op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits add $t0, $s1, $s2 special $s1 $s2 $t0 0 add = Chapter 2 Instructions: Language of the Computer 24
25 Hexadecimal Base 16 Compact representation of bit strings 4 bits per hex digit c d a 1010 e b 1011 f 1111 Example: eca Chapter 2 Instructions: Language of the Computer 25
26 MIPS I-format Instructions op rs rt constant or address 6 bits 5 bits 5 bits 16 bits Immediate arithmetic and load/store instructions rt: destination or source register number Constant: 2 15 to Address: offset added to base address in rs Design Principle 4: Good design demands good compromises Different formats complicate decoding, but allow 32-bit instructions uniformly Keep formats as similar as possible Chapter 2 Instructions: Language of the Computer 26
27 Stored Program Computers The BIG Picture Instructions represented in binary, just like data Instructions and data stored in memory Programs can operate on programs e.g., compilers, linkers, Binary compatibility allows compiled programs to work on different computers Standardized ISAs Chapter 2 Instructions: Language of the Computer 27
28 Memory Layout Text: program code Static data: global variables e.g., static variables in C, constant arrays and strings $gp initialized to address allowing ±offsets into this segment Dynamic data: heap E.g., malloc in C, new in Java Stack: automatic storage Chapter 2 Instructions: Language of the Computer 28
29 All Memory Maps Use Virtual Addresses Virtual memory is a service of the computer s operating system in conjunction with the MMU (Memory Management Unit). Logical addresses are generated by the code and then translated into physical addresses. For example, the global pointer contains the logical address 0x The actual physical address is determined by the OS.
30 The Stack and Heap The stack and heap are two dynamic memory structures, assigned to occupy memory with virtual addresses above the static data. To avoid a rigid partitioning of this block of memory, the stack starts at the top and grows down, while the heap starts at the bottom and grows up.
31 Logical Operations Instructions for bitwise manipulation Operation C Java MIPS Shift left << << sll Shift right >> >>> srl Bitwise AND & & and, andi Bitwise OR or, ori Bitwise NOT ~ ~ nor 2.6 Logical Operations Useful for extracting and inserting groups of bits in a word Chapter 2 Instructions: Language of the Computer 31
32 AND Operations Useful to mask bits in a word Select some bits, clear others to 0 and $t0, $t1, $t2 $t2 $t1 $t Chapter 2 Instructions: Language of the Computer 32
33 OR Operations Useful to include bits in a word Set some bits to 1, leave others unchanged or $t0, $t1, $t2 $t2 $t1 $t Chapter 2 Instructions: Language of the Computer 33
34 NOT Operations Useful to invert bits in a word Change 0 to 1, and 1 to 0 MIPS has NOR 3-operand instruction a NOR b == NOT ( a OR b ) nor $t0, $t1, $zero Register 0: always read as zero $t1 $t Chapter 2 Instructions: Language of the Computer 34
35 Conditional Operations Branch to a labeled instruction if a condition is true Otherwise, continue sequentially beq rs, rt, L1 if (rs == rt) branch to instruction labeled L1; bne rs, rt, L1 if (rs!= rt) branch to instruction labeled L1; j L1 unconditional jump to instruction labeled L1 2.7 Instructions for Making Decisions Chapter 2 Instructions: Language of the Computer 35
36 Compiling If Statements C code: if (i==j) f = g+h; else f = g-h; f, g, in $s0, $s1, Compiled MIPS code: bne $s3, $s4, Else add $s0, $s1, $s2 j Exit Else: sub $s0, $s1, $s2 Exit: Assembler calculates addresses Chapter 2 Instructions: Language of the Computer 36
37 Compiling Loop Statements C code: while (save[i] == k) i += 1; i in $s3, k in $s5, address of save in $s6 Compiled MIPS code: Loop: sll $t1, $s3, 2 add $t1, $t1, $s6 lw $t0, 0($t1) bne $t0, $s5, Exit addi $s3, $s3, 1 j Loop Exit: Chapter 2 Instructions: Language of the Computer 37
38 More Conditional Operations Set result to 1 if a condition is true Otherwise, set to 0 slt rd, rs, rt if (rs < rt) rd = 1; else rd = 0; slti rt, rs, constant if (rs < constant) rt = 1; else rt = 0; Use in combination with beq, bne slt $t0, $s1, $s2 # if ($s1 < $s2) bne $t0, $zero, L # branch to L Chapter 2 Instructions: Language of the Computer 38
39 Branch Instruction Design Why not blt, bge, etc? Hardware for <,, slower than =, Combining with branch involves more work per instruction, requiring a slower clock All instructions penalized! beq and bne are the common case This is a good design compromise Chapter 2 Instructions: Language of the Computer 39
40 Signed vs. Unsigned Signed comparison: slt, slti Unsigned comparison: sltu, sltui Example $s0 = $s1 = slt $t0, $s0, $s1 # signed 1 < +1 $t0 = 1 sltu $t0, $s0, $s1 # unsigned +4,294,967,295 > +1 $t0 = 0 Chapter 2 Instructions: Language of the Computer 40
41 The MIPS is a Load/Store RISC Only 2 types of instructions reference memory Load register from memory: LW, LB, LBU, etc. Store register to memory: SW, SB, etc. This restriction leads to a CPU design that is considerably simpler and faster. The MIPS is designed to work with a virtual memory system. The load/store feature simplifies the handling of page faults. More on this when we discuss the control unit.
42 Byte/Halfword Operations Could use bitwise operations MIPS byte/halfword load/store String processing is a common case lb rt, offset(rs) lh rt, offset(rs) Sign extend to 32 bits in rt lbu rt, offset(rs) lhu rt, offset(rs) Zero extend to 32 bits in rt sb rt, offset(rs) sh rt, offset(rs) Store just rightmost byte/halfword Chapter 2 Instructions: Language of the Computer 42
43 Example: EBCDIC E The EBCDIC for E is 0xC5 or A LB (load byte) instruction would treat this as a negative 8-bit number and sign extend it or 0xFFFF FFC5. A LBU (load unsigned byte) would treat this as a character and zero extend the value or 0x C5.
44 Value vs. Address Consider the following data declaration: L1:.word 7 # Decimal value 7 Suppose the assembler has located this at address 0x1000 7FF8. The instruction lw $a0, L1 would place the value 7 into register $a0. The instruction la $a0, L1 would place the value 0x1000 7FF8 into register $a0.
Chapter 2. Instructions: Language of the Computer. Adapted by Paulo Lopes
Chapter 2 Instructions: Language of the Computer Adapted by Paulo Lopes Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects
More informationInstructions: MIPS ISA. Chapter 2 Instructions: Language of the Computer 1
Instructions: MIPS ISA Chapter 2 Instructions: Language of the Computer 1 PH Chapter 2 Pt A Instructions: MIPS ISA Based on Text: Patterson Henessey Publisher: Morgan Kaufmann Edited by Y.K. Malaiya for
More informationChapter 2A Instructions: Language of the Computer
Chapter 2A Instructions: Language of the Computer Copyright 2009 Elsevier, Inc. All rights reserved. Instruction Set The repertoire of instructions of a computer Different computers have different instruction
More informationCOMPSCI 313 S Computer Organization. 7 MIPS Instruction Set
COMPSCI 313 S2 2018 Computer Organization 7 MIPS Instruction Set Agenda & Reading MIPS instruction set MIPS I-format instructions MIPS R-format instructions 2 7.1 MIPS Instruction Set MIPS Instruction
More informationCOMPUTER ORGANIZATION AND DESIGN
COMPUTER ORGANIZATION AND DESIGN 5 th The Hardware/Software Interface Edition Chapter 2 Instructions: Language of the Computer 2.1 Introduction Instruction Set The repertoire of instructions of a computer
More informationComputer Organization and Structure. Bing-Yu Chen National Taiwan University
Computer Organization and Structure Bing-Yu Chen National Taiwan University Instructions: Language of the Computer Operations and Operands of the Computer Hardware Signed and Unsigned Numbers Representing
More informationMIPS R-format Instructions. Representing Instructions. Hexadecimal. R-format Example. MIPS I-format Example. MIPS I-format Instructions
Representing Instructions Instructions are encoded in binary Called machine code MIPS instructions Encoded as 32-bit instruction words Small number of formats encoding operation code (opcode), register
More informationUnsigned Binary Integers
Unsigned Binary Integers Given an n-bit number x x n 1 n 2 1 0 n 12 xn 22 x12 x02 Range: 0 to +2 n 1 Example 2.4 Signed and Unsigned Numbers 0000 0000 0000 0000 0000 0000 0000 1011 2 = 0 + + 1 2 3 + 0
More informationUnsigned Binary Integers
Unsigned Binary Integers Given an n-bit number x x n 1 n 2 1 0 n 12 xn 22 x12 x02 Range: 0 to +2 n 1 Example 2.4 Signed and Unsigned Numbers 0000 0000 0000 0000 0000 0000 0000 1011 2 = 0 + + 1 2 3 + 0
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers
More informationComputer Architecture
CS3350B Computer Architecture Winter 2015 Lecture 4.2: MIPS ISA -- Instruction Representation Marc Moreno Maza www.csd.uwo.ca/courses/cs3350b [Adapted from lectures on Computer Organization and Design,
More informationCS3350B Computer Architecture MIPS Instruction Representation
CS3350B Computer Architecture MIPS Instruction Representation Marc Moreno Maza http://www.csd.uwo.ca/~moreno/cs3350_moreno/index.html Department of Computer Science University of Western Ontario, Canada
More informationComputer Organization and Structure. Bing-Yu Chen National Taiwan University
Computer Organization and Structure Bing-Yu Chen National Taiwan University Instructions: Language of the Computer Operations and Operands of the Computer Hardware Signed and Unsigned Numbers Representing
More informationLecture 2. Instructions: Language of the Computer (Chapter 2 of the textbook)
Lecture 2 Instructions: Language of the Computer (Chapter 2 of the textbook) Instructions: tell computers what to do Chapter 2 Instructions: Language of the Computer 2 Introduction Chapter 2.1 Chapter
More informationInstructions: Language of the Computer
Instructions: Language of the Computer Tuesday 22 September 15 Many slides adapted from: and Design, Patterson & Hennessy 5th Edition, 2014, MK and from Prof. Mary Jane Irwin, PSU Summary Previous Class
More informationChapter 2. Computer Abstractions and Technology. Lesson 4: MIPS (cont )
Chapter 2 Computer Abstractions and Technology Lesson 4: MIPS (cont ) Logical Operations Instructions for bitwise manipulation Operation C Java MIPS Shift left >>> srl Bitwise
More informationChapter 2. Instruction Set. RISC vs. CISC Instruction set. The University of Adelaide, School of Computer Science 18 September 2017
COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface RISC-V Edition Chapter 2 Instructions: Language of the Computer These slides are based on the slides by the authors. The slides doesn t
More informationChapter 1. Computer Abstractions and Technology. Lesson 3: Understanding Performance
Chapter 1 Computer Abstractions and Technology Lesson 3: Understanding Performance Manufacturing ICs 1.7 Real Stuff: The AMD Opteron X4 Yield: proportion of working dies per wafer Chapter 1 Computer Abstractions
More informationChapter 2. Instructions: Language of the Computer. HW#1: 1.3 all, 1.4 all, 1.6.1, , , , , and Due date: one week.
Chapter 2 Instructions: Language of the Computer HW#1: 1.3 all, 1.4 all, 1.6.1, 1.14.4, 1.14.5, 1.14.6, 1.15.1, and 1.15.4 Due date: one week. Practice: 1.5 all, 1.6 all, 1.10 all, 1.11 all, 1.14 all,
More informationArchitecture I. Computer Systems Laboratory Sungkyunkwan University
MIPS Instruction ti Set Architecture I Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Architecture (1) the attributes of a system as seen by the
More informationECE 154A Introduction to. Fall 2012
ECE 154A Introduction to Computer Architecture Fall 2012 Dmitri Strukov Lecture 4: Arithmetic and Data Transfer Instructions Agenda Review of last lecture Logic and shift instructions Load/store instructionsi
More informationEECS Computer Organization Fall Based on slides by the author and prof. Mary Jane Irwin of PSU.
EECS 2021 Computer Organization Fall 2015 Based on slides by the author and prof. Mary Jane Irwin of PSU. Chapter Summary Stored-program concept Assembly language Number representation Instruction representation
More informationCS3350B Computer Architecture
CS3350B Computer Architecture Winter 2015 Lecture 4.1: MIPS ISA: Introduction Marc Moreno Maza www.csd.uwo.ca/courses/cs3350b [Adapted d from lectures on Computer Organization and Design, Patterson & Hennessy,
More informationCS3350B Computer Architecture MIPS Introduction
CS3350B Computer Architecture MIPS Introduction Marc Moreno Maza http://www.csd.uwo.ca/~moreno/cs3350_moreno/index.html Department of Computer Science University of Western Ontario, Canada Thursday January
More informationENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design
ENGN1640: Design of Computing Systems Topic 03: Instruction Set Architecture Design Professor Sherief Reda http://scale.engin.brown.edu School of Engineering Brown University Spring 2014 Sources: Computer
More informationComputer Architecture. Lecture 2 : Instructions
Computer Architecture Lecture 2 : Instructions 1 Components of a Computer Hierarchical Layers of Program Code 3 Instruction Set The repertoire of instructions of a computer 2.1 Intr roduction Different
More informationMIPS Instruction Set Architecture (2)
MIPS Instruction Set Architecture (2) Jinkyu Jeong (jinkyu@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu EEE3050: Theory on Computer Architectures, Spring 2017, Jinkyu
More informationThomas Polzer Institut für Technische Informatik
Thomas Polzer tpolzer@ecs.tuwien.ac.at Institut für Technische Informatik Branch to a labeled instruction if a condition is true Otherwise, continue sequentially beq rs, rt, L1 if (rs == rt) branch to
More informationCSCI 402: Computer Architectures. Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI.
CSCI 402: Computer Architectures Instructions: Language of the Computer (3) Fengguang Song Department of Computer & Information Science IUPUI Recall Big endian, little endian Memory alignment Unsigned
More informationRechnerstrukturen. Chapter 2. Instructions: Language of the Computer
182.690 Rechnerstrukturen Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many
More informationEN164: Design of Computing Systems Lecture 09: Processor / ISA 2
EN164: Design of Computing Systems Lecture 09: Processor / ISA 2 Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Brown University
More informationLecture 4: MIPS Instruction Set
Lecture 4: MIPS Instruction Set No class on Tuesday Today s topic: MIPS instructions Code examples 1 Instruction Set Understanding the language of the hardware is key to understanding the hardware/software
More informationChapter 2: Instructions:
Chapter 2: Instructions: Language of the Computer Computer Architecture CS-3511-2 1 Instructions: To command a computer s hardware you must speak it s language The computer s language is called instruction
More informationChapter 2. Baback Izadi Division of Engineering Programs
Chapter 2 Baback Izadi Division of Engineering Programs bai@engr.newpaltz.edu Instruction Set Language of the Machine The repertoire of instructions of a computer Different computers have different instruction
More informationCISC 662 Graduate Computer Architecture. Lecture 4 - ISA MIPS ISA. In a CPU. (vonneumann) Processor Organization
CISC 662 Graduate Computer Architecture Lecture 4 - ISA MIPS ISA Michela Taufer http://www.cis.udel.edu/~taufer/courses Powerpoint Lecture Notes from John Hennessy and David Patterson s: Computer Architecture,
More informationCISC 662 Graduate Computer Architecture. Lecture 4 - ISA
CISC 662 Graduate Computer Architecture Lecture 4 - ISA Michela Taufer http://www.cis.udel.edu/~taufer/courses Powerpoint Lecture Notes from John Hennessy and David Patterson s: Computer Architecture,
More informationEN164: Design of Computing Systems Topic 03: Instruction Set Architecture Design
EN164: Design of Computing Systems Topic 03: Instruction Set Architecture Design Professor Sherief Reda http://scale.engin.brown.edu Electrical Sciences and Computer Engineering School of Engineering Brown
More informationComputer Architecture Computer Science & Engineering. Chapter 2. Instructions: Language of the Computer BK TP.HCM
Computer Architecture Computer Science & Engineering Chapter 2 Instructions: Language of the Computer Computer Component 25-Aug-16 Faculty of Computer Science & Engineering 2 Instruction execution process
More informationECE232: Hardware Organization and Design
ECE232: Hardware Organization and Design Lecture 4: Logic Operations and Introduction to Conditionals Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Overview Previously examined
More informationLECTURE 2: INSTRUCTIONS
LECTURE 2: INSTRUCTIONS Abridged version of Patterson & Hennessy (2013):Ch.2 Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many
More informationCSEE 3827: Fundamentals of Computer Systems
CSEE 3827: Fundamentals of Computer Systems Lecture 15 April 1, 2009 martha@cs.columbia.edu and the rest of the semester Source code (e.g., *.java, *.c) (software) Compiler MIPS instruction set architecture
More informationBranch Addressing. Jump Addressing. Target Addressing Example. The University of Adelaide, School of Computer Science 28 September 2015
Branch Addressing Branch instructions specify Opcode, two registers, target address Most branch targets are near branch Forward or backward op rs rt constant or address 6 bits 5 bits 5 bits 16 bits PC-relative
More informationELEC / Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2)
ELEC 5200-001/6200-001 Computer Architecture and Design Fall 2013 Instruction Set Architecture (Chapter 2) Victor P. Nelson, Professor & Asst. Chair Vishwani D. Agrawal, James J. Danaher Professor Department
More informationComputer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: MIPS Instruction Set Architecture
Computer Science 324 Computer Architecture Mount Holyoke College Fall 2009 Topic Notes: MIPS Instruction Set Architecture vonneumann Architecture Modern computers use the vonneumann architecture. Idea:
More informationCS222: MIPS Instruction Set
CS222: MIPS Instruction Set Dr. A. Sahu Dept of Comp. Sc. & Engg. Indian Institute of Technology Guwahati 1 Outline Previous Introduction to MIPS Instruction Set MIPS Arithmetic's Register Vs Memory, Registers
More informationTopic Notes: MIPS Instruction Set Architecture
Computer Science 220 Assembly Language & Comp. Architecture Siena College Fall 2011 Topic Notes: MIPS Instruction Set Architecture vonneumann Architecture Modern computers use the vonneumann architecture.
More informationCSCI 402: Computer Architectures
CSCI 402: Computer Architectures Instructions: Language of the Computer (2) Fengguang Song Department of Computer & Information Science IUPUI Memory Operands Two tribes: Big Endian: Most-significant byte
More informationLecture 5: Procedure Calls
Lecture 5: Procedure Calls Today s topics: Memory layout, numbers, control instructions Procedure calls 1 Memory Organization The space allocated on stack by a procedure is termed the activation record
More informationInstructions: Language of the Computer
CS359: Computer Architecture Instructions: Language of the Computer Yanyan Shen Department of Computer Science and Engineering 1 The Language a Computer Understands Word a computer understands: instruction
More informationMachine Language Instructions Introduction. Instructions Words of a language understood by machine. Instruction set Vocabulary of the machine
Machine Language Instructions Introduction Instructions Words of a language understood by machine Instruction set Vocabulary of the machine Current goal: to relate a high level language to instruction
More informationArchitecture II. Computer Systems Laboratory Sungkyunkwan University
MIPS Instruction ti Set Architecture II Jin-Soo Kim (jinsookim@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu Making Decisions (1) Conditional operations Branch to a
More informationCourse Administration
Fall 2017 EE 3613: Computer Organization Chapter 2: Instruction Set Architecture 2/4 Avinash Kodi Department of Electrical Engineering & Computer Science Ohio University, Athens, Ohio 45701 E-mail: kodi@ohio.edu
More informationControl Instructions. Computer Organization Architectures for Embedded Computing. Thursday, 26 September Summary
Control Instructions Computer Organization Architectures for Embedded Computing Thursday, 26 September 2013 Many slides adapted from: Computer Organization and Design, Patterson & Hennessy 4th Edition,
More informationControl Instructions
Control Instructions Tuesday 22 September 15 Many slides adapted from: and Design, Patterson & Hennessy 5th Edition, 2014, MK and from Prof. Mary Jane Irwin, PSU Summary Previous Class Instruction Set
More informationChapter 2. Instruction Set. The MIPS Instruction Set. Arithmetic Operations. Instructions: Language of the Computer
COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer
More informationChapter 2. Instructions:
Chapter 2 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS Arithmetic Instructions We ll be working with
More informationCENG3420 Lecture 03 Review
CENG3420 Lecture 03 Review Bei Yu byu@cse.cuhk.edu.hk 2017 Spring 1 / 38 CISC vs. RISC Complex Instruction Set Computer (CISC) Lots of instructions of variable size, very memory optimal, typically less
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language of the Computer Instruction Set The range of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers
More informationMIPS Instruction Set Architecture (1)
MIPS Instruction Set Architecture (1) Jinkyu Jeong (jinkyu@skku.edu) Computer Systems Laboratory Sungkyunkwan University http://csl.skku.edu EEE3050: Theory on Computer Architectures, Spring 2017, Jinkyu
More informationStored Program Concept. Instructions: Characteristics of Instruction Set. Architecture Specification. Example of multiple operands
Stored Program Concept Instructions: Instructions are bits Programs are stored in memory to be read or written just like data Processor Memory memory for data, programs, compilers, editors, etc. Fetch
More informationMachine Instructions - II. Hwansoo Han
Machine Instructions - II Hwansoo Han Conditional Operations Instructions for making decisions Alter the control flow - change the next instruction to be executed Branch to a labeled instruction if a condition
More informationComputer Architecture
Computer Architecture Chapter 2 Instructions: Language of the Computer Fall 2005 Department of Computer Science Kent State University Assembly Language Encodes machine instructions using symbols and numbers
More informationECE232: Hardware Organization and Design. Computer Organization - Previously covered
ECE232: Hardware Organization and Design Part 6: MIPS Instructions II http://www.ecs.umass.edu/ece/ece232/ Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Computer Organization
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language g of the Computer Outlines Introduction to MIPS machine Operations of the Computer HW Operands of the Computer HW Representing instructions in the Computer Logical Operations
More informationChapter 2. Instructions: Language of the Computer. Jiang Jiang
Chapter 2 Instructions: Language of the Computer Jiang Jiang jiangjiang@ic.sjtu.edu.cn [Adapted from Computer Organization and Design, 4 th Edition, Patterson & Hennessy, 2008, MK] Chapter 2 Instructions:
More informationReduced Instruction Set Computer (RISC)
Reduced Instruction Set Computer (RISC) Reduced Instruction Set Computer (RISC) Focuses on reducing the number and complexity of instructions of the machine. Reduced number of cycles needed per instruction.
More informationComputer Organization MIPS ISA
CPE 335 Computer Organization MIPS ISA Dr. Iyad Jafar Adapted from Dr. Gheith Abandah Slides http://www.abandah.com/gheith/courses/cpe335_s08/index.html CPE 232 MIPS ISA 1 (vonneumann) Processor Organization
More informationReduced Instruction Set Computer (RISC)
Reduced Instruction Set Computer (RISC) Focuses on reducing the number and complexity of instructions of the ISA. RISC Goals RISC: Simplify ISA Simplify CPU Design Better CPU Performance Motivated by simplifying
More informationChapter 1. Computer Abstractions and Technology
Chapter 1 Computer Abstractions and Technology The Computer Revolution Progress in computer technology Underpinned by Moore s Law Makes novel applications feasible Computers in automobiles Cell phones
More informationCENG3420 L03: Instruction Set Architecture
CENG3420 L03: Instruction Set Architecture Bei Yu byu@cse.cuhk.edu.hk (Latest update: January 31, 2018) Spring 2018 1 / 49 Overview Introduction Arithmetic & Logical Instructions Data Transfer Instructions
More informationToday s topics. MIPS operations and operands. MIPS arithmetic. CS/COE1541: Introduction to Computer Architecture. A Review of MIPS ISA.
Today s topics CS/COE1541: Introduction to Computer Architecture MIPS operations and operands MIPS registers Memory view Instruction encoding A Review of MIPS ISA Sangyeun Cho Arithmetic operations Logic
More informationCharacter Is a byte quantity (00~FF or 0~255) ASCII (American Standard Code for Information Interchange) Page 91, Fig. 2.21
2.9 Communication with People: Byte Data & Constants Character Is a byte quantity (00~FF or 0~255) ASCII (American Standard Code for Information Interchange) Page 91, Fig. 2.21 32: space 33:! 34: 35: #...
More informationComputer Architecture. MIPS Instruction Set Architecture
Computer Architecture MIPS Instruction Set Architecture Instruction Set Architecture An Abstract Data Type Objects Registers & Memory Operations Instructions Goal of Instruction Set Architecture Design
More informationComputer Science 324 Computer Architecture Mount Holyoke College Fall Topic Notes: MIPS Instruction Set Architecture
Computer Science 324 Computer Architecture Mount Holyoke College Fall 2007 Topic Notes: MIPS Instruction Set Architecture vonneumann Architecture Modern computers use the vonneumann architecture. Idea:
More informationReview. Lecture #9 MIPS Logical & Shift Ops, and Instruction Representation I Logical Operators (1/3) Bitwise Operations
CS6C L9 MIPS Logical & Shift Ops, and Instruction Representation I () inst.eecs.berkeley.edu/~cs6c CS6C : Machine Structures Lecture #9 MIPS Logical & Shift Ops, and Instruction Representation I 25-9-28
More informationLevels of Programming. Registers
Levels of Programming COSC 2021: Computer Organization Instructor: Dr. Amir Asif Department of Computer Science York University Handout # 3: MIPS Instruction Set I Topics: 1. Arithmetic Instructions 2.
More informationChapter 2. Instruction Set Architecture (ISA)
Chapter 2 Instruction Set Architecture (ISA) MIPS arithmetic Design Principle: simplicity favors regularity. Why? Of course this complicates some things... C code: A = B + C + D; E = F - A; MIPS code:
More informationChapter 2. Instructions: Language of the Computer
Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers
More informationMACHINE LANGUAGE. To work with the machine, we need a translator.
LECTURE 2 Assembly MACHINE LANGUAGE As humans, communicating with a machine is a tedious task. We can t, for example, just say add this number and that number and store the result here. Computers have
More informationChapter 3. Instructions:
Chapter 3 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive e.g., MIPS Arithmetic Instructions We ll be working with
More informationAssembly Language Programming. CPSC 252 Computer Organization Ellen Walker, Hiram College
Assembly Language Programming CPSC 252 Computer Organization Ellen Walker, Hiram College Instruction Set Design Complex and powerful enough to enable any computation Simplicity of equipment MIPS Microprocessor
More informationProcedure Calling. Procedure Calling. Register Usage. 25 September CSE2021 Computer Organization
CSE2021 Computer Organization Chapter 2: Part 2 Procedure Calling Procedure (function) performs a specific task and return results to caller. Supporting Procedures Procedure Calling Calling program place
More informationEEM 486: Computer Architecture. Lecture 2. MIPS Instruction Set Architecture
EEM 486: Computer Architecture Lecture 2 MIPS Instruction Set Architecture EEM 486 Overview Instruction Representation Big idea: stored program consequences of stored program Instructions as numbers Instruction
More informationCOMPUTER ORGANIZATION AND DESIGN. 5 th Edition. The Hardware/Software Interface. Chapter 2. Instructions: Language of the Computer
COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers
More informationChapter 3 MIPS Assembly Language. Ó1998 Morgan Kaufmann Publishers 1
Chapter 3 MIPS Assembly Language Ó1998 Morgan Kaufmann Publishers 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive
More information5/17/2012. Recap from Last Time. CSE 2021: Computer Organization. The RISC Philosophy. Levels of Programming. Stored Program Computers
CSE 2021: Computer Organization Recap from Last Time load from disk High-Level Program Lecture-2 Code Translation-1 Registers, Arithmetic, logical, jump, and branch instructions MIPS to machine language
More informationRecap from Last Time. CSE 2021: Computer Organization. Levels of Programming. The RISC Philosophy 5/19/2011
CSE 2021: Computer Organization Recap from Last Time load from disk High-Level Program Lecture-3 Code Translation-1 Registers, Arithmetic, logical, jump, and branch instructions MIPS to machine language
More informationInstruction Set. The MIPS Instruction Set. Chapter 2
COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition 1 Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers
More informationCOMPUTER ORGANIZATION AND DESIGN. 5 th Edition. The Hardware/Software Interface. Chapter 2. Instructions: Language of the Computer
COMPUTER ORGANIZATION AND DESIGN The Hardware/Software Interface 5 th Edition Chapter 2 Instructions: Language of the Computer Instruction Set The repertoire of instructions of a computer Different computers
More informationECE232: Hardware Organization and Design
ECE232: Hardware Organization and Design Lecture 2: Hardware/Software Interface Adapted from Computer Organization and Design, Patterson & Hennessy, UCB Overview Basic computer components How does a microprocessor
More informationEEC 581 Computer Architecture Lecture 1 Review MIPS
EEC 581 Computer Architecture Lecture 1 Review MIPS 1 Supercomputing: Suddenly Fancy 2 1 Instructions: Language of the Machine More primitive than higher level languages e.g., no sophisticated control
More informationISA and RISCV. CASS 2018 Lavanya Ramapantulu
ISA and RISCV CASS 2018 Lavanya Ramapantulu Program Program =?? Algorithm + Data Structures Niklaus Wirth Program (Abstraction) of processor/hardware that executes 3-Jul-18 CASS18 - ISA and RISCV 2 Program
More informationStored Program Concept. Instructions: Characteristics of Instruction Set. Architecture Specification. Example of multiple operands
Stored Program Concept nstructions: nstructions are bits Programs are stored in memory to be read or written just like data Processor Memory memory for data, programs, compilers, editors, etc. Fetch &
More informationMIPS%Assembly% E155%
MIPS%Assembly% E155% Outline MIPS Architecture ISA Instruction types Machine codes Procedure call Stack 2 The MIPS Register Set Name Register Number Usage $0 0 the constant value 0 $at 1 assembler temporary
More informationInstructions: Assembly Language
Chapter 2 Instructions: Assembly Language Reading: The corresponding chapter in the 2nd edition is Chapter 3, in the 3rd edition it is Chapter 2 and Appendix A and in the 4th edition it is Chapter 2 and
More informationOverview. Introduction to the MIPS ISA. MIPS ISA Overview. Overview (2)
Introduction to the MIPS ISA Overview Remember that the machine only understands very basic instructions (machine instructions) It is the compiler s job to translate your high-level (e.g. C program) into
More informationInstructions: MIPS arithmetic. MIPS arithmetic. Chapter 3 : MIPS Downloaded from:
Instructions: Chapter 3 : MIPS Downloaded from: http://www.cs.umr.edu/~bsiever/cs234/ Language of the Machine More primitive than higher level languages e.g., no sophisticated control flow Very restrictive
More informationCSE 141 Computer Architecture Spring Lecture 3 Instruction Set Architecute. Course Schedule. Announcements
CSE141: Introduction to Computer Architecture CSE 141 Computer Architecture Spring 2005 Lecture 3 Instruction Set Architecute Pramod V. Argade April 4, 2005 Instructor: TAs: Pramod V. Argade (p2argade@cs.ucsd.edu)
More informationComputer Architecture. The Language of the Machine
Computer Architecture The Language of the Machine Instruction Sets Basic ISA Classes, Addressing, Format Administrative Matters Operations, Branching, Calling conventions Break Organization All computers
More informationAnnouncements HW1 is due on this Friday (Sept 12th) Appendix A is very helpful to HW1. Check out system calls
Announcements HW1 is due on this Friday (Sept 12 th ) Appendix A is very helpful to HW1. Check out system calls on Page A-48. Ask TA (Liquan chen: liquan@ece.rutgers.edu) about homework related questions.
More information