UNIT 2 THE 8051 INSTRUCTION SET AND PROGRAMMING
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- Beverley Nelson
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1 UNIT 2 THE 8051 INSTRUCTION SET AND PROGRAMMING
2 Instructions Alphabetical List of Instructions ACALL: Absolute Call ADD, ADDC: Add Accumulator (With Carry) AJMP: Absolute Jump ANL: Bitwise AND CJNE: Compare and Jump if Not Equal CLR: Clear Register CPL: Complement Register DA: Decimal Adjust DEC: Decrement Register DIV: Divide Accumulator by B DJNZ: Decrement Register and Jump if Not Zero INC: Increment Register JB: Jump if Bit Set JBC: Jump if Bit Set and Clear Bit JC: Jump if Carry Set JMP: Jump to Address JNB: Jump if Bit Not Set JNC: Jump if Carry Not Set JNZ: Jump if Accumulator Not Zero JZ: Jump if Accumulator Zero LCALL: Long Call LJMP: Long Jump MOV: Move Memory MOVC: Move Code Memory MOVX: Move Extended Memory MUL: Multiply Accumulator by B NOP: No Operation ORL: Bitwise OR POP: Pop Value From Stack PUSH: Push Value Onto Stack 2
3 RET: Return From Subroutine RETI: Return From Interrupt RL: Rotate Accumulator Left RLC: Rotate Accumulator Left Through Carry RR: Rotate Accumulator Right RRC: Rotate Accumulator Right Through Carry SETB: Set Bit SJMP: Short Jump SUBB: Subtract From Accumulator With Borrow SWAP: Swap Accumulator Nibbles XCH: Exchange Bytes XCHD: Exchange Digits XRL: Bitwise Exclusive OR Undefined: Undefined Instruction Operation: ACALL Absolute Call Within 2K Block ACALL code address Description: ACALL unconditionally calls a subroutine at the indicated code address. ACALL pushes the address of the instruction that follows ACALL onto the stack, least-significant-byte first, most-significant-byte second. The Program Counter is then updated so that program execution continues at the indicated address. The new value for the Program Counter is calculated by replacing the leastsignificant-byte of the Program Counter with the second byte of the ACALL instruction, and replacing bits 0-2 of the most-significant-byte of the Program Counter with 3 bits that indicate the page. Bits 3-7 of the most-significant-byte of the Program Counter remain unchaged. Since only 11 bits of the Program Counter are affected by ACALL, calls may only be made to routines located within the same 2k block as the first byte that follows ACALL. 3
4 Operation: ADD, ADDC Add Accumulator, Add Accumulator With Carry ADD A,operand ADDC A,operand Description: Description: ADD and ADDC both add the value operand to the value of the Accumulator, leaving the resulting value in the Accumulator. The value operand is not affected. ADD and ADDC function identically except that ADDC adds the value of operand as well as the value of the Carry flag whereas ADD does not add the Carry flag to the result. The Carry bit (C) is set if there is a carry-out of bit 7. In other words, if the unsigned summed value of the Accumulator, operand and (in the case of ADDC) the Carry flag exceeds 255 Carry is set. Otherwise, the Carry bit is cleared. The Auxillary Carry (AC ) bit is set if there is a carry-out of bit 3. In other words, if the unsigned summed value of the low nibble of the Accumulator, operand and (in the case of ADDC) the Carry flag exceeds 15 the Auxillary Carry flag is set. Otherwise, the Auxillary Carry flag is cleared. The Overflow (OV) bit is set if there is a carry-out of bit 6 or out of bit 7, but not both. In other words, if the addition of the Accumulator, operand and (in the case of ADDC) the Carry flag treated as signed values results in a value that is out of the range of a signed byte (-128 through +127) the Overflow flag is set. Otherwise, the Overflow flag is cleared. Operation: AJMP Absolute Jump Within 2K Block AJMP code address Description: AJMP unconditionally jumps to the indicated code address. The new value for the Program Counter is calculated by replacing the least-significant-byte of the Program Counter with the second byte of the AJMP instruction, and replacing bits 0-2 of the most-significant-byte of the Program Counter with 3 bits that indicate 4
5 the page of the byte following the AJMP instruction. Bits 3-7 of the most-significantbyte of the Program Counter remain unchaged. Since only 11 bits of the Program Counter are affected by AJMP, jumps may only be made to code located within the same 2k block as the first byte that follows AJMP. Operation: ANL Bitwise AND ANL operand1, operand2 Description: ANL does a bitwise "AND" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "AND" compares the bits of each operand and sets the corresponding bit in the resulting byte only if the bit was set in both of the original operands, otherwise the resulting bit is cleared Operation: CJNE Compare and Jump If Not Equal CJNE operand1,operand2,reladdr Description: CJNE compares the value of operand1 and operand2 and branches to the indicated relative address if operand1 and operand2 are not equal. If the two operands are equal program flow continues with the instruction following the CJNE instruction. The Carry bit (C) is set if operand1 is less than operand2, otherwise it is cleared. Operation: CLR Clear Register CLR register 5
6 Description: CLR clears (sets to 0) all the bit(s) of the indicated register. If the register is a bit (including the carry bit), only the specified bit is affected. Clearing the Accumulator sets the Accumulator s value to 0. Operation: CPL Complement Register CPL operand Description: CPL complements operand, leaving the result in operand. If operand is a single bit then the state of the bit will be reversed. If operand is the Accumulator then all the bits in the Accumulator will be reversed. This can be thought of as "Accumulator Logical Exclusive OR 255" or as "255-Accumulator." If the operand refers to a bit of an output Port, the value that will be complemented is based on the last value written to that bit, not the last value read from it. Operation: DA Decimal Adjust Accumulator DA A Description: DA adjusts the contents of the Accumulator to correspond to a BCD (Binary Coded Decimal) number after two BCD numbers have been added by the ADD or ADDC instruction. If the carry bit is set or if the value of bits 0-3 exceed 9, 0x06 is added to the accumulator. If the carry bit was set when the instruction began, or if 0x06 was added to the accumulator in the first step, 0x60 is added to the accumulator. The Carry bit (C) is set if the resulting value is greater than 0x99, otherwise it is cleared. Operation: DEC Decrement Register DEC register 6
7 Description: DEC decrements the value of register by 1. If the initial value of register is 0, decrementing the value will cause it to reset to 255 (0xFF Hex). Note: The Carry Flag is NOT set when the value "rolls over" from 0 to 255. Operation: DIV Divide Accumulator by B DIV AB Instructions OpCode Bytes Cycles Flags DIV AB 0x C, OV Description: Divides the unsigned value of the Accumulator by the unsigned value of the "B" register. The resulting quotient is placed in the Accumulator and the remainder is placed in the "B" register. The Carry flag (C) is always cleared. The Overflow flag (OV) is set if division by 0 was attempted, otherwise it is cleared. Operation: DJNZ Decrement and Jump if Not Zero DJNZ register,reladdr Description: DJNZ decrements the value of register by 1. If the initial value of register is 0, decrementing the value will cause it to reset to 255 (0xFF Hex). If the new value of register is not 0 the program will branch to the address indicated by relative addr. If the new value of register is 0 program flow continues with the instruction following the DJNZ instruction. Operation: INC Increment Register INC register 7
8 Description: INC increments the value of register by 1. If the initial value of register is 255 (0xFF Hex), incrementing the value will cause it to reset to 0. Note: The Carry Flag is NOT set when the value "rolls over" from 255 to 0. In the case of "INC DPTR", the value two-byte unsigned integer value of DPTR is incremented. If the initial value of DPTR is (0xFFFF Hex), incrementing the value will cause it to reset to 0. Again, the Carry Flag is NOT set when the value of DPTR "rolls over" from to 0. Operation: JB Jump if Bit Set JB bit addr, reladdr Instructions OpCode Bytes Cycles Flags JB bit addr,reladdr 0x None Description: JB branches to the address indicated by reladdr if the bit indicated by bit addr is set. If the bit is not set program execution continues with the instruction following the JB instruction. Operation: JBC Jump if Bit Set and Clear Bit JB bit addr, reladdr Instructions OpCode Bytes Cycles Flags JBC bit addr,reladdr 0x None Description: JBC will branch to the address indicated by reladdr if the bit indicated by bit addr is set. Before branching to reladdr the instruction will clear the indicated bit. If the bit is not set program execution continues with the instruction following the JBC instruction 8
9 Operation: JC Jump if Carry Set JC reladdr Instructions OpCode Bytes Cycles Flags JC reladdr 0x None Description: JC will branch to the address indicated by reladdr if the Carry Bit is set. If the Carry Bit is not set program execution continues with the instruction following the JC instruction. Operation: JMP Jump to Data Pointer + Accumulator Instructions OpCode Bytes Cycles Flags 0x None Description: JMP jumps unconditionally to the address represented by the sum of the value of DPTR and the value of the Accumulator Operation: JNB Jump if Bit Not Set JNB bit addr,reladdr Instructions OpCode Bytes Cycles Flags JNB bit addr,reladdr 0x None 9
10 Description: JNB will branch to the address indicated by reladdress if the indicated bit is not set. If the bit is set program execution continues with the instruction following the JNB instruction. Operation: JNC Jump if Carry Not Set JNC reladdr Instructions OpCode Bytes Cycles Flags JNC reladdr 0x None Description: JNC branches to the address indicated by reladdr if the carry bit is not set. If the carry bit is set program execution continues with the instruction following the JNB instruction. Operation: JNZ Jump if Accumulator Not Zero JNZ reladdr Instructions OpCode Bytes Cycles Flags JNZ reladdr 0x None Description: JNZ will branch to the address indicated by reladdr if the Accumulator contains any value except 0. If the value of the Accumulator is zero program execution continues with the instruction following the JNZ instruction. Operation: JZ Jump if Accumulator Zero JZ reladdr Instructions OpCode Bytes Cycles Flags JZ reladdr 0x None 10
11 Description: JZ branches to the address indicated by reladdr if the Accumulator contains the value 0. If the value of the Accumulator is non-zero program execution continues with the instruction following the JZ instruction. Operation: LCALL Long Call LCALL code addr Instructions OpCode Bytes Cycles Flags LCALL code addr 0x None Description: LCALL calls a program subroutine. LCALL increments the program counter by 3 (to point to the instruction following LCALL) and pushes that value onto the stack (low byte first, high byte second). The Program Counter is then set to the 16-bit value which follows the LCALL opcode, causing program execution to continue at that address. Operation: LJMP Long Jump LJMP code addr Instructions OpCode Bytes Cycles Flags LJMP code addr 0x None Description: LJMP jumps unconditionally to the specified code addr. Operation: MOV Move Memory MOV operand1,operand2 11
12 Description: MOV copies the value of operand2 into operand1. The value of operand2 is not affected. Both operand1 and operand2 must be in Internal RAM. No flags are affected unless the instruction is moving the value of a bit into the carry bit in which case the carry bit is affected or unless the instruction is moving a value into the PSW register (which contains all the program flags). ** Note: In the case of "MOV iram addr,iram addr", the operand bytes of the instruction are stored in reverse order. That is, the instruction consisting of the bytes 0x85, 0x20, 0x50 means "Move the contents of Internal RAM location 0x20 to Internal RAM location 0x50" whereas the opposite would be generally presumed. Operation: MOVC Move Code Byte to Accumulator MOVC A,@A+register Instructions OpCode Bytes Cycles Flags MOVC A,@A+DPTR 0x None MOVC A,@A+PC 0x None Description: MOVC moves a byte from Code Memory into the Accumulator. The Code Memory address from which the byte will be moved is calculated by summing the value of the Accumulator with either DPTR or the Program Counter (PC). In the case of the Program Counter, PC is first incremented by 1 before being summed with the Accumulator. Operation: MOVX Move Data To/From External Memory (XRAM) MOVX operand1,operand2 Instructions OpCode Bytes Cycles Flags 0xF0 1 2 None 0xF2 1 2 None 12
13 0xF3 1 2 None MOVX A,@DPTR 0xE0 1 2 None MOVX A,@R0 0xE2 1 2 None MOVX A,@R1 0xE3 1 2 None Description: MOVX moves a byte to or from External Memory into or from the Accumulator. If operand1 the Accumulator is moved to the 16-bit External Memory address indicated by DPTR. This instruction uses both P0 (port 0) and P2 (port 2) to output the 16-bit address and data. If operand2 is DPTR then the byte is moved from External Memory into the Accumulator. If operand1 the Accumulator is moved to the 8-bit External Memory address indicated by the specified Register. This instruction uses only P0 (port 0) to output the 8-bit address and data. P2 (port 2) is not affected. If operand2 then the byte is moved from External Memory into the Accumulator. Operation: MUL Multiply Accumulator by B MUL AB Instructions OpCode Bytes Cycles Flags MUL AB 0xA4 1 4 C, OV Description: Multiples the unsigned value of the Accumulator by the unsigned value of the "B" register. The least significant byte of the result is placed in the Accumulator and the most-significant-byte is placed in the "B" register. The Carry Flag (C) is always cleared. The Overflow Flag (OV) is set if the result is greater than 255 (if the most-significant byte is not zero), otherwise it is cleared. 13
14 Operation: NOP None, waste time No Operation Instructions OpCode Bytes Cycles Flags NOP 0x None Description: NOP, as it s name suggests, causes No Operation to take place for one machine cycle. NOP is generally used only for timing purposes. Absolutely no flags or registers are affected. Operation: ORL Bitwise OR ORL operand1,operand2 Description: ORL does a bitwise "OR" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "OR" compares the bits of each operand and sets the corresponding bit in the resulting byte if the bit was set in either of the original operands, otherwise the resulting bit is cleared. Operation: POP Pop Value From Stack POP Instructions OpCode Bytes Cycles Flags POP iram addr 0xD0 2 2 None Description: POP "pops" the last value placed on the stack into the iram addr specified. In other words, POP will load iram addr with the value of the Internal 14
15 RAM address pointed to by the current Stack Pointer. The stack pointer is then decremented by 1. Operation: PUSH Push Value Onto Stack PUSH Instructions OpCode Bytes Cycles Flags PUSH iram addr 0xC0 2 2 None Description: PUSH "pushes" the value of the specified iram addr onto the stack. PUSH first increments the value of the Stack Pointer by 1, then takes the value stored in iram addr and stores it in Internal RAM at the location pointed to by the incremented Stack Pointer. Operation: RET Return From Subroutine RET Instructions OpCode Bytes Cycles Flags RET 0x None Description: RET is used to return from a subroutine previously called by LCALL or ACALL. Program execution continues at the address that is calculated by popping the topmost 2 bytes off the stack. The most-significant-byte is popped off the stack first, followed by the least-significant-byte. Operation: RETI Return From Interrupt RETI 15
16 Instructions OpCode Bytes Cycles Flags RETI 0x None Description: RETI is used to return from an interrupt service routine. RETI first enables interrupts of equal and lower priorities to the interrupt that is terminating. Program execution continues at the address that is calculated by popping the topmost 2 bytes off the stack. The most-significant-byte is popped off the stack first, followed by the least-significant-byte. RETI functions identically to RET if it is executed outside of an interrupt service routine. Operation: RL Rotate Accumulator Left RL A Instructions OpCode Bytes Cycles Flags RL A 0x C Description: Shifts the bits of the Accumulator to the left. The left-most bit (bit 7) of the Accumulator is loaded into bit 0. Operation: RLC Rotate Accumulator Left Through Carry RLC A Instructions OpCode Bytes Cycles Flags RLC A 0x C Description: Shifts the bits of the Accumulator to the left. The left-most bit (bit 7) of the Accumulator is loaded into the Carry Flag, and the original Carry Flag is loaded 16
17 into bit 0 of the Accumulator. This function can be used to quickly multiply a byte by 2. Operation: RR Rotate Accumulator Right RR A Instructions OpCode Bytes Cycles Flags RR A 0x None Description: Shifts the bits of the Accumulator to the right. The right-most bit (bit 0) of the Accumulator is loaded into bit 7. Operation: RRC Rotate Accumulator Right Through Carry RRC A Instructions OpCode Bytes Cycles Flags RRC A 0x C Description: Shifts the bits of the Accumulator to the right. The right-most bit (bit 0) of the Accumulator is loaded into the Carry Flag, and the original Carry Flag is loaded into bit 7. This function can be used to quickly divide a byte by 2. Operation: SETB Set Bit SETB bit addr Instructions OpCode Bytes Cycles Flags SETB C 0xD3 1 1 C SETB bit addr 0xD2 2 1 None 17
18 Description: Sets the specified bit. Operation: SJMP Short Jump SJMP reladdr Instructions OpCode Bytes Cycles Flags SJMP reladdr 0x None Description: SJMP jumps unconditionally to the address specified reladdr. Reladdr must be within -128 or +127 bytes of the instruction that follows the SJMP instruction. Operation: SUBB Subtract from Accumulator With Borrow SUBB A,operand Description: SUBB subtract the value of operand from the value of the Accumulator, leaving the resulting value in the Accumulator. The value operand is not affected. The Carry Bit (C) is set if a borrow was required for bit 7, otherwise it is cleared. In other words, if the unsigned value being subtracted is greater than the Accumulator the Carry Flag is set. The Auxillary Carry (AC) bit is set if a borrow was required for bit 3, otherwise it is cleared. In other words, the bit is set if the low nibble of the value being subtracted was greater than the low nibble of the Accumulator. The Overflow (OV) bit is set if a borrow was required for bit 6 or for bit 7, but not both. In other words, the subtraction of two signed bytes resulted in a value outside the range of a signed byte (-128 to 127). Otherwise it is cleared. 18
19 Operation: SWAP Swap Accumulator Nibbles SWAP A Instructions OpCode Bytes Cycles Flags SWAP A 0xC4 1 1 None Description: SWAP swaps bits 0-3 of the Accumulator with bits 4-7 of the Accumulator. This instruction is identical to executing "RR A" or "RL A" four times. Operation: XCH Exchange Bytes XCH A,register Description: Exchanges the value of the Accumulator with the value contained in register Operation: XCHD Exchange Digit XCHD A,[@R0/@R1] Instructions OpCode Bytes Cycles Flags XCHD A,@R0 0xD6 1 1 None XCHD A,@R1 0xD7 1 1 None Description: Exchanges bits 0-3 of the Accumulator with bits 0-3 of the Internal RAM address pointed to indirectly by R0 or R1. Bits 4-7 of each register are unaffected. 19
20 Operation: XRL Bitwise Exclusive OR XRL operand1,operand2 Description: XRL does a bitwise "EXCLUSIVE OR" operation between operand1 and operand2, leaving the resulting value in operand1. The value of operand2 is not affected. A logical "EXCLUSIVE OR" compares the bits of each operand and sets the corresponding bit in the resulting byte if the bit was set in either (but not both) of the original operands, otherwise the bit is cleared. Operation: Undefined Instruction??? Undefined Instructions OpCode Bytes Cycles Flags??? 0xA5 1 1 C Description: The "Undefined" instruction is, as the name suggests, not a documented instruction. The 8051 supports 255 instructions and OpCode 0xA5 is the single OpCode that is not used by any documented function. Since it is not documented nor defined it is not recommended that it be executed. However, based on my research, executing this undefined instruction takes 1 machine cycle and appears to have no effect on the system except that the Carry Bit always seems to be set. 20
21 PROGRAMMING Show the status of the CY, AC and P flag after the addition of 9CH and 64H in the following instructions. MOV A, #9CH ADD A, #64H ;after the addition A=00H, CY=1 Solution: 9C CY = 1 since there is a carry beyond the D7 bit AC = 1 since there is a carry from the D3 to the D4 bi P = 0 since the accumulator has an even number of 1s (it has zero 1s) Show the stack and stack pointer from the following. Assume the default stack area. MOV R6, #25H MOV R1, #12H MOV R4, #0F3H PUSH 6 PUSH 1 PUSH 4 21
22 Example Examining the stack, show the contents of the register and SP after execution of the following instructions. All value are in hex. MOV SP, #5FH ;make RAM location 60H ;first stack location MOV R2, #25H MOV R1, #12H MOV R4, #0F3H PUSH 2 PUSH 1 PUSH 4 Write a program to (a) load the accumulator with the value 55H, and (b) complement the ACC 700 times MOV A,#55H ;A=55H MOV R3,#10 ;R3=10, outer loop count NEXT: MOV R2,#70 ;R2=70, inner loop count AGAIN: CPL A ;complement A register DJNZ R2,AGAIN ;repeat it 70 times DJNZ R3,NE 22
23 Find the period of the machine cycle for MHz crystal frequency Solution: /12 = khz; machine cycle is 1/921.6 khz = s For 8051 system of MHz, find how long it takes to execute each instruction. (a) MOV R3,#55 (b) DEC R3 (c) DJNZ R2 target (d) LJMP (e) SJMP (f) NOP (g) MUL AB Solution: Machine cycles Time to execute (a) 1 1x1.085 s s (b) 1 1x1.085 s s (c) 2 2x1.085 s 2.17 s (d) 2 2x1.085 s 2.17 s (e) 2 2x1.085 s 2.17 s (f) 1 1x1.085 s s (g) 4 4x1.085 s 4.34 s Find the size of the delay in following program, if the crystal frequency is MHz. MOV A,#55H AGAIN: MOV P1,A ACALL DELAY CPL A SJMP AGAIN ;---time delay------delay: MOV R3,#200 23
24 HERE: DJNZ R3,HERE RET Solution: Machine cycle DELAY: MOV R3,#200 1 HERE: DJNZ R3,HERE 2 RET 2 Therefore, [(200x2)+1+2]x1.085 s s. Find the size of the delay in following program, if the crystal frequency is MHz. Machine Cycle DELAY: MOV R3,#250 1 HERE: NOP 1 NOP 1 NOP 1 NOP 1 DJNZ R3,HERE 2 RET 2 Solution: The time delay inside HERE loop is [250( )]x1.085 s s. Adding the two instructions outside loop we have s + 3 x s s Find the size of the delay in following program, if the crystal frequency is MHz. Machine Cycle DELAY: MOV R2,#
25 AGAIN: MOV R3,#250 1 HERE: NOP 1 NOP 1 DJNZ R3,HERE 2 DJNZ R2,AGAIN 2 RET 2 Solution: For HERE loop, we have (4x250)x1.085 s 1085 s. For AGAIN loop repeats HERE loop 200 times, so we have 200x1085 s s. But MOV R3,#250 and DJNZ R2,AGAIN at the start and end of the AGAIN loop add (3x200x1.805)=651 s. As a result we have = s. PORT PROGRAMMING The following code will continuously send out to port 0 the alternating value 55H and AAH BACK: MOV A,#55H MOV P0,A ACALL DELAY MOV A,#0AAH MOV P0,A ACALL DELAY SJMP BACK Port 0 is configured first as an input port by writing 1s to it, and then data is received from that port and sent to P1 MOV A,#0FFH ;A=FF hex 25
26 BACK: MOV P0,A ;make P0 an i/p port ;by writing it all 1s MOV A,P0 ;get data from P0 MOV P1,A ;send it to port 1 SJMP BACK ;keep doing it Write the following programs. Create a square wave of 50% duty cycle on bit 0 of port 1. Solution: The 50% duty cycle means that the on and off state (or the high and low portion of the pulse) have the same length. Therefore, we toggle P1.0 with a time delay in between each state. Another way to write the above program is: Sometimes we need to access only 1 for 2 bits of the port 26
27 Write a program to perform the following: (a) Keep monitoring the P1.2 bit until it becomes high (b) When P1.2 becomes high, write value 45H to port 0 (c) Send a high-to-low (H-to-L) pulse to P2.3 27
28 The look-up table allows access to elements of a frequently used table with minimum operations Write a program to get the x value from P1 and send x2 to P2, continuously 28
29 While there are instructions such as JNC and JC to check the carry flag bit (CY), there are no such instructions for the overflow flag bit (OV). How would you write code to check OV? Assume that RAM locations 40 44H have the following values. Write a program to find the sum of the values. At the end of the 29
30 program, register A should contain the low byte and R7 the high byte. 40 = (7D) 41 = (EB) 42 = (C5) 43 = (5B) 44 = (30) Write a program to add two 16-bit numbers. Place the sum in R7 and R6; R6 should have the lower byte. (a) Write a program to get hex data in the range of 00 FFH from 30
31 port 1 and convert it to decimal. Save it in R7, R6 and R5. (b) Assuming that P1 has a value of FDH for data, analyze program. (b) To convert a binary (hex) value to decimal, we divide it by 10 repeatedly until the quotient is less than 10. After each division the remainder is saves. Therefore, we have FDH=253. Write a program that finds the number of 1s in a given byte. 31
32 Write a program to transfer value 41H serially (one bit at a time) via pin P2.1. Put two highs at the start and end of the data. Send the byte LSB first. Write a program to bring in a byte of data serially one bit at a time via pin P2.7 and save it in register R2. The byte comes in with the LSB first. 32
33 TIMER PROGRAMMING In the following program, we create a square wave of 50% duty cycle (with equal portions high and low) on the P1.5 bit. Timer 0 is used to generate the time delay. Analyze the program In the above program notice the following step. 1. TMOD is loaded. 2. FFF2H is loaded into TH0-TL0. 3. P1.5 is toggled for the high and low portions of the pulse. 33
34 The following program generates a square wave on P1.5 continuously using timer 1 for a time delay. Find the frequency of the square wave if XTAL = MHz. In your calculation do not include the overhead due to Instructions in the loop. Solution: Since FFFFH 7634H = 89CBH + 1 = 89CCH and 89CCH = clock count and us = ms for half of the square wave. The frequency = Hz. Also notice that the high portion and low portion of the square wave pulse are equal. In the above calculation, the overhead due to all the instruction in the loop is not included. 34
35 Assume XTAL = MHz, write a program to generate a square wave of 50 khz frequency on pin P2.3. Solution: Look at the following steps. (a) T = 1 / 50 = 20 ms, the period of square wave. (b) 1 / 2 of it for the high and low portion of the pulse is 10 ms. (c) 10 ms / us = 9216 and = in decimal, and in hex it is DC00H. (d) TL = 00 and TH = DC (hex). Examine the following program and find the time delay in seconds. Exclude the overhead due to the instructions in the loop. 35
36 Solution: TH-TL = 0108H = 264 in decimal and = Now s = ms, and for 200 of them we have ms = seconds. Assume XTAL = MHz, find the frequency of the square wave generated on pin P1.0 in the following program 36
37 Solution: First notice the target address of SJMP. In mode 2 we do not need to reload TH since it is auto-reload. Now (256-05) us = us = us is the high portion of the pulse. Since it is a 50% duty cycle square wave, the period T is twice that; as a result T = us = us and the frequency = khz Find the frequency of a square wave generated on pin P
38 T = 2 ( us ) = ms, and frequency = 72 Hz SERIAL COMMUNICATION PROGRAMMING With XTAL = MHz, find the TH1 value needed to have the following baud rates. (a) 9600 (b) 2400 (c) 1200 Solution: The machine cycle frequency of 8051 = / 12 = khz, and khz / 32 = 28,800 Hz is frequency by UART to timer 1 to set baud rate. (a) 28,800 / 3 = 9600 where -3 = FD (hex) is loaded into TH1 (b) 28,800 / 12 = 2400 where -12 = F4 (hex) is loaded into TH1 (c) 28,800 / 24 = 1200 where -24 = E8 (hex) is loaded into TH1 Notice that dividing 1/12 of the crystal frequency by 32 is the default value upon activation of the 8051 RESET pin. 38
39 NOTE FOR REFERENCE Write a program for the 8051 to transfer letter A serially at 4800 baud, continuously. Write a program for the 8051 to transfer YES serially at
40 baud, 8-bit data, 1 stop bit, do this continuously Write a program for the 8051 to receive bytes of data serially, and put them in P1, set the baud rate at 4800, 8-bit data, and 1 stop bit 40
41 Assume that XTAL = MHz for the following program, state (a) what this program does, (b) compute the frequency used by timer 1 to set the baud rate, and (c) find the baud rate of the data transfer. 41
42 Solution: (a) This program transfers ASCII letter B ( binary) continuously (b) With XTAL = MHz and SMOD = 1 in the above program, we have: / 12 = khz machine cycle frequency / 16 = 57,600 Hz frequency used by timer 1 to set the baud rate / 3 = 19,200, the baud rate. Self check 1.What is the advantage of using an internal timer when 8253 is available? 2.By what means a timer is inialised when compared to a control word used in 8085? 3.How will you check the completion of Timer? 4.What is the initialization operation required to assign a port as input.write the corresponding instruction 5.SWAP? VS XCHG? 6.Is there a index addressing mode in 8051? 7.SETB P1.7 stands for? 42
43 Key Terms A Auto-reload 37 B Branch 9 Baud 40 C Complement 23 D Delay 24 I Instructions 2 M Machine cycles 24 P Programming 22 Port programming S Stack 22 Square wave 27 Serial communication Programming 38 T Timer programming 34 U Uart 38 KEY WORD QUIZ 1,The mode uses Auto-reload is 2.TheBranch instruction changes the value of the PC?true or false 3.The baud rates of the UART are, and 4.The instruction used to complement the accumulator is 5.What is the value of T is XTAL is MHz? 43
44 MULTIPLE CHOICE In 8051 the number of ADDRESSINGMODES available is For interfacing an I/O device with 8051 we use the instruction MOV IN OUT all the above SETB P1.0 makes port1 zeroth bit 1 0 Z None of the above A=40.After execution of SWAP instruction A= The number of register banks in 8051 is What is the size of the DATA IN 8051? The value of A and R1 after executing the following instruction is MOV 24,#34 MOV A,#78 MOV R1,#24 CPL A XCHD A,@R1 44
45 The addressing mode of MOV A,20 is Direct Indirect Registered Immediate The number of timers in 8051 is PSEN stands for Program status enable Power source enable Program store enable Power stimulus emphasize node MOVX A,@DPTR will read the of data pointed by Register DPTR from the Byte,Register pair Word,register pair Byte,external memory Word,external memory ACALL calls subroutines with a target address within bytes k 2k QUESTIONS 1.Write a program to transfer value 55H serially (one bit at a time) via pin P2.1. Put two highs at the start and end of the data. Send the byte LSB first. 2.Write a program to bring in a byte of data serially one bit at a time via pin P2.7 and save it in register B. The byte comes in with the LSB first. 3.Assume XTAL = MHz, write a program to generate a square wave of 30 khz frequency on pin P
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