Microcontrollers. Microcontroller

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1 Microcontrollers Microcontroller A microprocessor on a single integrated circuit intended to operate as an embedded system. As well as a CPU, a microcontroller typically includes small amounts of RAM and PROM and timers and I/O ports. (hyperdictionary.com) Special type of ASIP designed for embedded control applications Microcontrollers can usually run as a single chip system (on chip memory and peripherals). Frees pins on the chip normally used for interfacing with memory etc for programmable I/O Efficient bit manipulation and direct access to part pins 1

2 Large variety of microcontrollers spanning a wide range of price and performance Based on 4-, 8-, 16-, 32-bit processors (8- bit most popular, 32-bit for high end applications) Most popular are lower end devices used extensively in cost sensitive applications Some reasons for popularity of microcontrollers Speeds design time (many peripherals integrated) Simplifies I/O interfacing Reduce/eliminate external memory Single chip solution can help optimise for power, board space, cost, Some Examples PIC ( Versatile, robust, low-power, low-cost controller No external busses, expansion and communication through serial peripheral interaces or I/O ports Variety of versions - some with as little as 8 pins (small footprint) 2

3 Harvard architecture (8-bit data space) and limited registers, instruction set and addressing modes (RISC like) 8051 Popular 8-bit microcontroller originally made by Intel, now made by many others A large number of variants- memory configuration, peripherals, pin count, 16-bit variants Efficient vectored interrupts Efficient bit-manipulation instructions useful in control applications ARM (not a chip maker - IP based) 32-bit RISC processor core embedded into microprocessors, ASIPs & microcontrollers High speed and advanced architecture Many applications: network, digital cameras, PDAs, mobile phones, Some models have both 32-bit and 16-bit instruction sets Windows CE, Linux, Palm OS, Symbian OS, and Java OS, many RTOS options support for both microcontroller and DSP functions, embedded ICE features 3

4 Motorola HCS12 family has a high-speed (for a microcontroller), 16-bit central processing unit programming model identical to M68HC11 instruction set is a proper superset of the M68HC11 instruction set Fairly complex CISC processor with a large number of multi-cycle instructions Flexible addressing modes Large number of built in peripherals, memory, A member of this family used in the lab One of hundreds of processors used in embedded systems We will give a brief overview but will not discuss the microcontroller in depth in class Engineers and designers need to be able to learn and evaluate different processors, architectures, instruction sets, For this course, you are required to become proficient in coding for the HCS12 You need to become very familiar with data sheet and user guide 512K bytes of Flash EEPROM 14K bytes of RAM 4K bytes of EEPROM two asynchronous serial communications interfaces (SCI), Three serial peripheral interfaces (SPI) an 8-channel IC/OC enhanced capture time two 8-channel, 10-bit analog-todigital converters (ADC) an 8-channel pulse-width modulator (PWM) a digital Byte Data Link Controller (BDLC) 29 discrete digital I/O channels five CAN 2.0, I2C bus 4

5 5

6 Accumulators Two 8-bit accumulators A and B are used to hold ALU operands. Can be combined into double accumulator D Index Registers used for indexed addressing Stack Pointer Automatic program stack saves system context for restoring after interrupts and subroutine calls Can also store temporary data and pass parameters to subroutines SP register contains address of last data pushed on stack. The stack grows downward from SP. Push decrements SP, pop increments it Subroutines call and interrupts Before entering subroutine, return address is pushed onto the stack Typically also push on state of registers etc at start of routine and restore before returning On return from subroutine, the return address is popped off the stack and program resumes execution at this address 6

7 Program counter (PC) holds the 16-bit address of the next instruction to be executed. automatically incremented each time an instruction is fetched. Condition code register (CCR) Contains status and control bits Status flags: Half carry (H), Negative (N), Zero (Z), Overflow (V), Carry/borrow (C) X-mask, I-mask bits: used to enable interrupts S-bit: enables stop instruction Peripherals Peripherals are controlled through a series of memory mapped registers Default range $ $03FF ($ for hex number) Moveable to any other 2kB block For example, to write to portb output ports movb #$00,DDRB; set PORTB pins to output movb #$AA, PORTB; set alternate bits 7

8 Operating modes Special operating modes - factory test and development modes Normal modes Single-chip: no external memory interface Expanded-wide mode: PORTA and PORTB replaced by multiplexed16-bit address and data busses for external memory interface Expanded-wide mode: like expanded wide but uses an 8-bit data bus MCS12 Data types Bits 5-bit signed integers 8-bit signed and unsigned integers 8-bit, 2-digit binary-coded decimal numbers 9-bit signed integers 16-bit signed and unsigned integers 16-bit effective addresses 32-bit signed and unsigned integers 8

9 Negative integers: two s complement form. Five-bit and 9-bit signed integers are used only as offsets for indexed addressing. Sixteen-bit effective addresses are formed during addressing mode computations. Thirty-two-bit integer dividends are used by extended division instructions. Extended multiply and extended multiplyand-accumulate instructions produce 32-bit products. HCS12 instructions Consist of 1-2 byte operation code (opcode) and 0-5 bytes of operand addressing information Opcode determines operation to be performed and how to interpret addressing information to access operands HCS12 has very flexible addressing modes 9

10 Examples loading accumulator A Immediate ldaa #$0A ; A fl $0A Direct ldaa $0A ; A fl m[$0a] Indexed Constant offset 5, 9 or 16 bit ldaa 8,X ; A fl m[x+8] Auto pre-decrement (offset 1-8) ldaa 8,-X ; X fl X-8 ; A fl m[x] Auto pre-decrement (offset 1-8) ldaa 8,X+ ; A fl m[x+8] ; X fl X+8 10

11 Indirect Indexed (pointer table) ldx 2000 ldaa [10,X] ; A fl m[m[2010]] HCS12 Instruction Set CISC instruction set with many specialised instructions Multi-cycle execution time Instruction set covers a variety of instruction types: Memory and Register operations, Logic, Arithmetic, Memory and Register Operations Load and Store operations move data between main memory and CPU registers (A,B,D,X,Y,SP,CCR) Transfer and Exchange instructions move data between CPU registers Move instructions move data between memory locations (do not affect CCR) Stack operations push onto and pop (pull) from stack 11

12 12

13 Arithmetic and Logic Operations Binary addition, subtraction, multiplication and division Boolean logic Fast increment and decrement instructions (for counters) - do not affect CCR Specialised instructions for BCD arithmetic 13

14 14

15 Program control operations Short (8-bit) and long (16-bit) branch instructions Loop primitive instructions for counter based loops (while/for loop) Opcodes to call and return from subroutines, return from interrupts and call software interrupts 15

16 16

17 Other instructions Test and compare (not used as much as in other instruction sets) Fuzzy logic Multiply and accumulate (DSP) Max, min Table lookup Stop, Wait Background and Null instructions Shows Reading description of opcodes machine language opcodes for different addressing modes Cycle by cycle execution sequence Affect on status bits For example 17

18 18

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