Levels of Programming. Registers

Transcription

1 Levels of Programming COSC 2021: Computer Organization Instructor: Dr. Amir Asif Department of Computer Science York University Handout # 3: MIPS Instruction Set I Topics: 1. Arithmetic Instructions 2. Registers, Memory, and Addressing 3. Load/Save, Logical Operation Instructions 4. Representing MIPS as binary code 5. Instructions for making decisions Patterson: Sections Recall that a CPU can only understand binary machine language program Writing binary machine language program is cumbersome An intermediate solution is to write assembly language program that can easily be translated (assembled) to binary language programs In this course we will cover MIPS ISA used by NEC, Nintendo, Silicon Graphics, and Sony MIPS is more primitive than higher level languages with a very restrictive set of instructions 2 Fetch and Execute Registers Instructions are stored in the form of bits Programs are stored in memory and are read or written just like data Registers are memory cells In MIPS, data must be in registers before arithmetic operations can be performed Size of each register is 32 bits, referred to as a word (1 word = 4 bytes = 32 bits) MIPS has a total of 32 registers Processor Memory memory for data, programs, compilers, editors, etc. Fetch & Execute Cycle Instructions are fetched and put into a special register Bits in the register "control" the subsequent actions Data if required is fetched from the memory and placed in other registers Fetch the next instruction and continue 3 Name Register number Usage $zero 0 Constant value of 0 $v0-$v1 2-3 Values for results and expression evaluation $a0-$a3 4-7 Input arguments to a procedure $t0-$t Not preserved across procedures (temp) $s0-$s Preserved across procedure calls $t8-$t More temporary registers $gp 28 Global pointer $sp 29 Stack pointer, points to last location of stack $fp 30 Frame pointer $ra 31 Return address from a procedure call 4

2 Addition & Subtraction Memory Organization Arithmetic Example: C: f = (g + h) (i + j); Step 1: Specify registers containing variables Step 2: Express instruction in MIPS add add $s1,$s2,$s3 $s1 $s2+$s3 overflow detected subtract sub $s1,$s2,$s3 $s1 $s2-$s3 overflow detected $t0 - $t7 $s0 - $s7 $t0 g+h $t1 i+j $s0 $t2 final $s1 g $t3 $s2 h $t4 $s3 i $t5 $s4 j $s5 $s6 $s7 $t6 $t7 $t8 $t Memory can be viewed as a large one dimensional array of cells To access a cell, its address is required (Addresses are indices to the array) In MIPS, each cell is 1 word (4 bytes) long Each word in a memory has an address, which is a multiple of 4 Length of an address is 32 bits, hence minimum value of address = 0 maximum value of address = (2 32 1) Data is transferred from memory into registers using data transfer instructions MIPS code: $s1 add $t0,$s1,$s2 # $t0 $s1 + $s2 load word lw $s1,100($s2) Memory to Register memory[$s2+100] add $t1,$s3,$s4 # $t1 $s3 + $s4 Data transfer sub $t2,$t0,$t1 # $t2 $t0 - $t1 5 store word sw $s1,100($s2) memory[$s2+100] Register to memory $s1 6 Data Transfer Instructions Data transfer load word store word lw $s1,100($s2) sw $s1,100($s2) $s1 memory[$s2+100] memory[$s2+100] $s2 Memory to Register Register to memory So far we have learned MIPS loading words but addressing bytes addition and subtraction operations on registers only Instructions Meaning Example: C instruction: g = h + A[k] Register Allocation: $s1 contains computed value of g; $s2 contains value of h $s3 contains base address of array (address of A[0]) $s4 contains value of k; A[k] A[1] A[0] add $t1,$s4,$s4 # $t1 = 2 x k Array add $t1,$t1,$t1 # $t1 = 4 x k add $t1,$t1,$s3 # $t1 = address of A[0] + 4 x k lw $t0,0($t1) # $t0 = A[k] Add $s1,$s2,$t0 # $s3 = h + A[k] Address + 4xk address + 4 address D a t a 7 add $s1,$s2,$s3 # $s1 = $s2 + $s3 (arithmetic) sub $s1,$s2,$s3 # $s1 = $s2 $s3 (arithmetic) lw $s1,100($s2) # $s1 = Memory[$s2+100] (data transfer) sw $s1,100($s2) # Memory[$s2+100] = $s1 (data transfer) Activity 1: Write the MIPS assembly code for the following C assignment instruction A[12] = h + A[8] assuming that the variable h is stored in $s2 and the base address of the array A is in $s3. 8

3 Binary Representation A computer can only process bits. Characters, integers, and real numbers must be represented in bits. Different representation are labeled with a subscript. A decimal number is represented by subscript <ten>. Binary numbers are represented by subscript <two>. Hexadecimal numbers are represented by subscript <hex>. Examples: 987 ten, two, and 987 hex Case 1: Decimal to Binary Conversion Example: Convert 445 ten into 32-bit binary Binary Representation: 445 ten = two Case 2: Binary to Decimal Conversion Example: Convert two to decimal Hexadecimal Representation (1) Case 3: Decimal to Hexadecimal Conversion Example: Convert 445 ten into hexadecimal 445 ten = bd hex in 1 word Case 4: Hexadecimal to Decimal Conversion Example: Convert bd hex to decimal ( ) + ( b ) ( d ) e 14 = 445 ten 9 f = 445 ten d 1 b Hexa Decimal a 10 b 11 c 12 d 13 Hexadecimal Representation (2) 2 s Complement (1) Case 5: Hexadecimal to Binary Conversion Example: Convert bd hex into binary () 0 + () 0 + () 0 + () 0 + () 0 + () 0 + () 1 + () b + () d 0000 two 0000 two 0000 two 0000 two 0000 two 0000 two 0001 two 1011 two 1101 two MIPS uses 2 s complement to represent signed numbers In 2 s complement, a positive number is represented using a 31-bit binary number Example: +2 ten is represented as two or hex Case 6: Binary to Hexadecimal Conversion Example: Convert two to hexadecimal ( 0000 ) + ( 0000 ) + ( 0000 ) + ( 0000 ) + ( 0000 ) + ( 0000 ) + ( 0001 ) + ( 1011 ) + ( 1101 ) Activity 1: Convert 1998 ten into binary using the hexadecimal shortcut. 1 hex b hex d hex 11 In 2 s complement, a negative number X two is represented by taking the complement of its magnitude X two plus 1. Example: 2 ten Represent the magnitude in binary format 2 ten is represented as two Take the complement of each digit The results is two Add 1 to the LSB 2 ten is represented as two or fffffffe hex 12

4 2 s Complement (2) Unsigned and Signed Arithmetic 5. The MSB (32 nd bit) is in indication of sign. To convert a 32-bit number in 2 s complement to decimal ( b )+ ( b )+ ( b )+ + ( b1 2 1 )+ ( b0 2 0 ) Example: two is represented by two is represented by ( )+ ( )+ ( )+ + ( )+ ( )= 2 MIPS has a separate format for unsigned and signed integers Unsigned integers are saved as 32-bit words Example: Smallest unsigned integer is = 0 ten Largest unsigned integer is ffffffff hex = 4,294,967,295 ten Signed integers are saved as 32-bit words in 2 s complement with the MSB reserved for sign If MSB = 1, then the number is negative If MSB = 0, then the number is positive Example: Smallest signed integer: two = (2 31 ) 10 = 2,147,483, Largest signed integer: two = (231 1) 10 = 2,147,483, MIPS to Binary Machine Language (1) Example: add $t0,$s1,$s2 Binary Machine Language Equivalent: Can we derive the binary machine language code from the MIPS instruction? MIPS field for arithmetic instructions: op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits opcode 1 st operand 2 nd operand destination shift function MIPS Fields for Arithmetic Operations op rs rt rd shamt funct 6 bits 5 bits 5 bits 5 bits 5 bits 6 bits opcode 1 st operand 2 nd operand destination shift function For arithmetic operations (R): Opcode (op) = 0 Function (funct) = 32 for add, 34 for sub Example: add $t0,$s1,$s2 (Values of Registers: $t0 = 9, $s1 = 17, $s2 = 18) op = 0 10 = (000000) 2 rs = = (10001) 2 rt = = (10010) 2 rd = 8 10 = (01000) 2 shamt is not used = (00000) 2 15 funct = = (100000) 2 leads to the binary machine language code:

5 MIPS Fields for Data Transfer Operations op rs rt address Example Activity 2: Consider the C instruction 6 bits 5 bits 5 bits 16 bits opcode 1 st operand 2 nd operand Memory address (offset) For data transfer operations (I): Opcode (op) = 35 for load (lw) and 43 for save (sw) A[300] = h + A[300] A. Write the equivalent MIPS code for the above C instruction assuming $t1 contains the base address of array A (i.e., address of A[0]) and $s2 contains the value of h B. Write the binary machine language code for the result in part A. Example: lw $t0,32($s3) # (Values of Registers: $t0 = 9, $s3 = 19) op = = (100011) 2 rs = = (10011) 2 rt = 8 10 = (01000) 2 address = = ( ) 2 leads to the binary machine language code: MIPS Branch Instructions for if (1) MIPS Branch Instructions for if (2) Branch if equal to: beq $s1,$s2,l1 # if $s1 == $s2, go to L1 Branch if not equal to: bne $s1,$s2,l2 # if $s1!= $s2, go to L2 Unconditional jump: j L3 # go to L3 Example: if (i == j) go to L1; f = g + h; L1: f = f i Assume that the five variables f, g, h, i, and j are stored in the registers: $s0 to $s4 if (i == j) f = g + h; else f = g - h; Assume that the five variables f, g, h, i, and j are stored in the registers: $s0 to $s4 bne $s3,$s4,l1 # go to L1 if i == j add $s0,$s1,$s2 # f = g + h j L2 # L1: sub $s0,$s0,$s2 # f = f I L2: beq $s3,$s4,l1 # go to L1 if i == j add $s0,$s1,$s2 # f = g + h Activity 3: Write the above code using branch if equal to statement? L1: sub $s0,$s0,$s3 # f = f - i 19 20

6 Loops (for) Loops (while) Loop: g = g + A[i] i = i + j; if (i!= h) goto Loop; Assume A is an array of 100 elements and that the compiler associates the variables g, h, i, and j are stored in the registers: $s1 to $s4. The base address of the array is contained in $s5. Loop: add $t1,$s3,$s3 #$t1 = 2 i add $t1,$t1,$t1 #$t1 = 4 i add $t1,$t1,$s5 #$t1 = address of A[i] lw $t0,0($t1) #$t0 = A[i] add $s3,$s3,$s4 #$s3 = i + j bne $s3,$s2,loop #go to Loop if (i!=h) while (save[i] == k) i = i + j; Assume that the variables i, j, and k are stored in the registers: $s3, $s4, and $s5. The base address of the array (save) is contained in $s6. What is the MIPS code? Loop: add $t1,$s3,$s3 #$t1 = 2 x i add $t1,$t1,$t1 #$t1 = 4 x i add $t1,$t1,$s6 #$t1 = address of save[i] lw $t0,0($t1) #$t0 = save[i] bne $t0,$s5,exit #go to Exit if save[i]!=k add $s3,$s3,$s4 #$s3 = i + j j Loop #go to Loop Exit: Loops (case/switch) Loops (case/switch) slt $t3,$s5,$zero #test if k<0 bne $t3,$zero,exit #if k<0, go to Exit slt $t3,$s5,$t2 #test if k<4 beq $t3,$zero,exit #if k >=4, go to Exit add $t1,$s5,$s5 #$t1 = 2 * k add $t1,$t1,$t1 #$t1 = 4 * k add $t1,$t1,$t4 #$t1 = &jumptable[k] lw $t0,0($t1) #$t0 = jumbtable[k] jr $t0 L0: add $s0,$s3,$s4 #$s0 = (i + j) L1: add $s0,$s1,$s2 #$s0 = (g + h) L2: sub $s0,$s1,$s2 #$s0 = (g - h) L3: add $s0,$s3,$s4 #$s0 = (i - j) Exit: 24 switch (k) { case 0: f = i + j; break; case 1: f = g + h; break; case 2: f = g h; break; case 3: f = I j; break; } Assume that the variables f through k are stored in the registers: $s0 to $s5. The register $t2 contains 4. What is the MIPS code? To write the MIPS Code for the above code, 2 additional MIPS instructions are introduced 1. Set it less than: slt $t0,$s3,$s4 # if ($s3<$s4) $t0=1; else $t0=0; 2. Jump register jr $s3 # jump to address contained in $s3 23 switch (k) { case 0: f = i + j; break case 1: f = g + h; break case 2: f = g h; break; case 3: f = i j; break; } f to k stored $s0 to $s5 $t2 = 4 $t4 contains address of an array, jumptable jumbtable[3] jumptable[2] jumptable[1] jumptable[0] Address of L3 Address of L2 Address of L1 Address of L0

7 Summary Name Example Comments 32 Registers Memory w/ 2 30 words $s0,$s1, $s7, $zero $t0,$t1, $t9 Memory[0], Memory[4], Memory[ ] $s0-$s7 are preserved across procedures, $t0-$t9 are not preserved Memory is accessed one word at a time Arithmetic Data Transfer Conditional branch Unconditional jump add add $s1,$s2,$s3 $s1 $s2+$s3 subtract sub $s1,$s2,$s3 $s1 $s2-$s3 load word lw $s1,100($s2) $s1 Mem[$s2+100] store word lw $s1,100($s2) Mem[$s2+100] $s1 branch on equal beq $s1,$s2,l if($s1==$s2) go to L branch not equal bne $s1,$s2,l if($s1!=$s2) go to L set on less than slt $s1,$s2,$s3 if($s2<$s3) $s1 = 1 else $s1 = 0 jump j 2500 go to (4 x 2500) Jump register jr $ra go to $ra 25