Combinational Logic Circuits
|
|
- Cornelius Golden
- 5 years ago
- Views:
Transcription
1 Chapter 3 Combinational Logic Circuits 12 Hours 24 Marks 3.1 Standard representation for logical functions Boolean expressions / logic expressions / logical functions are expressed in terms of logical variables. Logical variables can have value either 0 or 1. The logical functions can be represented in one of the following forms. - Sum of Products form (SOP form) - Product of Sums form (POS form) Sum of Products (SOP) form In this form, Boolean expression is defined by sum of product terms. Various AND terms are ORed together. Each AND term may be a single variable or a product of multiple variables (each variable may be either in complemented or un-complemented form). Y = AC + A BC + B Here, Y is represented in SOP form with three terms. First AND term contains two variables, second contains three variables and third contains a single variable. We can obtain sum of products expression from a truth table by considering the input combinations those produce logic 1 output as shown below. Table 3.1: Example Truth table i/p o/p A B C Y First logic 1 output in the truth table is for A=0, B=0 and C=1. This is possible when A, B and C are ANDed. So, first term is A. B. C and other terms can be obtained similarly to get the expression for the truth table 3.1 in sum of products form as, 3-1
2 Y = A. B. C + A. B. C + A. B. C + A. B. C As this expression is a function of three variables, it can be expressed as f(a, B, C). It cans also be represented as. Y = f(a, B, C) = A. B. C + A. B. C + A. B. C + A. B. C Both the examples shown above are in sum of products form. But in first example, even though the expression is function of three variables, first term is containing only two variables whereas third term is containing only one variable. Y = A. C + A. B. C + B We may write each such incomplete term of the above expression in expanded form as, A. C = A. C. (B + B ) = A. B. C + A. B. C B = B. (A + A ) = A. B + A. B = A. B. (C + C ) + A. B. (C + C ) = A. B. C + A. B. C + A. B. C + A. B. C Therefore, the expanded sum of product expression can be written as, Y = A. B. C + A. B. C + A. B. C + A. B. C + A. B. C + A. B. C + A. B. C Y = A. B. C + A. B. C + A. B. C + A. B. C + A. B. C Expanded form of Boolean expression in which each term contains all the Boolean variables in it is called as canonical form. It is also called as standard sum of products form. Convert following Boolean expression into standard SOP form. AC + BD The above expression is a function of four variables A, B, C and D. As each term is not containing all the variables, it is not standard SOP. The terms can be expanded to make it standard SOP as, Y(A, B, C, D) Y(A, B, C, D) = A. C + B. D = A. (B + B ). C + B. D = A. B. C + A. B. C + B. D = A. B. C. (D + D ) + A. B. C. (D + D ) + B. D = A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + B. D = A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + (A + A ). B. D = A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. D + A. B. D = A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. (C + C ). D + A. B. (C + C ). D = A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D As, A + A = A = A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D Standardize following Boolean expression. Y = AC + B C 3-2
3 The above expression is a function of three variables A, B and C. As each term is not containing all the variables, it is not standard SOP. The terms can be expanded to make it standard SOP as, = A. C + B. C = A. (B + B ). C + B. C = A. B. C + A. B. C + B. C = A. B. C + A. B. C + (A + A ). B. C = A. B. C + A. B. C + A. B. C + A. B. C As, A + A = A = A. B. C + A. B. C + A. B. C Single term in standard sum of products is called as minterm. Each expression can be represented using minterms. Some examples are shown below. Y = A. B. C + A. B. C + A. B. C + A. B. C + A. B. C As the above expression in standard sum of products, all terms in it are minterms. They are, A. B. C A. B. C A. B. C m7 m A. B. C A. B. C m m2 Therefore the expression can be represented as, = m(2,3,5,6,7) Y = A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D + A. B. C. D As the above expression in standard sum of products, all terms in it are minterms. They are, A. B. C. D A. B. C. D A. B. C. D m13 m m3 m9 A. B. C. D A. B. C. D A. B. C. D m8 m Therefore the expression can be represented as, m14 Y(A, B, C, D) = m(8,9,12,13,14,15) Product of Sums (POS) form In this form, Boolean expression is defined by product of sum terms. Various OR terms are ANDed together. Each OR term may be a single variable 3-3
4 or a sum of multiple variables (each variable may be either in complemented or un-complemented form). Y = (A + C). (B + C). A Here, Y is represented in POS form with three terms. First OR term contains two variables, second contains two variables and third contains a single variable. We can obtain product of sums expression from a truth table by considering the input combinations those produce logic 0 output as shown below. Table 3.2: Example Truth table i/p o/p A B C Y First logic 0 output in the truth table is for A=0, B=0 and C=0. This is possible when A, B and C are ORed. So, first term is (A + B + C) and other terms can be obtained similarly to get the expression for the truth table 3.2 in product of sums form as, Y = (A + B + C). (A + B + C). (A + B + C ). (A + B + C ) As this expression is a function of three variables, it can be expressed as f(a, B, C). It cans also be represented as. Y = f(a, B, C) = (A + B + C). (A + B + C). (A + B + C ). (A + B + C ) Both the examples shown above are in product of sums form. But in first example, even though the expression is function of three variables, first term is containing only two variables, second term is also containing only two variables and third term is containing only one variable. Y = (A + C). (B + C). A We may write each such incomplete term of the above expression in expanded form as, (A + C) = (A + B. B + C) = (A + B + C). (A + B + C) (B + C) = (A. A + B + C) = (A + B + C). (A + B + C) A = (A + B. B ) = (A + B). (A + B ) = (A + B + C. C ). (A + B + C. C ) = (A + B + C). (A + B + C ). (A + B + C). (A + B + C ) 3-4
5 Therefore, the expanded sum of product expression can be written as, Y = (A + B + C). (A + B + C). (A + B + C). (A + B + C). (A + B + C). (A + B + C ). (A + B + C). (A + B + C ) Y = (A + B + C). (A + B + C). (A + B + C). (A + B + C ). (A + B + C ) Expanded form of Boolean expression in which each term contains all the Boolean variables in it is called as canonical form. It is also called as standard product of sums form. Convert following Boolean expression into standard POS form. (A + C ). (B + D) The above expression is a function of four variables A, B, C and D. As each term is not containing all the variables, it is not standard POS. The terms can be expanded to make it standard POS as, Y(A, B, C, D) Y(A, B, C, D) = (A + C ). (B + D) = (A + B. B + C ). (B + D) = (A + B + C ). (A + B + C ). (B + D) = (A + B + C + D. D ). (A + B + C + D. D ). (B + D) + D ). (B + D) + D ). (A. A + B + D) + D ). (A + B + D). (A + B + D) + D ). (A + B + C. C + D). (A + B + C. C + D) + D ). (A + B + C + D). (A + B + C + D). (A + B + C + D). (A + B + C + D) As, A. A = A + D ). (A + B + C + D). (A + B + C + D). (A + B + C + D) Standardize following Boolean expression. Y = (A + B)(A + C) The above expression is a function of three variables A, B and C. As each term is not containing all the variables, it is not standard POS. The terms can be expanded to make it standard POS as, = (A + B). (A + C) = (A + B + C. C ). (A + C) = (A + B + C). (A + B + C ). (A + C) = (A + B + C). (A + B + C ). (A + B. B + C) = (A + B + C). (A + B + C ). (A + B + C). (A + B + C) As, A + A = A = (A + B + C). (A + B + C ). (A + B + C). (A + B + C) 3-5
6 Single term in standard product of sumss is called as maxterm. Each expression can be represented using maxterms. Some examples are shown below. Y = (A + B + C). (A + B + C). (A + B + C). (A + B + C ). (A + B + C ) As the above expression in standard product of sums form, all terms in it are maxterms. They are, A + B + C A + B + C A + B + C M0 M A + B + C A + B + C M1 0 1 M5 Therefore the expression can be represented as, = M(0,1,2,4,5) Y = (A + B + C + D). (A + B + C + D ). (A + B + C + D) As the above expression in standard product of sums form, all terms in it are maxterms. They are, A + B + C + D A + B + C + D A + B + C + D M2 M Therefore the expression can be represented as, Y(A, B, C, D) = M(2,3,6) M4 M6 3.2 Karnaugh Map In the last chapter, we have simplified Boolean expression using Boolean laws. That was algebraic simplification method. In that method, it is hard to guess whether the simplified expression is in its simplest form or not (i.e. whether simplification is to be continued or not).this drawback has been overcome in Karnaugh map simplification. Karnaugh map (also called K-map) is graphical representation of a logic system. It can be drawn from minterm or maxterm Boolean expressions. Number of cells in a K-map depends on number of variables in the Boolean expression. Karnaugh map of a Boolean expression with n variables contain 2 n cells (squares). Each cell in the K-map corresponds with one input combination. Each row and each column of K-map is assigned by 0s and 1s. A two-variable K-map can be drawn with various possibilities. Two possibilities are shown in figure 3.1. In these notes we will use pattern shown in figure 3.1a. 3-6
7 B A A B a. b. Figure 3.1: Two ways of representing a 2-variable K-map As discussed previously, each square (or cell) in K-map corresponds to one input combination. In figure 3.1a, cell 0 corresponds to input combination 00 (i.e. A. B ), cell 1 corresponds to input combination 01 (i.e. A. B), cell 2 corresponds to input combination 10 (i.e. A. B ) and cell 3 corresponds to input combination 11 (i.e. A. B). A three-variable K-map can be drawn with various possibilities. Four possibilities are shown in figure 3.2. In these notes we will use pattern shown in figure 3.2a. BC A AB C a. b. C AB A BC c. d. Figure 3.2: Four ways of representing a 3-variable K-map A four-variable K-map can be drawn with various possibilities. Two possibilities are shown in figure 3.3. In these notes we will use pattern shown in figure 3.3a. 3-7
8 CD AB AB CD a. b. Figure 3.3: Two ways of representing a 4-variable K-map We can represent any expression which is in standard SOP (minterms) form or standard POS (maxterms) form in a K-map Representation SOP on K-map If the given Boolean expression is not in standard SOP form, it should be first converted to standard SOP form. Then its minterms are written. For each minterm in the expression, 1 is written in the corresponding cell in the K-map and the remaining cells are marked as 0. Represent following Boolean expression by K-map. Y = BC + A B C + ABC The above expression is in SOP form. It is a function of three variables A, B and C. As each term is not containing all the variables, it is not in standard SOP form. So, converting it into standard SOP form, = B. C + A. B. C + A. B. C = (A + A ). B. C + A. B. C + A. B. C = A. B. C + A. B. C + A. B. C + A. B. C m7 m3 m0 m6 = m(0,3,6,7) The above minterms can be represented in K-map. All the present terms are marked as 1 and remaining cells are marked as 0. As the function is of three variables, a three-variable K-map is used for representation. BC A Represent following expression using K-map. f(a, B, C, D) = m(0,1,2,5,13,15) The above minterms can be represented in K-map. All the present terms are marked as 1 and remaining cells are marked as 0. As the function is of four-variables, a four-variable K-map is used for representation. 3-8
9 CD AB Example 3: Represent following expression using K-map. Y = m(0,1,3) The above minterms can be represented in K-map. All the present terms are marked as 1 and remaining cells are marked as 0. As the function is of two-variables, a two-variable K-map is used for representation. B A Representation POS on K-map If the given Boolean expression is not in standard POS form, it should be first converted to standard POS form. Then its maxterms are written. For each maxterm in the expression, 0 is written in the corresponding cell in the K-map and the remaining cells are marked as 1. Represent following Boolean expression by K-map. Y = (A + B) + (A + B + C ) + (A + B + C ) The above expression is in POS form. It is a function of three variables A, B and C. As each term is not containing all the variables, it is not in standard POS form. So, converting it into standard POS form, = (A + B) + (A + B + C ) + (A + B + C ) = (A + B + C. C ) + (A + B + C ) + (A + B + C ) = (A + B + C) + (A + B + C ) + (A + B + C ) + (A + B + C ) = (A + B + C) + (A + B + C ) + (A + B + C ) = M(0,1,7) M0 M1 M7 The above maxterms can be represented in K-map. All the present terms are marked as 0 and remaining cells are marked as 1. As the function is of three variables, a three-variable K-map is used for representation. BC A
10 Represent following expression using K-map. f(a, B, C, D) = M(1,3,5,7,9,11,13,15) The above maxterms can be represented in K-map. All the present terms are marked as 0 and remaining cells are marked as 1. As the function is of four-variables, a four-variable K-map is used for representation. CD AB Example 3: Represent following expression using K-map. Y = M(0,2) The above maxterms can be represented in K-map. All the present terms are marked as 0 and remaining cells are marked as 1. As the function is of two-variables, a two-variable K-map is used for representation. B A Grouping of adjacent cells K-maps are used for simplification of Boolean expressions. The simplification is based on grouping of the terms in adjacent cells. Important aspects of grouping are discussed below. - Number of cells in a group must always be a power of 2. (i.e. 1, 2, 4, 8, 16 etc.) - Two cells are said to be adjacent if they differ in only one variable. Four cells are said to be adjacent if they differ in two variables. Eight cells are said to be adjacent if they differ in three variables and so on. - If K-map is represented for a SOP, grouping is done for adjacent 1 s and if K-map is represented for a POS, grouping is done for adjacent 0 s. - While grouping, each cell containing 1 in case of SOP ( 0 in case of POS) must be considered at least once. - We should try to make minimum number of groups (i.e. each group of maximum possible size). - Don t care entries may be considered in any group. 3-10
Chapter 2. Boolean Expressions:
Chapter 2 Boolean Expressions: A Boolean expression or a function is an expression which consists of binary variables joined by the Boolean connectives AND and OR along with NOT operation. Any Boolean
More informationA B AB CD Objectives:
Objectives:. Four variables maps. 2. Simplification using prime implicants. 3. "on t care" conditions. 4. Summary.. Four variables Karnaugh maps Minterms A A m m m3 m2 A B C m4 C A B C m2 m8 C C m5 C m3
More informationDigital Logic Lecture 7 Gate Level Minimization
Digital Logic Lecture 7 Gate Level Minimization By Ghada Al-Mashaqbeh The Hashemite University Computer Engineering Department Outline Introduction. K-map principles. Simplification using K-maps. Don t-care
More informationModule -7. Karnaugh Maps
1 Module -7 Karnaugh Maps 1. Introduction 2. Canonical and Standard forms 2.1 Minterms 2.2 Maxterms 2.3 Canonical Sum of Product or Sum-of-Minterms (SOM) 2.4 Canonical product of sum or Product-of-Maxterms(POM)
More informationA graphical method of simplifying logic
4-5 Karnaugh Map Method A graphical method of simplifying logic equations or truth tables. Also called a K map. Theoretically can be used for any number of input variables, but practically limited to 5
More informationDKT 122/3 DIGITAL SYSTEM 1
Company LOGO DKT 122/3 DIGITAL SYSTEM 1 BOOLEAN ALGEBRA (PART 2) Boolean Algebra Contents Boolean Operations & Expression Laws & Rules of Boolean algebra DeMorgan s Theorems Boolean analysis of logic circuits
More informationCHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey
CHAPTER-2 STRUCTURE OF BOOLEAN FUNCTION USING GATES, K-Map and Quine-McCluskey 2. Introduction Logic gates are connected together to produce a specified output for certain specified combinations of input
More informationExperiment 3: Logic Simplification
Module: Logic Design Name:... University no:.. Group no:. Lab Partner Name: Mr. Mohamed El-Saied Experiment : Logic Simplification Objective: How to implement and verify the operation of the logical functions
More informationPoints Addressed in this Lecture. Standard form of Boolean Expressions. Lecture 4: Logic Simplication & Karnaugh Map
Points Addressed in this Lecture Lecture 4: Logic Simplication & Karnaugh Map Professor Peter Cheung Department of EEE, Imperial College London Standard form of Boolean Expressions Sum-of-Products (SOP),
More informationTo write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using Karnaugh Map.
3.1 Objectives To write Boolean functions in their standard Min and Max terms format. To simplify Boolean expressions using. 3.2 Sum of Products & Product of Sums Any Boolean expression can be simplified
More informationBawar Abid Abdalla. Assistant Lecturer Software Engineering Department Koya University
Logic Design First Stage Lecture No.6 Boolean Algebra Bawar Abid Abdalla Assistant Lecturer Software Engineering Department Koya University Outlines Boolean Operations Laws of Boolean Algebra Rules of
More informationSpecifying logic functions
CSE4: Components and Design Techniques for Digital Systems Specifying logic functions Instructor: Mohsen Imani Slides from: Prof.Tajana Simunic and Dr.Pietro Mercati We have seen various concepts: Last
More informationCMPE223/CMSE222 Digital Logic
CMPE223/CMSE222 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum Product-of-Sums Forms, Incompletely Specified Functions Terminology For a given term, each
More information2.6 BOOLEAN FUNCTIONS
2.6 BOOLEAN FUNCTIONS Binary variables have two values, either 0 or 1. A Boolean function is an expression formed with binary variables, the two binary operators AND and OR, one unary operator NOT, parentheses
More informationECE380 Digital Logic
ECE38 Digital Logic Optimized Implementation of Logic Functions: Strategy for Minimization, Minimum Product-of-Sums Forms, Incompletely Specified Functions Dr. D. J. Jackson Lecture 8- Terminology For
More informationKarnaugh Map (K-Map) Karnaugh Map. Karnaugh Map Examples. Ch. 2.4 Ch. 2.5 Simplification using K-map
Karnaugh Map (K-Map) Ch. 2.4 Ch. 2.5 Simplification using K-map A graphical map method to simplify Boolean function up to 6 variables A diagram made up of squares Each square represents one minterm (or
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Overview Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard
More informationSEE1223: Digital Electronics
SEE223: Digital Electronics 3 Combinational Logic Design Zulkifil Md Yusof Dept. of Microelectronics and Computer Engineering The aculty of Electrical Engineering Universiti Teknologi Malaysia Karnaugh
More informationLSN 4 Boolean Algebra & Logic Simplification. ECT 224 Digital Computer Fundamentals. Department of Engineering Technology
LSN 4 Boolean Algebra & Logic Simplification Department of Engineering Technology LSN 4 Key Terms Variable: a symbol used to represent a logic quantity Compliment: the inverse of a variable Literal: a
More informationExperiment 4 Boolean Functions Implementation
Experiment 4 Boolean Functions Implementation Introduction: Generally you will find that the basic logic functions AND, OR, NAND, NOR, and NOT are not sufficient to implement complex digital logic functions.
More informationGate Level Minimization Map Method
Gate Level Minimization Map Method Complexity of hardware implementation is directly related to the complexity of the algebraic expression Truth table representation of a function is unique Algebraically
More informationEEE130 Digital Electronics I Lecture #4_1
EEE130 Digital Electronics I Lecture #4_1 - Boolean Algebra and Logic Simplification - By Dr. Shahrel A. Suandi 4-6 Standard Forms of Boolean Expressions There are two standard forms: Sum-of-products form
More informationCombinational Logic Circuits Part III -Theoretical Foundations
Combinational Logic Circuits Part III -Theoretical Foundations Overview Simplifying Boolean Functions Algebraic Manipulation Karnaugh Map Manipulation (simplifying functions of 2, 3, 4 variables) Systematic
More informationDIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (K-MAPS)
DIGITAL CIRCUIT LOGIC UNIT 5: KARNAUGH MAPS (K-MAPS) 1 Learning Objectives 1. Given a function (completely or incompletely specified) of three to five variables, plot it on a Karnaugh map. The function
More informationIT 201 Digital System Design Module II Notes
IT 201 Digital System Design Module II Notes BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.
More informationAssignment (3-6) Boolean Algebra and Logic Simplification - General Questions
Assignment (3-6) Boolean Algebra and Logic Simplification - General Questions 1. Convert the following SOP expression to an equivalent POS expression. 2. Determine the values of A, B, C, and D that make
More informationChapter 3 Simplification of Boolean functions
3.1 Introduction Chapter 3 Simplification of Boolean functions In this chapter, we are going to discuss several methods for simplifying the Boolean function. What is the need for simplifying the Boolean
More informationChapter 2 Combinational Logic Circuits
Logic and Computer Design Fundamentals Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization Charles Kime & Thomas Kaminski 2008 Pearson Education, Inc. (Hyperlinks are active in View Show
More informationGet Free notes at Module-I One s Complement: Complement all the bits.i.e. makes all 1s as 0s and all 0s as 1s Two s Complement: One s complement+1 SIGNED BINARY NUMBERS Positive integers (including zero)
More informationPhiladelphia University Faculty of Information Technology Department of Computer Science. Computer Logic Design. By Dareen Hamoudeh.
Philadelphia University Faculty of Information Technology Department of Computer Science Computer Logic Design By Dareen Hamoudeh Dareen Hamoudeh 1 Canonical Forms (Standard Forms of Expression) Minterms
More informationChapter 2 Combinational
Computer Engineering 1 (ECE290) Chapter 2 Combinational Logic Circuits Part 2 Circuit Optimization HOANG Trang 2008 Pearson Education, Inc. Overview Part 1 Gate Circuits and Boolean Equations Binary Logic
More information4 KARNAUGH MAP MINIMIZATION
4 KARNAUGH MAP MINIMIZATION A Karnaugh map provides a systematic method for simplifying Boolean expressions and, if properly used, will produce the simplest SOP or POS expression possible, known as the
More informationBoolean Analysis of Logic Circuits
Course: B.Sc. Applied Physical Science (Computer Science) Year & Sem.: IInd Year, Sem - IIIrd Subject: Computer Science Paper No.: IX Paper Title: Computer System Architecture Lecture No.: 7 Lecture Title:
More informationCh. 5 : Boolean Algebra &
Ch. 5 : Boolean Algebra & Reduction elektronik@fisika.ui.ac.id Objectives Should able to: Write Boolean equations for combinational logic applications. Utilize Boolean algebra laws and rules for simplifying
More informationChapter 3. Gate-Level Minimization. Outlines
Chapter 3 Gate-Level Minimization Introduction The Map Method Four-Variable Map Five-Variable Map Outlines Product of Sums Simplification Don t-care Conditions NAND and NOR Implementation Other Two-Level
More informationSummary. Boolean Addition
Summary Boolean Addition In Boolean algebra, a variable is a symbol used to represent an action, a condition, or data. A single variable can only have a value of or 0. The complement represents the inverse
More informationSimplification of Boolean Functions
COM111 Introduction to Computer Engineering (Fall 2006-2007) NOTES 5 -- page 1 of 5 Introduction Simplification of Boolean Functions You already know one method for simplifying Boolean expressions: Boolean
More informationUnit-IV Boolean Algebra
Unit-IV Boolean Algebra Boolean Algebra Chapter: 08 Truth table: Truth table is a table, which represents all the possible values of logical variables/statements along with all the possible results of
More informationGate-Level Minimization. BME208 Logic Circuits Yalçın İŞLER
Gate-Level Minimization BME28 Logic Circuits Yalçın İŞLER islerya@yahoo.com http://me.islerya.com Complexity of Digital Circuits Directly related to the complexity of the algebraic expression we use to
More informationX Y Z F=X+Y+Z
This circuit is used to obtain the compliment of a value. If X = 0, then X = 1. The truth table for NOT gate is : X X 0 1 1 0 2. OR gate : The OR gate has two or more input signals but only one output
More informationGate Level Minimization
Gate Level Minimization By Dr. M. Hebaishy Digital Logic Design Ch- Simplifying Boolean Equations Example : Y = AB + AB Example 2: = B (A + A) T8 = B () T5 = B T Y = A(AB + ABC) = A (AB ( + C ) ) T8 =
More informationMenu. Algebraic Simplification - Boolean Algebra EEL3701 EEL3701. MSOP, MPOS, Simplification
Menu Minterms & Maxterms SOP & POS MSOP & MPOS Simplification using the theorems/laws/axioms Look into my... 1 Definitions (Review) Algebraic Simplification - Boolean Algebra Minterms (written as m i ):
More informationENGIN 112 Intro to Electrical and Computer Engineering
ENGIN 2 Intro to Electrical and Computer Engineering Lecture 8 Minimization with Karnaugh Maps Overview K-maps: an alternate approach to representing oolean functions K-map representation can be used to
More informationSYNERGY INSTITUTE OF ENGINEERING & TECHNOLOGY,DHENKANAL LECTURE NOTES ON DIGITAL ELECTRONICS CIRCUIT(SUBJECT CODE:PCEC4202)
Lecture No:5 Boolean Expressions and Definitions Boolean Algebra Boolean Algebra is used to analyze and simplify the digital (logic) circuits. It uses only the binary numbers i.e. 0 and 1. It is also called
More informationLiteral Cost F = BD + A B C + A C D F = BD + A B C + A BD + AB C F = (A + B)(A + D)(B + C + D )( B + C + D) L = 10
Circuit Optimization Goal: To obtain the simplest implementation for a given function Optimization is a more formal approach to simplification that is performed using a specific procedure or algorithm
More information2008 The McGraw-Hill Companies, Inc. All rights reserved.
28 The McGraw-Hill Companies, Inc. All rights reserved. 28 The McGraw-Hill Companies, Inc. All rights reserved. All or Nothing Gate Boolean Expression: A B = Y Truth Table (ee next slide) or AB = Y 28
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian محرم 1439 ه Winter
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 3 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter
More informationUNIT II. Circuit minimization
UNIT II Circuit minimization The complexity of the digital logic gates that implement a Boolean function is directly related to the complexity of the algebraic expression from which the function is implemented.
More informationDate Performed: Marks Obtained: /10. Group Members (ID):. Experiment # 04. Boolean Expression Simplification and Implementation
Name: Instructor: Engr. Date Performed: Marks Obtained: /10 Group Members (ID):. Checked By: Date: Experiment # 04 Boolean Expression Simplification and Implementation OBJECTIVES: To understand the utilization
More informationCSCI 220: Computer Architecture I Instructor: Pranava K. Jha. Simplification of Boolean Functions using a Karnaugh Map
CSCI 22: Computer Architecture I Instructor: Pranava K. Jha Simplification of Boolean Functions using a Karnaugh Map Q.. Plot the following Boolean function on a Karnaugh map: f(a, b, c, d) = m(, 2, 4,
More informationCombinational Circuits Digital Logic (Materials taken primarily from:
Combinational Circuits Digital Logic (Materials taken primarily from: http://www.facstaff.bucknell.edu/mastascu/elessonshtml/eeindex.html http://www.cs.princeton.edu/~cos126 ) Digital Systems What is a
More informationStandard Forms of Expression. Minterms and Maxterms
Standard Forms of Expression Minterms and Maxterms Standard forms of expressions We can write expressions in many ways, but some ways are more useful than others A sum of products (SOP) expression contains:
More information3.4 QUINE MCCLUSKEY METHOD 73. f(a, B, C, D, E)¼AC ĒþB CD þ BCDþĀBD.
3.4 QUINE MCCLUSKEY METHOD 73 FIGURE 3.22 f(a, B, C, D, E)¼B CD þ BCD. FIGURE 3.23 f(a, B, C, D, E)¼AC ĒþB CD þ BCDþĀBD. A¼1map are, 1, and 1, respectively, whereas the corresponding entries in the A¼0
More informationCombinational Logic Circuits
Chapter 2 Combinational Logic Circuits J.J. Shann (Slightly trimmed by C.P. Chung) Chapter Overview 2-1 Binary Logic and Gates 2-2 Boolean Algebra 2-3 Standard Forms 2-4 Two-Level Circuit Optimization
More informationKarnaugh Maps. Kiril Solovey. Tel-Aviv University, Israel. April 8, Kiril Solovey (TAU) Karnaugh Maps April 8, / 22
Karnaugh Maps Kiril Solovey Tel-Aviv University, Israel April 8, 2013 Kiril Solovey (TAU) Karnaugh Maps April 8, 2013 1 / 22 Reminder: Canonical Representation Sum of Products Function described for the
More informationSwitching Circuits & Logic Design
Switching Circuits & Logic Design Jie-Hong Roland Jiang 江介宏 Department of Electrical Engineering National Taiwan University Fall 23 5 Karnaugh Maps K-map Walks and Gray Codes http://asicdigitaldesign.wordpress.com/28/9/26/k-maps-walks-and-gray-codes/
More informationChapter 2 Boolean algebra and Logic Gates
Chapter 2 Boolean algebra and Logic Gates 2. Introduction In working with logic relations in digital form, we need a set of rules for symbolic manipulation which will enable us to simplify complex expressions
More informationCS8803: Advanced Digital Design for Embedded Hardware
CS883: Advanced Digital Design for Embedded Hardware Lecture 2: Boolean Algebra, Gate Network, and Combinational Blocks Instructor: Sung Kyu Lim (limsk@ece.gatech.edu) Website: http://users.ece.gatech.edu/limsk/course/cs883
More informationENGIN 112. Intro to Electrical and Computer Engineering
ENIN 2 Intro to Electrical and Computer Engineering Lecture 6 More Boolean Algebra ENIN2 L6: More Boolean Algebra September 5, 23 A B Overview Epressing Boolean functions Relationships between algebraic
More informationEECS150 Homework 2 Solutions Fall ) CLD2 problem 2.2. Page 1 of 15
1.) CLD2 problem 2.2 We are allowed to use AND gates, OR gates, and inverters. Note that all of the Boolean expression are already conveniently expressed in terms of AND's, OR's, and inversions. Thus,
More informationLecture 5. Chapter 2: Sections 4-7
Lecture 5 Chapter 2: Sections 4-7 Outline Boolean Functions What are Canonical Forms? Minterms and Maxterms Index Representation of Minterms and Maxterms Sum-of-Minterm (SOM) Representations Product-of-Maxterm
More informationIntroduction to Computer Architecture
Boolean Operators The Boolean operators AND and OR are binary infix operators (that is, they take two arguments, and the operator appears between them.) A AND B D OR E We will form Boolean Functions of
More information數位系統 Digital Systems 朝陽科技大學資工系. Speaker: Fuw-Yi Yang 楊伏夷. 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象, 視之不可見者曰夷
數位系統 Digital Systems Department of Computer Science and Information Engineering, Chaoyang University of Technology 朝陽科技大學資工系 Speaker: Fuw-Yi Yang 楊伏夷 伏夷非征番, 道德經察政章 (Chapter 58) 伏者潛藏也道紀章 (Chapter 14) 道無形象,
More informationDigital Logic Design (CEN-120) (3+1)
Digital Logic Design (CEN-120) (3+1) ASSISTANT PROFESSOR Engr. Syed Rizwan Ali, MS(CAAD)UK, PDG(CS)UK, PGD(PM)IR, BS(CE)PK HEC Certified Master Trainer (MT-FPDP) PEC Certified Professional Engineer (COM/2531)
More informationQUESTION BANK FOR TEST
CSCI 2121 Computer Organization and Assembly Language PRACTICE QUESTION BANK FOR TEST 1 Note: This represents a sample set. Please study all the topics from the lecture notes. Question 1. Multiple Choice
More informationDefinitions. 03 Logic networks Boolean algebra. Boolean set: B 0,
3. Boolean algebra 3 Logic networks 3. Boolean algebra Definitions Boolean functions Properties Canonical forms Synthesis and minimization alessandro bogliolo isti information science and technology institute
More informationSlide Set 5. for ENEL 353 Fall Steve Norman, PhD, PEng. Electrical & Computer Engineering Schulich School of Engineering University of Calgary
Slide Set 5 for ENEL 353 Fall 207 Steve Norman, PhD, PEng Electrical & Computer Engineering Schulich School of Engineering University of Calgary Fall Term, 207 SN s ENEL 353 Fall 207 Slide Set 5 slide
More informationENGINEERS ACADEMY. 7. Given Boolean theorem. (a) A B A C B C A B A C. (b) AB AC BC AB BC. (c) AB AC BC A B A C B C.
Digital Electronics Boolean Function QUESTION BANK. The Boolean equation Y = C + C + C can be simplified to (a) (c) A (B + C) (b) AC (d) C. The Boolean equation Y = (A + B) (A + B) can be simplified to
More informationUNIT-4 BOOLEAN LOGIC. NOT Operator Operates on single variable. It gives the complement value of variable.
UNIT-4 BOOLEAN LOGIC Boolean algebra is an algebra that deals with Boolean values((true and FALSE). Everyday we have to make logic decisions: Should I carry the book or not?, Should I watch TV or not?
More informationGate-Level Minimization
MEC520 디지털공학 Gate-Level Minimization Jee-Hwan Ryu School of Mechanical Engineering Gate-Level Minimization-The Map Method Truth table is unique Many different algebraic expression Boolean expressions may
More informationS1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017
S1 Teknik Telekomunikasi Fakultas Teknik Elektro FEH2H3 2016/2017 Karnaugh Map Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and
More informationCS470: Computer Architecture. AMD Quad Core
CS470: Computer Architecture Yashwant K. Malaiya, Professor malaiya@cs.colostate.edu AMD Quad Core 1 Architecture Layers Building blocks Gates, flip-flops Functional bocks: Combinational, Sequential Instruction
More informationGate-Level Minimization
Gate-Level Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2011 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method
More informationChapter 6. Logic Design Optimization Chapter 6
Chapter 6 Logic Design Optimization Chapter 6 Optimization The second part of our design process. Optimization criteria: Performance Size Power Two-level Optimization Manipulating a function until it is
More informationBoolean Function Simplification
Universit of Wisconsin - Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Charles R. Kime Section Fall 200 Chapter 2 Combinational Logic Circuits Part 5 Charles Kime & Thomas Kaminski Boolean Function
More informationReview: Standard forms of expressions
Karnaugh maps Last time we saw applications of Boolean logic to circuit design. The basic Boolean operations are AND, OR and NOT. These operations can be combined to form complex expressions, which can
More informationComputer Science. Unit-4: Introduction to Boolean Algebra
Unit-4: Introduction to Boolean Algebra Learning Objective At the end of the chapter students will: Learn Fundamental concepts and basic laws of Boolean algebra. Learn about Boolean expression and will
More informationSimplification of Boolean Functions
Simplification of Boolean Functions Contents: Why simplification? The Map Method Two, Three, Four and Five variable Maps. Simplification of two, three, four and five variable Boolean function by Map method.
More informationUniversity of Technology
University of Technology Lecturer: Dr. Sinan Majid Course Title: microprocessors 4 th year Lecture 5 & 6 Minimization with Karnaugh Maps Karnaugh maps lternate way of representing oolean function ll rows
More informationSwitching Theory And Logic Design UNIT-II GATE LEVEL MINIMIZATION
Switching Theory And Logic Design UNIT-II GATE LEVEL MINIMIZATION Two-variable k-map: A two-variable k-map can have 2 2 =4 possible combinations of the input variables A and B. Each of these combinations,
More informationComputer Organization
Computer Organization (Logic circuits design and minimization) KR Chowdhary Professor & Head Email: kr.chowdhary@gmail.com webpage: krchowdhary.com Department of Computer Science and Engineering MBM Engineering
More informationChapter 2 Part 5 Combinational Logic Circuits
Universit of Wisconsin - Madison ECE/Comp Sci 352 Digital Sstems Fundamentals Kewal K. Saluja and Yu Hen Hu Spring 2002 Chapter 2 Part 5 Combinational Logic Circuits Originals b: Charles R. Kime and Tom
More information1. Mark the correct statement(s)
1. Mark the correct statement(s) 1.1 A theorem in Boolean algebra: a) Can easily be proved by e.g. logic induction b) Is a logical statement that is assumed to be true, c) Can be contradicted by another
More informationBOOLEAN ALGEBRA. Logic circuit: 1. From logic circuit to Boolean expression. Derive the Boolean expression for the following circuits.
COURSE / CODE DIGITAL SYSTEMS FUNDAMENTAL (ECE 421) DIGITAL ELECTRONICS FUNDAMENTAL (ECE 422) BOOLEAN ALGEBRA Boolean Logic Boolean logic is a complete system for logical operations. It is used in countless
More informationAnnouncements. Chapter 2 - Part 1 1
Announcements If you haven t shown the grader your proof of prerequisite, please do so by 11:59 pm on 09/05/2018 (Wednesday). I will drop students that do not show us the prerequisite proof after this
More informationOutcomes. Unit 9. Logic Function Synthesis KARNAUGH MAPS. Implementing Combinational Functions with Karnaugh Maps
.. Outcomes Unit I can use Karnaugh maps to synthesize combinational functions with several outputs I can determine the appropriate size and contents of a memory to implement any logic function (i.e. truth
More informationGate-Level Minimization
Gate-Level Minimization ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Outlines The Map Method
More informationAustin Herring Recitation 002 ECE 200 Project December 4, 2013
1. Fastest Circuit a. How Design Was Obtained The first step of creating the design was to derive the expressions for S and C out from the given truth tables. This was done using Karnaugh maps. The Karnaugh
More informationBOOLEAN ALGEBRA. 1. State & Verify Laws by using :
BOOLEAN ALGEBRA. State & Verify Laws by using :. State and algebraically verify Absorption Laws. (2) Absorption law states that (i) X + XY = X and (ii) X(X + Y) = X (i) X + XY = X LHS = X + XY = X( + Y)
More informationDigital Techniques. Lecture 1. 1 st Class
Digital Techniques Lecture 1 1 st Class Digital Techniques Digital Computer and Digital System: Digital computer is a part of digital system, it based on binary system. A block diagram of digital computer
More informationCprE 281: Digital Logic
CprE 28: Digital Logic Instructor: Alexander Stoytchev http://www.ece.iastate.edu/~alexs/classes/ Minimization CprE 28: Digital Logic Iowa State University, Ames, IA Copyright Alexander Stoytchev Administrative
More informationProgrammable Logic Devices. Programmable Read Only Memory (PROM) Example
Programmable Logic Devices Programmable Logic Devices (PLDs) are the integrated circuits. They contain an array of AND gates & another array of OR gates. There are three kinds of PLDs based on the type
More informationPOWR IP PZ1/17
Silesian University of Technology as Centre of Modern Education Based on Research and Innovations POWR.03.05.00-IP.08-00-PZ1/17 Project co-financed by the European Union under the European Social Fund
More informationCombinational Logic & Circuits
Week-I Combinational Logic & Circuits Spring' 232 - Logic Design Page Overview Binary logic operations and gates Switching algebra Algebraic Minimization Standard forms Karnaugh Map Minimization Other
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2006 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems
More informationSWITCHING THEORY AND LOGIC CIRCUITS
SWITCHING THEORY AND LOGIC CIRCUITS COURSE OBJECTIVES. To understand the concepts and techniques associated with the number systems and codes 2. To understand the simplification methods (Boolean algebra
More informationCode No: R Set No. 1
Code No: R059210504 Set No. 1 II B.Tech I Semester Regular Examinations, November 2007 DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems
More informationMODULE 5 - COMBINATIONAL LOGIC
Introduction to Digital Electronics Module 5: Combinational Logic 1 MODULE 5 - COMBINATIONAL LOGIC OVERVIEW: For any given combination of input binary bits or variables, the logic will have a specific
More information3.3 Hardware Karnaugh Maps
2P P = P = 3.3 Hardware UIntroduction A Karnaugh map is a graphical method of Boolean logic expression reduction. A Boolean expression can be reduced to its simplest form through the 4 simple steps involved
More information