EECS 140/141 Introduction to Digital Logic Design Fall Semester 2016 Exam #1 Date: 3 October 2016

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Cameron Webster
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1 EECS 4/4 Introduction to Digital Logic Design Fall Semester 26 Exam # Date: 3 October 26 NAME: KUID: General Instructions. This exam is closed-book. You are allowed a non-communicating calculator and one side of one page (8.5" X ") of notes. 2. A reference sheet of the Boolean Algebra axioms and properties is supplied for your use. 3. Put your KUID on each page, in case the exam pages get separated. 4. There are points possible on this exam. 5. When logic network diagrams are requested, you must draw them using your logic template. Failure to do this will be penalized. 6. Clearly indicate your final answer to each problem by putting a box around it (not necessary for logic network diagrams). 7. Show your work: a. If your answer is incorrect, partial credit may be awarded based on the work shown. Even if your answer is correct, you will not receive full credit unless you have shown some work on the exam pages. b. In particular, if you are asked to prove a relationship using algebraic manipulations from Boolean Algebra, you should justify each step with a property number from the Boolean Algebra reference sheet. c. Show all work on the exam pages. Ihave tried to leave lots of room for you to show your work, and the back side of the last page is blank for you to continue work for some problem if you need to. Please do not use any other pages unless absolutely necessary. If you do use the back side of the last page or other paper, clearly indicate on the problem page that there is additional work elsewhere (and where that additional work is). d. You may use the logic network diagrams and K-maps printed on the exam pages to show some of your work -- you do not need to re-copy them unless you wish to. e. The bottom line is this: the easier it is for me to figure out what you are trying to do, the more likely I will be to award partial credit. 8. Stay calm. If you are having trouble with one problem (or part of a problem), leave it and go on. Even if you are not able to work one part of a problem, you may still be able to work subsequent parts.

2 EECS 4/4 Exam # -2- KUID:. This problem uses the function F(A, B, C) described in the Truth Table below: A B C F a. (5 points) Write this function in sum of minterm form. That is, re-write and complete the expression below by putting the appropriate minterm numbers in the parentheses: F(A, B, C) =Σm(... ) b. (5 points) Show the Karnaugh Map (K-Map) for the function F(A, B, C). c. (5 points) Write a logic expression for the function F( A, B, C) in Canonical Sum of Products (CSoP) form.

3 EECS 4/4 Exam # -3- KUID: 2. This problem has to do with the following logic function, which is expressed in Sum of Products (SoP) form. F = A + BC + BC a. (5 points) Draw the Karnaugh Map (K-Map) for this function F. b. (5 points) Give the expression for this function F in Canonical Product of Sums (CPoS) form.

4 EECS 4/4 Exam # -4- KUID: 3. Consider the following K-Map for function J, which we will be implementing with a Sum of Products (SoP) form. Each d in the K-Map indicates a do n t care output. AB CD d d d d a. (5 points) Identify all of the Prime Implicants (PIs) for J, writing a logic expression for each one. b. (5 points) Identify all of the Essential Prime Implicants (EPIs) for J, writing a logic expression for each one.

5 EECS 4/4 Exam # -5- KUID: c. (5 points) Find a minimum-cost SoP synthesis for J. d. (5 points) Find the cost (as we have defined it in this class) of your minimum-cost SoP synthesis from part (c). e. (5 points) Find the cost (as we have defined it in this class) for the Canonical Sum of Products (CSoP) synthesis for J.

6 EECS 4/4 Exam # -6- KUID: 4. ( points) This problem requires you to convert a word description of a situation into a Boolean Algebra logic expression. Youhave one (and only one) credit card. This credit card can be used at any store, but if you use it at your local Sears store, you get a 5% discount on your purchases (your purchases cost 5% less). Youalso have a bank debit card that you can use to make purchases, or you can make purchases using paper money. You may have any combination of credit card, debit card, or sufficient paper money with you when you want to make a purchase. The following three "rules" describe the use of the credit card to make purchases. Every store requires you to have your credit card with you in order to purchase anything with the credit card. You have decided that you will always prefer to use your credit card for any purchase at the local Sears store (in order to get the discount). Atall other stores except the local Sears store, you have decided to use the credit card for a purchase only if you do not have either sufficient paper money or your bank debit card with you at the time of the purchase. Let B represent a binary variable that has value if you use your credit card for a given purchase and has value if you do not use your credit card for a given purchase. Using the "rules" given above, write a Boolean expression for the function B. You do not need to try to simplify your expression at all; the expression can (indeed should) follow directly from the three "rules" given above. You do need to clearly define every "input" variable and what each variable s binary values represent. Notice that I have done this for the binary "output" variable (B) that represents whether or not you use your credit card for a given purchase. There is more space for this problem on the next page.

7 EECS 4/4 Exam # -7- KUID: More space for the problem on the previous page.

8 EECS 4/4 Exam # -8- KUID: 5. This problem has to do with the following logic function. F = A + BC + BC a. (5 points) Suppose this function were implemented exactly as written, using AND, OR, and NOT gates. If the implementation were done with CMOS technology, how many transistors would be required? Be sure to include the transistors for all NOT gates used. b. ( points) Using your logic template, draw the logic network for the above function using only NAND gates.

9 EECS 4/4 Exam # -9- KUID: 6. ( points) Use the definition of the exclusive OR (XOR) function and Boolean Algebra properties to put the following expression with variables A, B, and C in Sum of Products (SoP) form; any SoP form will do -- it does not need to be in Canonical Sum of Products (CSoP) form. Your first step should apply the definition of the XOR function to the expression. You must justify every other step with a Boolean Algebra property number or numbers from the provided reference sheet. Youmay not use a Truth Table or K-map to show the equality, but you may use these forms to check your answer. AXOR (B + C )

10 EECS 4/4 Exam # -- KUID: 7. Two functions (F and G) both have the same set of inputs (A, B, C). The K-map of each function is given below. AB AB C C Function F Function G In this problem, you are to find a minimum-cost, Sum of Products (SoP) synthesis for the joint 3-input, 2-output function. Specifically, do the following: a. ( points) Give the jointly minimized SoP logic expressions for both F and G. b. (5 points) Draw the jointly minimized, 3-input, 2-output logic circuit (using your logic template), using AND, OR, and NOT gates. There is more space for this problem on the next page.

11 EECS 4/4 Exam # -- KUID: More space for the problem given onthe previous page.

12 EECS 4/4 Exam # -2- KUID: More space for any problem.

EECS 140/141 Introduction to Digital Logic Design Spring Semester 2017 Exam #1 Date: 27 February 2017

EECS 140/141 Introduction to Digital Logic Design Spring Semester 2017 Exam #1 Date: 27 February 2017 EECS 4/4 Introduction to Digital Logic Design Spring Semester 27 Exam # Date: 27 February 27 NAME: KUID: General Instructions. This exam is closed-book. You are allowed a non-communicating calculator and