CPSC 330 Computer Organization

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1 CPSC 330 Computer Organization Chapter 2-II Instructions: Language of the computer MIPS Instructions - Review Instruction Meaning add $s1,$s2,$s3 $s1 = $s2 + $s3 sub $s1,$s2,$s3 $s1 = $s2 $s3 addi $s1,$s1,4 $s1 = $s1 + 4 sub $s1,$s2,$s3 $s1 = $s2 $s3 slt $t0,$s0,$s1 if ($s0 < $s1) then $t0 gets 1 otherwise $t0 gets 0 lw $s1,100($s2) $s1 = Memory[$s2+25] sw $s1,100($s2) Memory[$s2+25] = $s1 bne $s4,$s5,l Next instr. is at Label if $s4? $s5 beq $s4,$s5,l Next instr. is at Label if $s4 = $s5 jr $t1 jump via register: go to the address specified by $t1 j Label mult $t1,$t2 go to the target address {Hi,Lo} = $t1*$t2 div $t1,$t2 Lo = $t1/$t2; Hi = $t1%$t2 mflo $a0 move from Lo to $s0 new CPSC330 CompOrg: Dr. Gerousis Instructions 2 Instruction Format - Review MIPS Register Convention R I J op rs rt rd shamt funct op rs rt 16 bit address op 26 bit address Name Register number Usage $zero 0 the constant value 0 $v0-$v1 2-3 values for results and expression evaluation $a0-$a3 4-7 arguments $t0-$t temporaries $s0-$s saved $t8-$t more temporaries CPSC330 CompOrg: Dr. Gerousis Instructions 3 CPSC330 CompOrg: Dr. Gerousis Instructions 4 1

2 R - Format Example - Review MIPS Example sub $t1, $s1, $s2 opcode = 0 (lookup in table) funct = 34 (lookup in table) rs = 17 (first operand) rt = 18 (second operand) rd = 8 (destination) shamt = 0 (no shift) op rs rt rd shamt funct I - Format Example - Review MIPS Example lw $t0, 32($s2) # $t0 = addr [$s2 + 32/4] (offset) opcode = 35 (lookup in table) rs = 18 (first operand) rt = 9 (second operand) op rs rt 16-bit number CPSC330 CompOrg: Dr. Gerousis Instructions 5 CPSC330 CompOrg: Dr. Gerousis Instructions 6 J - Format Example - Review MIPS Example j Loop # go to location Loop Exercise Scoreboard the operation of the program by single-stepping through the MIPS code and recording results in the trace table. No register operands. Operand destination address is signed word offset from PC op 26-bit number Trace Table 0x400:a addi $t0, $zero, 3 0x404:b add $v0, $t0, $t0 0x408:c addi $t0, $t0, -1 0x40c:d bne $t0, $zero, b 0x410:e j e Step pc t0 v0 CPSC330 CompOrg: Dr. Gerousis Instructions 7 CPSC330 CompOrg: Dr. Gerousis Instructions 8 2

3 Addressing Modes Everything has an address Computers need to know Where to go next? Where to get data? Program execution either Continues sequentially or Branches (near) or jumps (far) somewhere else. Programs get data either from Registers (fast and inside CPU) or... Memory (maybe near, maybe far)... (or sometimes directly from IO devices). MIPS assembler What is an assembler? An assembler translates assembly language (human readable instructions) into machine language (binary instructions, 1 s & 0 s). It s a program, similar to a compiler, only it uses a language specific to a computer s ISA. CPSC330 CompOrg: Dr. Gerousis Instructions 9 CPSC330 CompOrg: Dr. Gerousis Instructions 10 Decoding Machine Language What is the assembly language statement corresponding to the this machine instruction: (00af8020) 16? op rs rt rd shamt funct Fields: Op: 6 bits rs, rt, rd, shamt: 5 bits Funct: 6 bits Name Register number Usage $zero 0 the constant value 0 $v0-$v1 2-3 values for results and expression evaluation $a0-$a3 4-7 arguments $t0-$t temporaries $s0-$s saved $t8-$t more temporaries $gp 28 global pointer $sp 29 stack pointer $fp 30 frame pointer $ra 31 return address MIPS Assembler How does it work? It reads an input text file (a program written in assembly language), then it parses a line of program at a time and assembles them into machine code instructions. Lines contain either: Single instructions Assembler directives Comments (lines preceded with # or just blank) It produces an output binary file that contains machine code, data, and startup info. CPSC330 CompOrg: Dr. Gerousis Instructions 11 CPSC330 CompOrg: Dr. Gerousis Instructions 12 3

4 MIPS Assembler What are directives? Directives tell the assembler to do something else besides assembling..text <address> : Store subsequent program instructions or static data at address specified (if present) in the text segment.data <address> : Indicates that subsequent data items should be put in data segment MIPS Assembler More directives.byte <b>, : Store bytes in data segment.half <h>, : Store half -words (16bit).word <w>, : Store words (32bit).double <d>, : Store double words (64bit).float <f>, : Store floating point numbers.ascii <string> : store string in memory.asciiz <string> : store string zero terminated CPSC330 CompOrg: Dr. Gerousis Instructions 13 CPSC330 CompOrg: Dr. Gerousis Instructions 14 Assembler & SPIM:Starting a program SPIM Windows version C pro gram Compiler Assembly langua ge progr am Assembler Object: Machinelanguage module Object: Library routine(machinelanguage) The CD that accompanies the book contains Software: HDL simulators, MIPS simulator, and FPGA design tools. Tutorials: SPIM, Verilog, and VHDL. Content/Software/Spim/Pcspim Linker Executable: Machine languageprogram Loader M emory CPSC330 CompOrg: Dr. Gerousis Instructions 15 CPSC330 CompOrg: Dr. Gerousis Instructions 16 4

5 SPIM Windows version Registers window shows the values of all registers in the MIPS CPU Text segment window: shows assembly inst. & machine code Data segment window: shows the data loaded into the program s memory Messages window: shows PCSpim messages Separate console window appears for I/O CPSC330 CompOrg: Dr. Gerousis Instructions 17 Using SPIM Simulator -> Settings : In the Display section check only the first two items Save window positions and General registers in hexadecimal Simulator -> Set Value : to load PC with address of first instruction enter Address or Register Name as PC and enter Value as 0x Reason: the text area of memory, where programs are stored, starts here. Simulator -> Go : run loaded program F5 Click the OK button in the Run Parameters pop-up window if the StartingAddress: value is 0x Simulator -> Break : stop execution Simulator -> Clear Registers and Reinitialize : clean-up before new run CPSC330 CompOrg: Dr. Gerousis Instructions 18 Using SPIM Simulator Reload : load file again after editing Simulator Single Step (F10) or Multiple Step (F11): stepping to debug Simulator Breakpoints: set breakpoints Arithmetic Example for SPIM # Using SPIM, write and debug a program to input two # numbers, then computes and prints their sum and their difference. Use the # SPIM system calls read_int (5, $a0), print_int (1, $v0). # # Inputs : # integer values # Outputs: # sum, diff. # Register Usage: # $t2 = arg1 # $t4 = arg1 # $v0 = function code # $a0 = string pointer #-.text #.globl main # Entry point for SPIM linkage. CPSC330 CompOrg: Dr. Gerousis Instructions 19 CPSC330 CompOrg: Dr. Gerousis Instructions 20 5

6 Example (continued) Example (continued) main: nop li $v0, 4 # Load code for print_str. la $a0, askstr1 # Load address of string # Print string li $v0, 5 # Load code for read # Get arg1 move $t2, $v0 # Save arg1 li $v0, 4 # Load code for print_str. la $a0, askstr2 # Load address of string # Print string li $v0, 5 # Load code for read # Get arg2 move $t4, $v0 # Save arg2 CPSC330 CompOrg: Dr. Gerousis Instructions 21 compute: li $v0, 4 # Load code for print_str. la $a0, sumstr # Load address of string. # Print string. add $a0, $t2, $t4 # Add them. li $v0, 1 # Load code for print_int. # Print li $v0, 4 # Load code for print_str. la $a0, difstr # Load address of string # Print string sub $a0, $t2, $t4 # Subtract them li $v0, 1 # Load code for print_int. # Print.data askstr1:.asciiz "Enter an integer." askstr2:.asciiz "Enter another integer." sumstr:.asciiz "\ntheir sum is : " difstr:.asciiz "\ntheir difference is : " CPSC330 CompOrg: Dr. Gerousis Instructions 22 save log file (ctrl+s) in File Registers ========================= PC = EPC = Cause = BadVAddr= Status = HI = LO = General Registers R0 (r0) = R8 (t0) = R16 (s0) = R 24 (t8) = R1 (at) = R9 (t1) = R17 (s1) = R 25 (t9) = R2 (v0) = R10 (t2) = a R18 (s2) = R 26 (k0) = R3 (v1) = R11 (t3) = R19 (s3) = R 27 (k1) = R4 (a0) = R12 (t4) = fffffff1 R20 (s4) = R 28 ( gp) = R5 (a1) = 7fffebc4 R13 (t5) = R21 (s5) = R 29 (sp) = 7fffebc0 R6 (a2) = 7fffebc8 R14 (t6) = R22 (s6) = R 30 (s8) = R7 (a3) = R15 (t7) = R23 (s7) = R 31 (ra ) = Double Floating Point Registers FP0 = FP8 = FP16 = F P24 = FP2 = FP10 = FP18 = F P26 = FP4 = FP12 = FP20 = F P28 = FP6 = FP14 = FP22 = F P30 = Single Floating Point Registers FP8 = FP16 = FP0 = F P24 = FP1 = FP9 = FP17 = F P25 = FP2 = FP10 = FP18 = F P26 = FP3 = FP11 = FP19 = F P27 = FP4 = FP12 = FP20 = F P28 = FP5 = FP13 = FP21 = F P29 = FP6 = FP14 = FP22 = F P30 = FP7 = FP15 = FP23 = F P31 = Next time... Wrapping-up chapter 2 Branching and Looping Alternative Architectures IA-32 CPSC330 CompOrg: Dr. Gerousis Instructions 23 CPSC330 CompOrg: Dr. Gerousis Instructions 24 6

MIPS and QTSPIM Recap. MIPS Architecture. Cptr280. Dr Curtis Nelson. Cptr280, Autumn

MIPS and QTSPIM Recap. MIPS Architecture. Cptr280. Dr Curtis Nelson. Cptr280, Autumn MIPS and QTSPIM Recap Cptr280 Dr Curtis Nelson MIPS Architecture The MIPS architecture is considered to be a typical RISC architecture Simplified instruction set Programmable storage 32 x 32-bit General