WSTS Semantics and Software APIs for the Efficient Use of Time in Time Sensitive Systems Using General Purpose Compute Hardware

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1 WSTS 2015 Semantics and Software APIs for the Efficient Use of in Sensitive Systems Using General Purpose Compute Hardware Kevin B. Stanton, Ph.D. Sr. Principal Engineer, Intel

2 ABSTRACT While enormous improvements have been made in the accuracy of the TIME delivered to networked systems, access to precise, distributed time by software applications and computer peripherals has not kept pace. Enhancements are needed to provide software semantics and APIs at all levels in the system in order to make network time fully usable within computer and CPS devices and their peripherals without causing unnecessary disruption to current software methods. This talk outlines both architectural and implementation challenges and proposes a framework for addressing them. 2

3 Now that we have Synchronized Network, e.g. IEEE 1588/PTP TIME Improvement g_press#mediaviewer/file:handtie gelpresse_von_1811.jpg 3 It s akin to reducing the time uncertainty From a football field 1 square meter a_auf_schalke_hosting_schalke_04_vs_dortmund_in_2009.jpg

4 System Architecture For the purposes of this presentation Network = Any Shared or Common / Synchronized base CPU System I/O Subsystems Event stamp/ Generation CPU CPU CPU System System Software Event Trigger Software Event Capture Signal Sampling Signal Generation Accurate Network 4 Modern Computer Systems have Multiple Internal bases That Won t (and Need Not) Change

5 Application Software separated from Network by a large chasm 5 For software, NOW is never really Now Reading Network can be VERY SLOW

6 Make A Copy? One Approach for Bringing Network Near to the Software CPU Computer System PTP Grand Master 6 Replicating Network in the CPU Hardware Doesn t Scale See next slide

7 Modern Computer Systems Aren t So Simple Wi-Fi App 1 App 2 Operating System GNSS CPU Hypervisor App 3 App 4 Operating System The Reality: There are Multiple Network Sources Some Applications Track Multiple Sources Simultaneously Multiple Virtual Machines / Operating Systems W GNSS Constellation Clock Sources 7 Multiple Hardware s in the CPU Doesn t Scale

8 CPU Hardware Clock Reference PTP GM #0 m b * + Virtualized (External) bases Scalable base Representation Here s what s needed: 1. A Stable HW Reference 2. Instantaneous * and + Ops PTP GM #2 m b * + 3. Exact measure of m and b Any base Any base [I wish I had time to talk about POSIX Clocks] GNSS m b * + 8 Given [(m 0,b 0 ), (m 1,b 1 ), ], Can Convert CPU time into any External Clock, and Vice Versa

9 Measuring m and b Simultaneous Cross-stamp Capture m b m b Cross-stamp pairs of clocks 1. System Clock Reference, and 2. The Other Clock The goal is Simultaneity Software Cross-stamping example: The Linux IOCTL: PTP_SYS_OFFSET Should be done with tight sequence of instructions (with interrupts disabled) However: - PTP_SYS_OFFSET does not - The System Clock that s referenced is CLOCK_REALTIME, which is a softwaredisciplined timebase Proposed Enhancements: - Capture the pair in the driver - Together with CLOCK_MONOTONIC_RAW 9 Hardware Representation of Multiple Clocks In the CPU Doesn t Scale Cross-stamping DOES Scale.

10 Scenario: Cross stamps, Captured Simultaneously PTM Hardware Measurement with PCIe PTM (Precision Measurement) 1. Device initiates PTM Request to Root Complex (trigger is device-specific) 2. PTM is Returned (delays are compensated ) 3. (PTM, PTP ) Written to Memory PTP Network Computer System PTM PCIe Root Complex Switch Delays Over PCIe Links and through Switches compensated Other I/O Device PCIe PTM Passes In-Band Over PCIe [Including Switches]

11 Summary Modern Computer Systems have Multiple Internal bases For Software, Now is never Now, Network is Far Away Replicating Network in CPU Hardware Doesn t Scale Given [(m0,b0), (m1,b1), ], Software Can Convert CPU into the Relevant External base, and Vice Versa Cross-stamping Scales Closer to the Hardware is Better An Example: PCIe PTM Passes In-Band Over PCIe [Including Switches] I welcome further discussion: Kevin dot B dot Stanton at Intel 11

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