Prefetch Cache Module

Transcription

1 PIC32 TM Prefetch Cache Module 2008 Microchip Technology Incorporated. All Rights Reserved. PIC32 Prefetch Cache Module Slide 1 Hello and welcome to the PIC32 Prefetch Cache Module webinar. I am Nilesh Rajbharti, Applications Engineering Manager for PIC32 products. In next few minutes, I will provide a quick overview of the PIC32 Prefetch Cache Module. Let s begin. 1

2 Prefetch Cache MIPS M4K 32-bit Core DMA 2-Wire Debug USB OTG Bus Matrix Prefetch Cache Flash SRAM Interrupt Controller GPIOs VREG Peripheral Bus 16-bit PMP 10-bit ADC Input Capture Output Compare 16-bit Timer RTCC I 2 C UART SPI Analog Comparators 2008 Microchip Technology Incorporated. All Rights Reserved. PIC32 Prefetch Cache Module Slide 2 The Prefetch Cache module plays a key role in the performance of the PIC32 at higher frequencies. It keeps track of the instructions the CPU is executing and automatically prefetches next sequential instructions and stores them in a high speed cache memory. The PIC32 Prefetch Cache module is designed to cache the Flash memory content only. The PIC32 SRAM runs at the CPU speed and it does not need any cache memory. The PIC32 Prefetch Cache module provides multiple operating modes to suit an application s deterministic behavior. This block diagram shows where the Prefetch Cache module is located in the overall system block diagram. 2

3 Effect of Prefetch Cache Ideal Performance Cached Non-Cached Processor Speed (MHz) 2008 Microchip Technology Incorporated. All Rights Reserved. PIC32 Prefetch Cache Module Slide 3 With that brief Prefetch Cache module introduction, let s see why the Prefetch Cache module is important. This graph shows three different scenarios. The Ideal scenario assumes that the Flash memory runs as fast as the CPU. It means that, as processor frequency is increased, the performance increases linearly. But in nearly all high-speed processors, the flash memory speed is limited to a specific frequency. For example, the PIC32 Flash memory runs at the maximum speed of 30 MHz. This restriction requires that as you increase the processor frequency beyond 30 MHz, the CPU must be programmed to insert one wait state for every read from the Flash memory. An operation beyond 60 MHz would require 2 wait states. Because of these wait states, the effective Flash throughput will be reduced. The Non-Cached line shows what happens when there is no prefetch cache module available and Flash memory is limited to 30 MHz. In this case, processor performance drops significantly as frequency is increased beyond the Flash speed of 30 MHz. The Cached line shows the performance when Prefetch Cache module is enabled. As you can see, the performance with the Prefetch Cache line enabled is significantly better than the Non-Cached scenario. The exact performance improvement depends on the code organization of the application. 3

4 Prefetch Cache Details 16x128-bit Cache Lines 128-bit Wide Flash PIC32 CPU 128-bit Wide Prefetch Buffer Individual enable/disable for Prefetch and Cache 4x32-bit or 8x16-bit instructions per line SW can Read, Write and Lock any line Up to 4 ROM Data lines 2 lines with address mask 2008 Microchip Technology Incorporated. All Rights Reserved. PIC32 Prefetch Cache Module Slide 4 Let s look at the construction of the Prefetch Cache module. The Prefetch Cache module consists of a prefetch buffer, cache memory and associated control logic. The SW may individually enable or disable the Prefetch Buffer or Cache memory. This level of control allows the application to achieve different level of determinisms. The prefetch buffer is a 128-bit buffer with integrated logic to automatically fetch the next 128-bit of data based on the current instruction the CPU is executing. The cache memory is divided into 16 lines of 128-bit data. Each line may hold either 4 32-bit instructions or 8 16-bit instructions. Out of 16 cache lines, SW may reserve up to 4 lines for ROM or constant data storage. This feature is useful if the application is going to make frequent accesses to constant data. All of the 16 lines are readable and writeable by the SW and can also be locked. Once a line is locked, the Prefetch Cache logic will not replace it with any new data. This feature is useful to increase the performance of a frequently used piece of code such as a small loop or interrupt prologue. With the address masking capability, the prefetch module can be programmed to return common prologue code for all interrupts. 4

5 Prefetch Cache Operation 16x128-bit Cache Lines 128-bit Wide Flash PIC32 CPU 1. CPU fetches a Flash location 2. Location not in Cache Cache Miss 3. Prefetch buffer fetches 128-bit of data containing location bit data is loaded in a line per LRU 5. Location content is returned to CPU 2008 Microchip Technology Incorporated. All Rights Reserved. PIC32 Prefetch Cache Module Slide 5 Now let s see how Prefetch Cache module operates. In Step 1, the CPU fetches a specific Flash location it could be for an instruction or a constant data. Step 2 Assume that this is the first time the CPU is accessing this location. It means that cache does not contain that particular location. This condition is called a Cache Miss. Step 3 Now that there was a cache miss, the cache logic instructs the prefetch buffer to read the Flash memory. The prefetch logic will wait a predetermined number of cycles before reading the Flash memory. Step 4 Once the 128-bit of data is loaded in the prefetch buffer, it is copied to an available cache line in cache. The cache controller uses Least Recently Used algorithm to determine which cache line to use. Step 5 Now that the requested location is in the cache, the cache module returns the content to the CPU. As CPU is executing the previously returned instruction, the prefetch logic automatically fetches the next 128-bit of data from Flash and keeps it ready in case the CPU needs it. 5

6 Where to Get More Information Visit Prefetch Cache Chapter in PIC32 Datasheet and Family Reference Manual Prefetch Code Examples in MPLAB C32 and on Microchip web site 2008 Microchip Technology Incorporated. All Rights Reserved. PIC32 Prefetch Cache Module Slide 6 So, you now have a high level understanding of PIC32 Prefetch Cache Module. To learn more, visit This site contains PIC32 Datasheet, Family Reference Manual and various other resources. This site also provides Prefetch Cache Module specific code examples using MPLAB C32 C Compiler. These same code examples are also available in the C32 compiler distribution. Thanks for your time. 6