DESIGN AND IMPLEMENTATION OF OPTIMIZED PACKET CLASSIFIER

Transcription

1 International Journal of Computer Engineering and Applications, Volume VI, Issue II, May 14 ISSN DESIGN AND IMPLEMENTATION OF OPTIMIZED PACKET CLASSIFIER Kiran K C 1, Sunil T D 2, Dr. M Z Kurian th semester, M.Tech (Digital Electronics), SSIT, Tumkur, Karnataka (kiran) 2 Assistant Professor, Dept. of ECE, SSIT, Tumkur, Karnataka. H. O. D, Dept. of ECE, SSIT, Tumkur, Karnataka ABSTRACT: Packet classification is used by networking equipment to sort packets into flows by comparing their headers to a list of rules, packets are placed in the flow specified by the matched rule. Flow determined is used to decide a packet s priority and the manner in which it is processed. Here the concept of HyperCut algorithm is used to implement the classifier by using the indexing method. Keywords: Hicut, Hypercut, modular packet classification, RFC,BV,Tuple space search, indexing [1] INTRODUCTION There is a huge increase in Internet usage because of its ease of access through a wide range of devices such as desktops, notebooks, tablets, and smartphones, which puts a real strain on the networking equipment needed to inspect and process the resultant traffic. A survey carried out [1] showed how this simple access has allowed Internet penetration to reach 32.7% of the world s population by December 2011, with the number of Internet users growing by 528% between 2000 and This survey also showed that the U.S. had over 108 million internet users in 2000 and now it is 2.2 billion in 2001, which is important when considering that the total amount of energy used in the year 2000 by various networking devices in the U.S. equated to the yearly output of a typical nuclear reactor unit. This means that the current amount of energy used by networking devices worldwide could exceed the yearly output of 21 nuclear reactor units. Power consumption should, therefore, be a key concern when designing any new networking equipment for the purpose of processing the ever-increasing amount of network traffic. Network processors are key components used to process packets as they pass through a network, carrying out tasks such as packet fragmentation and reassembly, encryption, forwarding, and classification. The growing number of tasks that need to be carried out, along with the increase in line rates, have placed the network processor under increased pressure. Relieving this pressure through the addition of extra processing capacity is not easy due to factors such as silicon limitations and tight power budgets. Ramping up clock speeds to gain extra performance is difficult due to physical limitations in the silicon used to create these devices, while increasing the number of processing cores can cause difficulty when it comes to writing the software needed to control the network processors. Both these approaches also lead Kiran K C, Sunil T D and Dr M Z Kurian. 87

2 DESIGN AND IMPLEMENTATION OF OPTIMIZED PACKET CLASSIFIER to large increases in power consumption due to the extra heat generated by increasing the clock speed and the extra transistors needed to increase the number of processing cores. [2] RELATED WORK Packet classification is used by networking equipment to sort packets into flows by comparing their headers to a list of rules.the packets are placed in the way determined by the matched rule. A flow is used to decide a packet s priority and the manner in which it is processed. In order to classify a packet, a router consults a table (or classifier) using one or more fields from the packet header to search for the corresponding flow. Packet classification algorithms can be classified based on the method of classification, as shown in the [Table - 1] below Type Algorithm HiCuts Decision tree based Modular packet classification HyperCuts RFC Decomposition Based Hash Based BV Tuple Space Search Table 1:packet classification algorithms 2.1 Packet Classification using Hierarchical Intelligent Cuttings (HiCuts) The HiCut algorithm[2] works by carefully preprocessing the classifier to build a decision tree data structure. Each time a packet arrives, the decision tree is traversed to find a leaf node, which stores a small number of rules. A linear search among these rules yields the desired matching. The shape and depth of the decision tree as well as the local decisions to be made at each node in the tree are chosen when the search tree is built. The following [Figure 1] illustrates an example of the decision-tree construction for a 2D filter set. On the plane there are five rectangles, each of them representing a filter. At the first step, cut is made along the x-axis to generate 4 sub-regions. At the following steps, select two of these sub-regions to cut along the y-axis and x-axis,. Now each sub-region overlaps 2 rectangles. If it is decided that it is affordable to do a linear search on at most 2 filters, cutting can be stopped. 88

3 International Journal of Computer Engineering and Applications, Volume VI, Issue II, May 14 ISSN Figure 1: Decision-tree construction for a 2D filter set. The number of decision tree nodes and the number of stored filters determine the storage of the algorithm data structure, and the depth of the decision tree and the number of filters in the leaf nodes determine the worst-case lookup throughput. 2.2 Modular Packet Classification This algorithm [3] practically approaches the problem of packet classification. Specifically, algorithm proposes to study a novel approach to packet classification which combines heuristic tree search with the use of filter buckets. It has high performance and economic storage requirement, algorithm is unique in the sense that it can adapt to the input packet distribution by taking into account the relative filter usage. In the first step,algorithm tries to eliminates as many filters as possible by examining specific bit positions.instead of eliminating all, the first step will be terminated when the set of remaining filters is less than some pre-specified maximum. This set of filters is called as filter bucket. This early termination avoids the explosion that is often the result of trying to completely differentiate between a few similar filters. In the second step, the filter bucket is processed to find a match. Due to the the limited size of a filter bucket, a completely different procedure can be used. In essence, algorithm is a modular composition of two procedures: the first to decompose large filter table into small filter buckets of a fixed maximum size, and the second procedure is to process filter buckets of limited size to find a match. 2.3 HyperCuts Similar to the previous best known algorithm, HiCuts, HyperCuts [4] is based on a decision tree structure. In HiCuts, each node in the decision tree represents a hyperplane. But in HyperCut each node in the decision tree represents a k--dimensional hypercube. Using this extra degree of freedom and a new set of heuristics to find optimal hypercubes for a given amount of storage, Hyper-Cuts can provide an order of magnitude improvement over existing classification algorithms. HyperCuts uses less memory than HiCuts optimized for memory, while the worst case search time of HyperCuts is % better than that of HiCuts optimized for speed. An example of a two dimensional classifier is shown in [Figure 2] with 4 rules: R1.R4. Each rule is represented by a rectangle in two dimensional space. The left figure shows the action of HiCuts. HiCuts builds a decision tree using local optimization decisions at each node to choose the next dimension of test, to see how many cuts to make in the chosen dimension. The leaves of the HiCuts tree store a list of rules that may match the search path to the leaf. The left part of [Figure 2] shows how the HiCuts algorithm works on the example rule set. Kiran K C, Sunil T D and Dr M Z Kurian. 89

4 DESIGN AND IMPLEMENTATION OF OPTIMIZED PACKET CLASSIFIER Figure - 2: HiCuts vs. HyperCuts. Assuming the maximum number of rules held in a leaf is 1, no matter how many cuts are going to be executed at a time, the HiCuts algorithm requires at least two levels in the decision tree. The HyperCuts algorithm introduced here eliminates this limitation in HiCuts by introducing one more degree of freedom. Each node in the decision tree represents a decision taken on the most representative dimensions, as opposed to using only a single dimension. For each of the chosen dimensions, the number of cuts is computed based on conditions dependent on the amount of space that is available for the search structure. In the example in [Figure 2] Hyper-Cuts (on the right) cuts the plane into four squares with one direct cut, reducing the height of the decision tree to Recursive Flow Classification(RFC) RFC [5] is a heuristic for packet classification on multiple fields. Classifying a packetinvolves mapping s-bits in the packet header to a T bit action identifier, where T=log N,T<<S. A simple, but impractical method could pre-compute the action for each of 2^s the different packet headers, yielding the action in one step. RFC attempts to perform the same mapping over several phases. At each stage the algorithm maps one set of values to a smaller set. In each phase a set of memories return a value shorter (i.e., expressed in fewer bits) than the index of the memory access. The algorithm, illustrated in [Figure 3], which operates as follows: In the first phase, fields of the packet header are split up into multiple chunks that are used to index into multiple memories in parallel. The contents of each memory are chosen so that the result of the lookup is narrower than the index. In subsequent phases, memories are indexed using the results from earlier phases. In the final phase, the memory yields the action. The algorithm requires construction of the contents of each memory. 90

5 International Journal of Computer Engineering and Applications, Volume VI, Issue II, May 14 ISSN Figure 3: Packet flow in RFC 2.5 BV(Bit Vector) search algorithm The bit vector[6] scheme is a form of divide-and conquer which divides the packet classification problem into k subproblems, and then combines the results. To do so, first build k one-dimensional tries associated with each dimension (field) in the original database. It is assume that ranges are either handled using a range tree instead of a trie, or by converting ranges to tries. An N bit vector is associated with each node of the trie corresponding to a valid prefix. ( N is the total number of rules). The [Figure 5] shows the construction for the simple two dimensional example conditions in [Figure - 4]. For example, in [Figure - 4], the second rule F1 has 00* in the first field. Thus, the leftmost node in the trie for the first field corresponds to 00*. Similarly, the Field 1 trie contains a node for all distinct prefixes in Field 1 of Figure 4 such as 00*, 10*, 11*,1*, and 0*. Figure - 4: A simple example with 11 rules on two fields Kiran K C, Sunil T D and Dr M Z Kurian. 91

6 DESIGN AND IMPLEMENTATION OF OPTIMIZED PACKET CLASSIFIER Figure - 5: Two tries associated with each of the fields in the database of Figure Tuple space search It is a generic packet classification algorithm, called as Tuple Space Search (TSS)[7]. Because real databases typically use only a small number of distinct field lengths.it maps the filters to tuples a simple linear search of the tuple space can provide a good speedup over naive linear search over the filters. Each tuple is maintained as a hash table that can be searched in one memory access. Then introduced the techniques for further refining the search of the tuple space, and demonstrate their effectiveness on some firewall databases. [3] RECEIVER AND RAM IMPLEMENTATION Implementation is the process of converting a new system design into an operational one. It is the key stage in achieving a successful new system. It must therefore be carefully planned and controlled. The implementation of a system is done after the development effort is completed. The overall implementation of optimized low-power packet classification on FPGA can be done as Implementing Receiver unit Implementing RAM Unit 3.1 Implementation of receiver RTL schematic of the receiver is as shown in the [Figure - 6]. input data at data_in is moved to the data_out. Output is generated only at the rising edge of the clock.sop(start of packet), eop(end of packet) and rst are the control signals. 92

7 International Journal of Computer Engineering and Applications, Volume VI, Issue II, May 14 ISSN Figure - 6: RTL schematic view of receiver The receiver is executed in Verilog and the results are observed in the simulink software as shown in [Figure 7]. The data decimal 19 at the input data_in is moved to the output data_out. Figure - 7: Simulation of reciever 3.2 Implementation of RAM RAM is also known as Random Access Memory. A random-access memory device allows stored data to be accessed quickly in any random order. One can read and over-write data in RAM.RAM modules are register arrays in which one operation on one register can be performed at a time. RAM is normally used for storing large data sets. RTL schematic of RAM is as shown in [Figure 8]. DI and DO are the data in and data out respectively. WE is write enable signal. Kiran K C, Sunil T D and Dr M Z Kurian. 93

8 DESIGN AND IMPLEMENTATION OF OPTIMIZED PACKET CLASSIFIER Figure - 8: RTL schematic view of RAM The implementation of 76X8 RAM is described in this section. This RAM module is used to store different constraints like environmental constraints, UAV constraints, mission constraints and also to store parent and offspring solutions. This RAM module is implemented using Verilog HDL. [Figure 8] shows the inputs and outputs of the RAM. Since the address is of 8 bits there are 256 memory locations to store the data. When the clock is high and reset is low, the data is stored or retrieved depending on the rd_wr signal. When rd_wr is high the data is read from the memory and when rd_wr is low the data is written into the memory. Resultant waveforms are shown in [Figure 9], where received packets at the input are stored in the RAM memory. Packets from the receiver are stored in the different memory locations of RAM, stored packets can be read from the locations when WE signal becomes zero. DO signal waveform show the read output from the RAM. Figure - 9: Simulation of RAM [4] INDEXING As the packet header consists of different fields like Source IP (SIP), Destination IP (DIP), source port number, destination port number and protocol type, these fields are used to classify the packets. Classification is carried out by taking the concept of dividing the header 94

9 International Journal of Computer Engineering and Applications, Volume VI, Issue II, May 14 ISSN fields into hypercube from the hypercut algorithm. In indexing process different ranges in the header fields are defined and an index for the particular range is assigned. As shown in [Figure -10], four bit SIP and DIP are considered for classification, different ranges of IP addresses are indexed into a four bit number. Index is later used in the classifier to move the packets into different locations. Figure - 10: Indexing of header fields [6] CLASSIFIER Packet is considered for 32 bit data, as the packet enters into the classifier the index for that packet is examined and according to the index assigned packet is moved to the different memory locations. As shown in [Figure 11] packet at data_in is moved to one of the location at the output according to the index specified. As the index is changed the output will appear at another location. Figure 11: Classification using index [6] CONCLUSION Kiran K C, Sunil T D and Dr M Z Kurian. 95

10 DESIGN AND IMPLEMENTATION OF OPTIMIZED PACKET CLASSIFIER In this paper different algorithms for software approaches of packet classification are discussed. Packet classification can be implemented in the core of the network and hence improving the speed and security. A classifier is designed and implemented using the method of indexing. REFERENCES [1] Usage and Population Statistics.(2012,Jun.) [Online].Available: [2] P. Gupta and N. McKeown, Packet classification using hierarchical intelligent cuttings, IEEE Micro, vol. 20, no. 1, pp , Feb [3] T. Woo, A modular approach to packet classification: Algorithms and results, in Proc. IEEE Int. Conf. Comput. Commun., Mar. 2000, pp [4] S. Singh, F. Baboescu, G. Varghese, and J. Wang, Packet classification using multidimensional cutting, in Proc. ACM Special Interest Group Data Commun. Conf., Aug. 2003, pp [5] P. Gupta and N. McKeown, Packet classification on multiple fields, in Proc. ACM Special Interest Group Data Commun. Conf., Sep. 1999, pp [6] T. V. Lakshman and D. Stiliadis, High-speed policy based packet forwarding using efficient multi-dimensional range matching, in Proc. ACM Special Interest Group Data Commun. Conf., Sep. 1998, pp [7] V. Srinivasan, S. Suri, and G. Varghese, Packet classification using tuple space search, in Proc. ACM Special Interest Group Data Commun.Conf., Sep. 1999, pp [8] A. Kennedy, D. Bermingham, X. Wang, and B. Liu, Power analysis of packet classification on programmable network processors, in Proc. EE Int. Conf. Signal Process. Commun., Nov. 2007, pp